73 	struct cpg_pll_clk *pll_clk = to_pll_clk(hw);  in cpg_pll_clk_recalc_rate()  local
76 	mult = FIELD_GET(CPG_PLLxCR0_NI, readl(pll_clk->pllcr0_reg)) + 1;  in cpg_pll_clk_recalc_rate()
103 	struct cpg_pll_clk *pll_clk = to_pll_clk(hw);  in cpg_pll_clk_set_rate()  local
110 	if (readl(pll_clk->pllcr0_reg) & CPG_PLLxCR0_KICK)  in cpg_pll_clk_set_rate()
113 	cpg_reg_modify(pll_clk->pllcr0_reg, CPG_PLLxCR0_NI,  in cpg_pll_clk_set_rate()
120 	cpg_reg_modify(pll_clk->pllcr0_reg, 0, CPG_PLLxCR0_KICK);  in cpg_pll_clk_set_rate()
131 	return readl_poll_timeout(pll_clk->pllecr_reg, val,  in cpg_pll_clk_set_rate()
132 				  val & pll_clk->pllecr_pllst_mask, 0, 1000);  in cpg_pll_clk_set_rate()
149 	struct cpg_pll_clk *pll_clk;  in cpg_pll_clk_register()  local
153 	pll_clk = kzalloc(sizeof(*pll_clk), GFP_KERNEL);  in cpg_pll_clk_register()
154 	if (!pll_clk)  in cpg_pll_clk_register()
162 	pll_clk->hw.init = &init;  in cpg_pll_clk_register()
163 	pll_clk->pllcr0_reg = base + cr0_offset;  in cpg_pll_clk_register()
164 	pll_clk->pllecr_reg = base + CPG_PLLECR;  in cpg_pll_clk_register()
165 	pll_clk->pllecr_pllst_mask = CPG_PLLECR_PLLST(index);  in cpg_pll_clk_register()
169 	cpg_reg_modify(pll_clk->pllcr0_reg, CPG_PLLxCR0_SSMODE, 0);  in cpg_pll_clk_register()
171 	clk = clk_register(NULL, &pll_clk->hw);  in cpg_pll_clk_register()
173 		kfree(pll_clk);  in cpg_pll_clk_register()