Lines Matching +full:0 +full:x004
35 FACTOR_FLAGS(CLK_TOP_SYSPLL_CK, "syspll_ck", "mainpll", 1, 1, 0),
36 FACTOR_FLAGS(CLK_TOP_SYSPLL_D2, "syspll_d2", "syspll_ck", 1, 2, 0),
37 FACTOR_FLAGS(CLK_TOP_SYSPLL_D2_D2, "syspll_d2_d2", "syspll_d2", 1, 2, 0),
38 FACTOR_FLAGS(CLK_TOP_SYSPLL_D2_D4, "syspll_d2_d4", "syspll_d2", 1, 4, 0),
39 FACTOR_FLAGS(CLK_TOP_SYSPLL_D2_D8, "syspll_d2_d8", "syspll_d2", 1, 8, 0),
40 FACTOR_FLAGS(CLK_TOP_SYSPLL_D2_D16, "syspll_d2_d16", "syspll_d2", 1, 16, 0),
41 FACTOR_FLAGS(CLK_TOP_SYSPLL_D3, "syspll_d3", "mainpll", 1, 3, 0),
42 FACTOR_FLAGS(CLK_TOP_SYSPLL_D3_D2, "syspll_d3_d2", "syspll_d3", 1, 2, 0),
43 FACTOR_FLAGS(CLK_TOP_SYSPLL_D3_D4, "syspll_d3_d4", "syspll_d3", 1, 4, 0),
44 FACTOR_FLAGS(CLK_TOP_SYSPLL_D3_D8, "syspll_d3_d8", "syspll_d3", 1, 8, 0),
45 FACTOR_FLAGS(CLK_TOP_SYSPLL_D5, "syspll_d5", "mainpll", 1, 5, 0),
46 FACTOR_FLAGS(CLK_TOP_SYSPLL_D5_D2, "syspll_d5_d2", "syspll_d5", 1, 2, 0),
47 FACTOR_FLAGS(CLK_TOP_SYSPLL_D5_D4, "syspll_d5_d4", "syspll_d5", 1, 4, 0),
48 FACTOR_FLAGS(CLK_TOP_SYSPLL_D7, "syspll_d7", "mainpll", 1, 7, 0),
49 FACTOR_FLAGS(CLK_TOP_SYSPLL_D7_D2, "syspll_d7_d2", "syspll_d7", 1, 2, 0),
50 FACTOR_FLAGS(CLK_TOP_SYSPLL_D7_D4, "syspll_d7_d4", "syspll_d7", 1, 4, 0),
51 FACTOR_FLAGS(CLK_TOP_UNIVPLL_CK, "univpll_ck", "univpll", 1, 1, 0),
52 FACTOR_FLAGS(CLK_TOP_UNIVPLL_D2, "univpll_d2", "univpll_ck", 1, 2, 0),
53 FACTOR_FLAGS(CLK_TOP_UNIVPLL_D2_D2, "univpll_d2_d2", "univpll_d2", 1, 2, 0),
54 FACTOR_FLAGS(CLK_TOP_UNIVPLL_D2_D4, "univpll_d2_d4", "univpll_d2", 1, 4, 0),
55 FACTOR_FLAGS(CLK_TOP_UNIVPLL_D2_D8, "univpll_d2_d8", "univpll_d2", 1, 8, 0),
56 FACTOR_FLAGS(CLK_TOP_UNIVPLL_D3, "univpll_d3", "univpll", 1, 3, 0),
57 FACTOR_FLAGS(CLK_TOP_UNIVPLL_D3_D2, "univpll_d3_d2", "univpll_d3", 1, 2, 0),
58 FACTOR_FLAGS(CLK_TOP_UNIVPLL_D3_D4, "univpll_d3_d4", "univpll_d3", 1, 4, 0),
59 FACTOR_FLAGS(CLK_TOP_UNIVPLL_D3_D8, "univpll_d3_d8", "univpll_d3", 1, 8, 0),
60 FACTOR_FLAGS(CLK_TOP_UNIVPLL_D5, "univpll_d5", "univpll", 1, 5, 0),
61 FACTOR_FLAGS(CLK_TOP_UNIVPLL_D5_D2, "univpll_d5_d2", "univpll_d5", 1, 2, 0),
62 FACTOR_FLAGS(CLK_TOP_UNIVPLL_D5_D4, "univpll_d5_d4", "univpll_d5", 1, 4, 0),
63 FACTOR_FLAGS(CLK_TOP_UNIVPLL_D5_D8, "univpll_d5_d8", "univpll_d5", 1, 8, 0),
64 FACTOR_FLAGS(CLK_TOP_UNIVPLL_D7, "univpll_d7", "univpll", 1, 7, 0),
65 FACTOR_FLAGS(CLK_TOP_UNIVP_192M_CK, "univ_192m_ck", "univpll_192m", 1, 1, 0),
66 FACTOR_FLAGS(CLK_TOP_UNIVP_192M_D2, "univ_192m_d2", "univ_192m_ck", 1, 2, 0),
67 FACTOR_FLAGS(CLK_TOP_UNIVP_192M_D4, "univ_192m_d4", "univ_192m_ck", 1, 4, 0),
68 FACTOR_FLAGS(CLK_TOP_UNIVP_192M_D8, "univ_192m_d8", "univ_192m_ck", 1, 8, 0),
69 FACTOR_FLAGS(CLK_TOP_UNIVP_192M_D16, "univ_192m_d16", "univ_192m_ck", 1, 16, 0),
70 FACTOR_FLAGS(CLK_TOP_UNIVP_192M_D32, "univ_192m_d32", "univ_192m_ck", 1, 32, 0),
104 FACTOR_FLAGS(CLK_TOP_UNIVPLL, "univpll", "univ2pll", 1, 2, 0),
105 FACTOR_FLAGS(CLK_TOP_UNIVPLL_D3_D16, "univpll_d3_d16", "univpll_d3", 1, 16, 0),
460 axi_parents, 0x40, 0x44, 0x48, 0, 2, 7, 0x004, 0,
463 mm_parents, 0x40, 0x44, 0x48, 8, 3, 15, 0x004, 1),
465 img_parents, 0x40, 0x44, 0x48, 16, 3, 23, 0x004, 2),
467 cam_parents, 0x40, 0x44, 0x48, 24, 4, 31, 0x004, 3),
470 dsp_parents, 0x50, 0x54, 0x58, 0, 4, 7, 0x004, 4),
472 dsp1_parents, 0x50, 0x54, 0x58, 8, 4, 15, 0x004, 5),
474 dsp2_parents, 0x50, 0x54, 0x58, 16, 4, 23, 0x004, 6),
476 ipu_if_parents, 0x50, 0x54, 0x58, 24, 4, 31, 0x004, 7),
479 mfg_parents, 0x60, 0x64, 0x68, 0, 2, 7, 0x004, 8),
481 f52m_mfg_parents, 0x60, 0x64, 0x68, 8, 2, 15, 0x004, 9),
483 camtg_parents, 0x60, 0x64, 0x68, 16, 3, 23, 0x004, 10),
485 camtg2_parents, 0x60, 0x64, 0x68, 24, 3, 31, 0x004, 11),
488 camtg3_parents, 0x70, 0x74, 0x78, 0, 3, 7, 0x004, 12),
490 camtg4_parents, 0x70, 0x74, 0x78, 8, 3, 15, 0x004, 13),
492 uart_parents, 0x70, 0x74, 0x78, 16, 1, 23, 0x004, 14),
494 spi_parents, 0x70, 0x74, 0x78, 24, 2, 31, 0x004, 15),
497 msdc50_hclk_parents, 0x80, 0x84, 0x88, 0, 2, 7, 0x004, 16, 0),
499 msdc50_0_parents, 0x80, 0x84, 0x88, 8, 3, 15, 0x004, 17, 0),
501 msdc30_1_parents, 0x80, 0x84, 0x88, 16, 3, 23, 0x004, 18, 0),
503 msdc30_2_parents, 0x80, 0x84, 0x88, 24, 3, 31, 0x004, 19, 0),
506 audio_parents, 0x90, 0x94, 0x98, 0, 2, 7, 0x004, 20),
508 aud_intbus_parents, 0x90, 0x94, 0x98, 8, 2, 15, 0x004, 21),
510 pmicspi_parents, 0x90, 0x94, 0x98, 16, 2, 23, 0x004, 22),
512 fpwrap_ulposc_parents, 0x90, 0x94, 0x98, 24, 2, 31, 0x004, 23),
515 atb_parents, 0xa0, 0xa4, 0xa8, 0, 2, 7, 0x004, 24),
517 sspm_parents, 0xa0, 0xa4, 0xa8, 8, 3, 15, 0x004, 25,
520 dpi0_parents, 0xa0, 0xa4, 0xa8, 16, 4, 23, 0x004, 26),
522 scam_parents, 0xa0, 0xa4, 0xa8, 24, 1, 31, 0x004, 27),
525 disppwm_parents, 0xb0, 0xb4, 0xb8, 0, 3, 7, 0x004, 28),
527 usb_top_parents, 0xb0, 0xb4, 0xb8, 8, 2, 15, 0x004, 29),
529 ssusb_top_xhci_parents, 0xb0, 0xb4, 0xb8, 16, 2, 23, 0x004, 30),
531 spm_parents, 0xb0, 0xb4, 0xb8, 24, 1, 31, 0x008, 0,
535 i2c_parents, 0xc0, 0xc4, 0xc8, 0, 2, 7, 0x008, 1),
537 scp_parents, 0xc0, 0xc4, 0xc8, 8, 3, 15, 0x008, 2),
539 seninf_parents, 0xc0, 0xc4, 0xc8, 16, 2, 23, 0x008, 3),
541 dxcc_parents, 0xc0, 0xc4, 0xc8, 24, 2, 31, 0x008, 4),
544 aud_engen1_parents, 0xd0, 0xd4, 0xd8, 0, 2, 7, 0x008, 5),
546 aud_engen2_parents, 0xd0, 0xd4, 0xd8, 8, 2, 15, 0x008, 6),
548 faes_ufsfde_parents, 0xd0, 0xd4, 0xd8, 16, 3, 23, 0x008, 7),
550 fufs_parents, 0xd0, 0xd4, 0xd8, 24, 2, 31, 0x008, 8),
553 aud_1_parents, 0xe0, 0xe4, 0xe8, 0, 1, 7, 0x008, 9),
555 aud_2_parents, 0xe0, 0xe4, 0xe8, 8, 1, 15, 0x008, 10),
611 MUX(CLK_MCU_MP0_SEL, "mcu_mp0_sel", mcu_mp0_parents, 0x7A0, 9, 2),
613 MUX(CLK_MCU_MP2_SEL, "mcu_mp2_sel", mcu_mp2_parents, 0x7A8, 9, 2),
615 MUX(CLK_MCU_BUS_SEL, "mcu_bus_sel", mcu_bus_parents, 0x7C0, 9, 2),
619 MUX(CLK_TOP_MUX_APLL_I2S0, "apll_i2s0_sel", apll_i2s0_parents, 0x320, 8, 1),
620 MUX(CLK_TOP_MUX_APLL_I2S1, "apll_i2s1_sel", apll_i2s1_parents, 0x320, 9, 1),
621 MUX(CLK_TOP_MUX_APLL_I2S2, "apll_i2s2_sel", apll_i2s2_parents, 0x320, 10, 1),
622 MUX(CLK_TOP_MUX_APLL_I2S3, "apll_i2s3_sel", apll_i2s3_parents, 0x320, 11, 1),
623 MUX(CLK_TOP_MUX_APLL_I2S4, "apll_i2s4_sel", apll_i2s4_parents, 0x320, 12, 1),
624 MUX(CLK_TOP_MUX_APLL_I2S5, "apll_i2s5_sel", apll_i2s5_parents, 0x328, 20, 1),
625 DIV_GATE(CLK_TOP_APLL12_DIV0, "apll12_div0", "apll_i2s0_sel", 0x320, 2, 0x324, 8, 0),
626 DIV_GATE(CLK_TOP_APLL12_DIV1, "apll12_div1", "apll_i2s1_sel", 0x320, 3, 0x324, 8, 8),
627 DIV_GATE(CLK_TOP_APLL12_DIV2, "apll12_div2", "apll_i2s2_sel", 0x320, 4, 0x324, 8, 16),
628 DIV_GATE(CLK_TOP_APLL12_DIV3, "apll12_div3", "apll_i2s3_sel", 0x320, 5, 0x324, 8, 24),
629 DIV_GATE(CLK_TOP_APLL12_DIV4, "apll12_div4", "apll_i2s4_sel", 0x320, 6, 0x328, 8, 0),
630 DIV_GATE(CLK_TOP_APLL12_DIVB, "apll12_divb", "apll12_div4", 0x320, 7, 0x328, 8, 8),
634 .set_ofs = 0x104,
635 .clr_ofs = 0x104,
636 .sta_ofs = 0x104,
650 .set_ofs = 0x80,
651 .clr_ofs = 0x84,
652 .sta_ofs = 0x90,
656 .set_ofs = 0x88,
657 .clr_ofs = 0x8c,
658 .sta_ofs = 0x94,
662 .set_ofs = 0xa4,
663 .clr_ofs = 0xa8,
664 .sta_ofs = 0xac,
668 .set_ofs = 0xc0,
669 .clr_ofs = 0xc4,
670 .sta_ofs = 0xc8,
699 GATE_INFRA0(CLK_INFRA_PMIC_TMR, "infra_pmic_tmr", "axi_sel", 0),
754 GATE_INFRA2(CLK_INFRA_IRTX, "infra_irtx", "f_f26m_ck", 0),
787 GATE_INFRA3(CLK_INFRA_MSDC0_SELF, "infra_msdc0_self", "msdc50_0_sel", 0),
810 .set_ofs = 0x20c,
811 .clr_ofs = 0x20c,
812 .sta_ofs = 0x20c,
846 for (i = 0; i < ARRAY_SIZE(top_muxes); i++) in clk_mt8183_reg_mfg_mux_notifier()
853 mfg_mux_nb->bypass_index = 0; /* Bypass to 26M crystal */ in clk_mt8183_reg_mfg_mux_notifier()