Lines Matching +full:0 +full:x40c
25 .set_ofs = 0x0008,
26 .clr_ofs = 0x0010,
27 .sta_ofs = 0x0018,
31 .set_ofs = 0x000c,
32 .clr_ofs = 0x0014,
33 .sta_ofs = 0x001c,
42 MUX(CLK_PERI_UART0_SEL, "uart0_ck_sel", uart_ck_sel_parents, 0x40c, 0, 1),
43 MUX(CLK_PERI_UART1_SEL, "uart1_ck_sel", uart_ck_sel_parents, 0x40c, 1, 1),
44 MUX(CLK_PERI_UART2_SEL, "uart2_ck_sel", uart_ck_sel_parents, 0x40c, 2, 1),
45 MUX(CLK_PERI_UART3_SEL, "uart3_ck_sel", uart_ck_sel_parents, 0x40c, 3, 1),
51 GATE_PERI0(CLK_PERI_NFI, "peri_nfi", "axi_sel", 0),
84 GATE_PERI1(CLK_PERI_SPI, "peri_spi", "spi_sel", 0),
89 static u16 pericfg_rst_ofs[] = { 0x0, 0x4 };