Lines Matching +full:0 +full:x40c
22 .set_ofs = 0x0008,
23 .clr_ofs = 0x0010,
24 .sta_ofs = 0x0018,
33 MUX(CLK_PERI_UART0_SEL, "uart0_ck_sel", uart_ck_sel_parents, 0x40c, 0, 1),
34 MUX(CLK_PERI_UART1_SEL, "uart1_ck_sel", uart_ck_sel_parents, 0x40c, 1, 1),
35 MUX(CLK_PERI_UART2_SEL, "uart2_ck_sel", uart_ck_sel_parents, 0x40c, 2, 1),
36 MUX(CLK_PERI_UART3_SEL, "uart3_ck_sel", uart_ck_sel_parents, 0x40c, 3, 1),
40 GATE_PERI(CLK_PERI_NFI, "peri_nfi", "axi_sel", 0),
72 static u16 peri_rst_ofs[] = { 0x0 };
101 base = devm_platform_ioremap_resource(pdev, 0); in clk_mt6795_pericfg_probe()
128 return 0; in clk_mt6795_pericfg_probe()