171 	u32 div_int;  member
361 	u32 div_int, div_frc, val;  in vc3_pll_recalc_rate()  local
365 	div_int = (val & GENMASK(2, 0)) << 8;  in vc3_pll_recalc_rate()
367 	div_int |= val;  in vc3_pll_recalc_rate()
375 			(div_int * VC3_2_POW_16 + div_frc) / VC3_2_POW_16);  in vc3_pll_recalc_rate()
377 		rate = parent_rate * div_int;  in vc3_pll_recalc_rate()
395 	vc3->div_int = rate / *parent_rate;  in vc3_pll_round_rate()
398 		if (vc3->div_int > 0x7ff)  in vc3_pll_round_rate()
407 			(vc3->div_int * VC3_2_POW_16 + vc3->div_frc) / VC3_2_POW_16);  in vc3_pll_round_rate()
409 		rate = *parent_rate * vc3->div_int;  in vc3_pll_round_rate()
423 	val = (val & 0xf8) | ((vc3->div_int >> 8) & 0x7);  in vc3_pll_set_rate()
425 	regmap_write(vc3->regmap, pll->int_div_lsb_offs, vc3->div_int & 0xff);  in vc3_pll_set_rate()