Lines Matching refs:n_num
383 u64 n_num, u32 n_den) in si5341_encode_44_32() argument
388 while (!(n_num & BIT_ULL(43)) && !(n_den & BIT(31))) { in si5341_encode_44_32()
389 n_num <<= 1; in si5341_encode_44_32()
394 put_unaligned_le32(n_num, r); in si5341_encode_44_32()
395 r[4] = (n_num >> 32) & 0xff; in si5341_encode_44_32()
396 r[5] = (n_num >> 40) & 0x0f; in si5341_encode_44_32()
640 u64 n_num; in si5341_synth_clk_recalc_rate() local
645 SI5341_SYNTH_N_NUM(synth->index), &n_num, &n_den); in si5341_synth_clk_recalc_rate()
649 if (!n_num || !n_den) in si5341_synth_clk_recalc_rate()
661 f = div64_u64(f, (n_num >> 4)); in si5341_synth_clk_recalc_rate()
687 u64 n_num, u32 n_den, bool is_integer) in si5341_synth_program() argument
693 SI5341_SYNTH_N_NUM(index), n_num, n_den); in si5341_synth_program()
709 u64 n_num; in si5341_synth_clk_set_rate() local
715 n_num = synth->data->freq_vco; in si5341_synth_clk_set_rate()
718 r = do_div(n_num, rate); in si5341_synth_clk_set_rate()
727 n_num *= n_den; in si5341_synth_clk_set_rate()
728 n_num += r / g; in si5341_synth_clk_set_rate()
733 synth->index, n_num, n_den, in si5341_synth_clk_set_rate()
736 return si5341_synth_program(synth, n_num, n_den, is_integer); in si5341_synth_clk_set_rate()