Lines Matching refs:tpm_buf_append_u32
192 tpm_buf_append_u32(&buf, 1); in tpm2_pcr_read()
247 tpm_buf_append_u32(&buf, pcr_idx); in tpm2_pcr_extend()
254 tpm_buf_append_u32(&buf, sizeof(struct tpm2_null_auth_area)); in tpm2_pcr_extend()
257 tpm_buf_append_u32(&buf, chip->nr_allocated_banks); in tpm2_pcr_extend()
360 tpm_buf_append_u32(&buf, handle); in tpm2_flush_context()
396 tpm_buf_append_u32(&buf, TPM2_CAP_TPM_PROPERTIES); in tpm2_get_tpm_pt()
397 tpm_buf_append_u32(&buf, property_id); in tpm2_get_tpm_pt()
398 tpm_buf_append_u32(&buf, 1); in tpm2_get_tpm_pt()
501 tpm_buf_append_u32(&buf, TPM2_CAP_TPM_PROPERTIES); in tpm2_probe()
502 tpm_buf_append_u32(&buf, TPM_PT_TOTAL_COMMANDS); in tpm2_probe()
503 tpm_buf_append_u32(&buf, 1); in tpm2_probe()
567 tpm_buf_append_u32(&buf, TPM2_CAP_PCRS); in tpm2_get_pcr_allocation()
568 tpm_buf_append_u32(&buf, 0); in tpm2_get_pcr_allocation()
569 tpm_buf_append_u32(&buf, 1); in tpm2_get_pcr_allocation()
656 tpm_buf_append_u32(&buf, TPM2_CAP_COMMANDS); in tpm2_get_cc_attrs_tbl()
657 tpm_buf_append_u32(&buf, TPM2_CC_FIRST); in tpm2_get_cc_attrs_tbl()
658 tpm_buf_append_u32(&buf, nr_commands); in tpm2_get_cc_attrs_tbl()