55 static int tegra_gmi_enable(struct tegra_gmi *gmi)  in tegra_gmi_enable()  argument
59 	pm_runtime_enable(gmi->dev);  in tegra_gmi_enable()
60 	err = pm_runtime_resume_and_get(gmi->dev);  in tegra_gmi_enable()
62 		pm_runtime_disable(gmi->dev);  in tegra_gmi_enable()
66 	reset_control_assert(gmi->rst);  in tegra_gmi_enable()
68 	reset_control_deassert(gmi->rst);  in tegra_gmi_enable()
70 	writel(gmi->snor_timing0, gmi->base + TEGRA_GMI_TIMING0);  in tegra_gmi_enable()
71 	writel(gmi->snor_timing1, gmi->base + TEGRA_GMI_TIMING1);  in tegra_gmi_enable()
73 	gmi->snor_config |= TEGRA_GMI_CONFIG_GO;  in tegra_gmi_enable()
74 	writel(gmi->snor_config, gmi->base + TEGRA_GMI_CONFIG);  in tegra_gmi_enable()
79 static void tegra_gmi_disable(struct tegra_gmi *gmi)  in tegra_gmi_disable()  argument
83 	/* stop GMI operation */  in tegra_gmi_disable()
84 	config = readl(gmi->base + TEGRA_GMI_CONFIG);  in tegra_gmi_disable()
86 	writel(config, gmi->base + TEGRA_GMI_CONFIG);  in tegra_gmi_disable()
88 	reset_control_assert(gmi->rst);  in tegra_gmi_disable()
90 	pm_runtime_put_sync_suspend(gmi->dev);  in tegra_gmi_disable()
91 	pm_runtime_force_suspend(gmi->dev);  in tegra_gmi_disable()
94 static int tegra_gmi_parse_dt(struct tegra_gmi *gmi)  in tegra_gmi_parse_dt()  argument
100 	child = of_get_next_available_child(gmi->dev->of_node, NULL);  in tegra_gmi_parse_dt()
102 		dev_err(gmi->dev, "no child nodes found\n");  in tegra_gmi_parse_dt()
109 	 * chip-select line from the GMI controller.  in tegra_gmi_parse_dt()
111 	if (of_get_child_count(gmi->dev->of_node) > 1)  in tegra_gmi_parse_dt()
112 		dev_warn(gmi->dev, "only one child device is supported.");  in tegra_gmi_parse_dt()
115 		gmi->snor_config |= TEGRA_GMI_BUS_WIDTH_32BIT;  in tegra_gmi_parse_dt()
118 		gmi->snor_config |= TEGRA_GMI_MUX_MODE;  in tegra_gmi_parse_dt()
121 		gmi->snor_config |= TEGRA_GMI_RDY_BEFORE_DATA;  in tegra_gmi_parse_dt()
124 		gmi->snor_config |= TEGRA_GMI_RDY_ACTIVE_HIGH;  in tegra_gmi_parse_dt()
127 		gmi->snor_config |= TEGRA_GMI_ADV_ACTIVE_HIGH;  in tegra_gmi_parse_dt()
130 		gmi->snor_config |= TEGRA_GMI_OE_ACTIVE_HIGH;  in tegra_gmi_parse_dt()
133 		gmi->snor_config |= TEGRA_GMI_CS_ACTIVE_HIGH;  in tegra_gmi_parse_dt()
140 			dev_err(gmi->dev,  in tegra_gmi_parse_dt()
152 			dev_err(gmi->dev,  in tegra_gmi_parse_dt()
162 		dev_err(gmi->dev, "invalid chip select: %d", property);  in tegra_gmi_parse_dt()
167 	gmi->snor_config |= TEGRA_GMI_CS_SELECT(property);  in tegra_gmi_parse_dt()
171 		gmi->snor_timing0 |= TEGRA_GMI_MUXED_WIDTH(property);  in tegra_gmi_parse_dt()
173 		gmi->snor_timing0 |= TEGRA_GMI_MUXED_WIDTH(1);  in tegra_gmi_parse_dt()
176 		gmi->snor_timing0 |= TEGRA_GMI_HOLD_WIDTH(property);  in tegra_gmi_parse_dt()
178 		gmi->snor_timing0 |= TEGRA_GMI_HOLD_WIDTH(1);  in tegra_gmi_parse_dt()
181 		gmi->snor_timing0 |= TEGRA_GMI_ADV_WIDTH(property);  in tegra_gmi_parse_dt()
183 		gmi->snor_timing0 |= TEGRA_GMI_ADV_WIDTH(1);  in tegra_gmi_parse_dt()
186 		gmi->snor_timing0 |= TEGRA_GMI_CE_WIDTH(property);  in tegra_gmi_parse_dt()
188 		gmi->snor_timing0 |= TEGRA_GMI_CE_WIDTH(4);  in tegra_gmi_parse_dt()
191 		gmi->snor_timing1 |= TEGRA_GMI_WE_WIDTH(property);  in tegra_gmi_parse_dt()
193 		gmi->snor_timing1 |= TEGRA_GMI_WE_WIDTH(1);  in tegra_gmi_parse_dt()
196 		gmi->snor_timing1 |= TEGRA_GMI_OE_WIDTH(property);  in tegra_gmi_parse_dt()
198 		gmi->snor_timing1 |= TEGRA_GMI_OE_WIDTH(1);  in tegra_gmi_parse_dt()
201 		gmi->snor_timing1 |= TEGRA_GMI_WAIT_WIDTH(property);  in tegra_gmi_parse_dt()
203 		gmi->snor_timing1 |= TEGRA_GMI_WAIT_WIDTH(3);  in tegra_gmi_parse_dt()
213 	struct tegra_gmi *gmi;  in tegra_gmi_probe()  local
216 	gmi = devm_kzalloc(dev, sizeof(*gmi), GFP_KERNEL);  in tegra_gmi_probe()
217 	if (!gmi)  in tegra_gmi_probe()
220 	platform_set_drvdata(pdev, gmi);  in tegra_gmi_probe()
221 	gmi->dev = dev;  in tegra_gmi_probe()
223 	gmi->base = devm_platform_ioremap_resource(pdev, 0);  in tegra_gmi_probe()
224 	if (IS_ERR(gmi->base))  in tegra_gmi_probe()
225 		return PTR_ERR(gmi->base);  in tegra_gmi_probe()
227 	gmi->clk = devm_clk_get(dev, "gmi");  in tegra_gmi_probe()
228 	if (IS_ERR(gmi->clk)) {  in tegra_gmi_probe()
230 		return PTR_ERR(gmi->clk);  in tegra_gmi_probe()
233 	gmi->rst = devm_reset_control_get(dev, "gmi");  in tegra_gmi_probe()
234 	if (IS_ERR(gmi->rst)) {  in tegra_gmi_probe()
236 		return PTR_ERR(gmi->rst);  in tegra_gmi_probe()
243 	err = tegra_gmi_parse_dt(gmi);  in tegra_gmi_probe()
247 	err = tegra_gmi_enable(gmi);  in tegra_gmi_probe()
254 		tegra_gmi_disable(gmi);  in tegra_gmi_probe()
263 	struct tegra_gmi *gmi = platform_get_drvdata(pdev);  in tegra_gmi_remove()  local
265 	of_platform_depopulate(gmi->dev);  in tegra_gmi_remove()
266 	tegra_gmi_disable(gmi);  in tegra_gmi_remove()
273 	struct tegra_gmi *gmi = dev_get_drvdata(dev);  in tegra_gmi_runtime_resume()  local
276 	err = clk_prepare_enable(gmi->clk);  in tegra_gmi_runtime_resume()
278 		dev_err(gmi->dev, "failed to enable clock: %d\n", err);  in tegra_gmi_runtime_resume()
287 	struct tegra_gmi *gmi = dev_get_drvdata(dev);  in tegra_gmi_runtime_suspend()  local
289 	clk_disable_unprepare(gmi->clk);  in tegra_gmi_runtime_suspend()
300 	{ .compatible = "nvidia,tegra20-gmi", },
301 	{ .compatible = "nvidia,tegra30-gmi", },
310 		.name		= "tegra-gmi",
318 MODULE_DESCRIPTION("NVIDIA Tegra GMI Bus Driver");