Lines Matching refs:BLOCK_TEST_SIZE
10 #define BLOCK_TEST_SIZE 12 macro
13 .max_register = BLOCK_TEST_SIZE,
138 unsigned int val[BLOCK_TEST_SIZE], rval[BLOCK_TEST_SIZE]; in bulk_write()
156 BLOCK_TEST_SIZE)); in bulk_write()
157 for (i = 0; i < BLOCK_TEST_SIZE; i++) in bulk_write()
163 for (i = 0; i < BLOCK_TEST_SIZE; i++) in bulk_write()
175 unsigned int val[BLOCK_TEST_SIZE], rval[BLOCK_TEST_SIZE]; in bulk_read()
189 for (i = 0; i < BLOCK_TEST_SIZE; i++) in bulk_read()
192 BLOCK_TEST_SIZE)); in bulk_read()
196 for (i = 0; i < BLOCK_TEST_SIZE; i++) in bulk_read()
213 config.num_reg_defaults = BLOCK_TEST_SIZE; in write_readonly()
223 for (i = 0; i < BLOCK_TEST_SIZE; i++) in write_readonly()
227 for (i = 0; i < BLOCK_TEST_SIZE; i++) in write_readonly()
231 for (i = 0; i < BLOCK_TEST_SIZE; i++) in write_readonly()
255 for (i = 0; i < BLOCK_TEST_SIZE; i++) in read_writeonly()
262 for (i = 0; i < BLOCK_TEST_SIZE; i++) { in read_writeonly()
283 unsigned int rval[BLOCK_TEST_SIZE]; in reg_defaults()
288 config.num_reg_defaults = BLOCK_TEST_SIZE; in reg_defaults()
297 BLOCK_TEST_SIZE)); in reg_defaults()
301 for (i = 0; i < BLOCK_TEST_SIZE; i++) in reg_defaults()
311 unsigned int rval[BLOCK_TEST_SIZE]; in reg_defaults_read_dev()
316 config.num_reg_defaults_raw = BLOCK_TEST_SIZE; in reg_defaults_read_dev()
324 for (i = 0; i < BLOCK_TEST_SIZE; i++) { in reg_defaults_read_dev()
331 BLOCK_TEST_SIZE)); in reg_defaults_read_dev()
335 for (i = 0; i < BLOCK_TEST_SIZE; i++) in reg_defaults_read_dev()
346 unsigned int rval[BLOCK_TEST_SIZE]; in register_patch()
352 config.num_reg_defaults = BLOCK_TEST_SIZE; in register_patch()
361 BLOCK_TEST_SIZE)); in register_patch()
374 for (i = 0; i < BLOCK_TEST_SIZE; i++) { in register_patch()
403 config.num_reg_defaults = BLOCK_TEST_SIZE / 2; in stride()
411 for (i = 0; i < BLOCK_TEST_SIZE; i++) { in stride()
627 unsigned int val[BLOCK_TEST_SIZE]; in cache_sync()
642 BLOCK_TEST_SIZE)); in cache_sync()
643 for (i = 0; i < BLOCK_TEST_SIZE; i++) in cache_sync()
653 for (i = 0; i < BLOCK_TEST_SIZE; i++) in cache_sync()
670 config.num_reg_defaults = BLOCK_TEST_SIZE; in cache_sync_defaults()
684 for (i = 0; i < BLOCK_TEST_SIZE; i++) in cache_sync_defaults()
689 for (i = 0; i < BLOCK_TEST_SIZE; i++) in cache_sync_defaults()
714 for (i = 0; i < BLOCK_TEST_SIZE; i++) in cache_sync_readonly()
720 for (i = 0; i < BLOCK_TEST_SIZE; i++) in cache_sync_readonly()
725 for (i = 0; i < BLOCK_TEST_SIZE; i++) in cache_sync_readonly()
730 for (i = 0; i < BLOCK_TEST_SIZE; i++) in cache_sync_readonly()
743 unsigned int rval[BLOCK_TEST_SIZE], val; in cache_sync_patch()
749 config.num_reg_defaults = BLOCK_TEST_SIZE; in cache_sync_patch()
758 BLOCK_TEST_SIZE)); in cache_sync_patch()
772 for (i = 0; i < BLOCK_TEST_SIZE; i++) in cache_sync_patch()
777 for (i = 0; i < BLOCK_TEST_SIZE; i++) { in cache_sync_patch()
803 unsigned int rval[BLOCK_TEST_SIZE]; in cache_drop()
808 config.num_reg_defaults = BLOCK_TEST_SIZE; in cache_drop()
816 for (i = 0; i < BLOCK_TEST_SIZE; i++) in cache_drop()
819 BLOCK_TEST_SIZE)); in cache_drop()
820 for (i = 0; i < BLOCK_TEST_SIZE; i++) { in cache_drop()
831 BLOCK_TEST_SIZE)); in cache_drop()
832 for (i = 0; i < BLOCK_TEST_SIZE; i++) in cache_drop()
856 for (i = 0; i < BLOCK_TEST_SIZE; i++) in cache_present()
860 for (i = 0; i < BLOCK_TEST_SIZE; i++) in cache_present()
864 for (i = 0; i < BLOCK_TEST_SIZE; i++) in cache_present()
868 for (i = 0; i < BLOCK_TEST_SIZE; i++) in cache_present()
872 for (i = 0; i < BLOCK_TEST_SIZE; i++) in cache_present()
915 .max_register = BLOCK_TEST_SIZE,