Lines Matching +full:cell +full:- +full:count

1 /* SPDX-License-Identifier: GPL-2.0 */
3  * drivers/atm/suni.h - S/UNI PHY driver
6 /* Written 1995-2000 by Werner Almesberger, EPFL LRC/ICA */
26 			     /* 0x08-0x0F reserved */
29 #define SUNI_RSOP_SBL		0x12	/* RSOP Section BIP-8 LSB */
30 #define SUNI_RSOP_SBM		0x13	/* RSOP Section BIP-8 MSB */
33 			     /* 0x16-0x17 reserved */
36 #define SUNI_RLOP_LBL		0x1A	/* RLOP Line BIP-8/24 LSB */
37 #define SUNI_RLOP_LB		0x1B	/* RLOP Line BIP-8/24 */
38 #define SUNI_RLOP_LBM		0x1C	/* RLOP Line BIP-8/24 MSB */
44 			     /* 0x22-0x27 reserved */
50 			     /* 0x34-0x36 reserved */
52 #define SUNI_RPOP_PBL		0x38	/* RPOP Path BIP-8 LSB */
53 #define SUNI_RPOP_PBM		0x39	/* RPOP Path BIP-8 MSB */
57 #define SUNI_RPOP_PBC		0x3D	/* RPOP Path BIP-8 Configuration */
59 			     /* 0x3E-0x3F reserved */
62 			     /* 0x42-0x44 reserved */
68 			     /* 0x4A-0x4F reserved */
73 #define SUNI_RACP_CHEC		0x54	/* RACP Correctable HCS Error Count */
74 #define SUNI_RACP_UHEC		0x55	/* RACP Uncorrectable HCS Err Count */
75 #define SUNI_RACP_RCCL		0x56	/* RACP Receive Cell Counter LSB */
76 #define SUNI_RACP_RCC		0x57	/* RACP Receive Cell Counter */
77 #define SUNI_RACP_RCCM		0x58	/* RACP Receive Cell Counter MSB */
79 			     /* 0x5A-0x5F reserved */
81 #define SUNI_TACP_IUCHP		0x61	/* TACP Idle/Unassigned Cell Hdr Pat */
82 #define SUNI_TACP_IUCPOP	0x62	/* TACP Idle/Unassigned Cell Payload
85 #define SUNI_TACP_TCCL		0x64	/* TACP Transmit Cell Counter LSB */
86 #define SUNI_TACP_TCC		0x65	/* TACP Transmit Cell Counter */
87 #define SUNI_TACP_TCCM		0x66	/* TACP Transmit Cell Counter MSB */
90 			     /* 0x69-0x7F reserved */
92 			     /* 0x81-0xFF reserved */
116 					   TRCLK+/- */
124 #define SUNI_MCT_LCDV		0x40	/* R, loss of cell delineation */
125 #define SUNI_MCT_LCDE		0x80	/* RW, loss of cell delineation
135 					   BIP-8 error (B1) */
147 #define SUNI_RSOP_SIS_BIPEI	0x40	/* R, section BIP-8 interrupt */
188 #define SUNI_RACP_IES_OOCDI	0x10	/* R, change of cell delineation
192 #define SUNI_RACP_IES_OOCDE	0x80	/* RW, enable cell delineation state
207 #define SUNI_TACP_IUCHP_PTI	0x0e	/* RW, 5th-7th bits of 4th octet of i/u
210 #define SUNI_TACP_IUCHP_GFC	0xf0	/* RW, 1st-4th bits of 1st octet of i/u
219 					   tri-state */
220 #define SUNI_MT_HIZDATA		0x02	/* W, also tri-state data bus */
224 #define SUNI_MT_DS27_53		0x80	/* RW, select between 8- or 16- bit */
235 	struct atm_dev *dev;			/* device back-pointer */