Lines Matching refs:writew
273 writew(0xFFFD, dev->seg_reg+MODE_REG_0); in clear_lockup()
284 writew(T_ONLINE, dev->seg_reg+MODE_REG_0); in clear_lockup()
285 writew(~(TRANSMIT_DONE|TCQ_NOT_EMPTY), dev->seg_reg+SEG_MASK_REG); in clear_lockup()
286 writew(TRANSMIT_DONE, dev->seg_reg+SEG_INTR_STATUS_REG); in clear_lockup()
570 writew((CBR_EN | UBR_EN | ABR_EN | (0x23 << 2)), dev->seg_reg+STPARMS); in ia_cbr_setup()
584 writew((UBR_EN | ABR_EN | (0x23 << 2)), iadev->seg_reg+STPARMS); in ia_cbrVc_close()
1077 writew( excpq_rd_ptr, iadev->reass_reg + EXCP_Q_RD_PTR);
1087 writew(desc, iadev->reass_ram+iadev->rfL.fdq_wr);
1091 writew(iadev->rfL.fdq_wr, iadev->reass_reg+FREEQ_WR_PTR);
1124 writew(iadev->rfL.pcq_rd, iadev->reass_reg+PCQ_RD_PTR);
1248 writew( ~(RX_FREEQ_EMPT|RX_EXCP_RCVD),iadev->reass_reg+REASS_MASK_REG);
1460 writew(0xffff, iadev->reass_reg+REASS_MASK_REG);
1461 writew(0, iadev->reass_reg+MODE_REG);
1462 writew(RESET_REASS, iadev->reass_reg+REASS_COMMAND_REG);
1478 writew(RX_DESC_BASE >> 16, iadev->reass_reg+REASS_DESC_BASE);
1480 writew(iadev->rx_buf_sz, iadev->reass_reg+BUF_SIZE);
1498 writew(i >> 16, iadev->reass_reg+REASS_QUEUE_BASE);
1499 writew(i, iadev->reass_reg+FREEQ_ST_ADR);
1500 writew(i+iadev->num_rx_desc*sizeof(u_short),
1502 writew(i, iadev->reass_reg+FREEQ_RD_PTR);
1503 writew(i+iadev->num_rx_desc*sizeof(u_short),
1516 writew(i, iadev->reass_reg+PCQ_ST_ADR);
1517 writew(i+iadev->num_vc*sizeof(u_short), iadev->reass_reg+PCQ_ED_ADR);
1518 writew(i, iadev->reass_reg+PCQ_RD_PTR);
1519 writew(i, iadev->reass_reg+PCQ_WR_PTR);
1523 writew(i, iadev->reass_reg+EXCP_Q_ST_ADR);
1524 writew(i + NUM_RX_EXCP * sizeof(RX_ERROR_Q),
1526 writew(i, iadev->reass_reg+EXCP_Q_RD_PTR);
1527 writew(i, iadev->reass_reg+EXCP_Q_WR_PTR);
1552 writew((i >> 3), iadev->reass_reg+REASS_TABLE_BASE);
1565 writew(((i>>3) & 0xfff8) | vcsize_sel, iadev->reass_reg+VC_LKUP_BASE);
1580 writew(i >> 3, iadev->reass_reg+ABR_LKUP_BASE);
1595 writew(0xff00, iadev->reass_reg+VP_FILTER);
1596 writew(0, iadev->reass_reg+XTRA_RM_OFFSET);
1597 writew(0x1, iadev->reass_reg+PROTOCOL_ID);
1603 writew(0xF6F8, iadev->reass_reg+PKT_TM_CNT );
1608 writew(i, iadev->reass_reg+TMOUT_RANGE);
1618 writew(~(RX_FREEQ_EMPT|RX_PKT_RCVD), iadev->reass_reg+REASS_MASK_REG);
1633 writew(R_ONLINE, iadev->reass_reg+MODE_REG);
1674 writew(TRANSMIT_DONE, iadev->seg_reg+SEG_INTR_STATUS_REG);
1937 writew(0xffff, iadev->seg_reg+SEG_MASK_REG);
1938 writew(0, iadev->seg_reg+MODE_REG_0);
1939 writew(RESET_SEG, iadev->seg_reg+SEG_COMMAND_REG);
1964 writew(TX_DESC_BASE, iadev->seg_reg+SEG_DESC_BASE);
2012 writew(i >> 16, iadev->seg_reg+SEG_QUEUE_BASE);
2015 writew(i, iadev->seg_reg+TCQ_ST_ADR);
2016 writew(i, iadev->seg_reg+TCQ_RD_PTR);
2017 writew(i+iadev->num_tx_desc*sizeof(u_short),iadev->seg_reg+TCQ_WR_PTR);
2019 writew(i+2 * iadev->num_tx_desc * sizeof(u_short),
2032 writew(i, iadev->seg_reg+PRQ_ST_ADR);
2033 writew(i+2 * iadev->num_tx_desc * sizeof(u_short),
2035 writew(i, iadev->seg_reg+PRQ_RD_PTR);
2036 writew(i, iadev->seg_reg+PRQ_WR_PTR);
2059 writew(0,iadev->seg_reg+CBR_PTR_BASE);
2063 writew(tmp16,iadev->seg_reg+CBR_PTR_BASE);
2069 writew(tmp16, iadev->seg_reg+CBR_TAB_BEG);
2072 writew(tmp16, iadev->seg_reg+CBR_TAB_END+1); // CBR_PTR;
2074 writew(tmp16, iadev->seg_reg+CBR_TAB_END);
2106 writew(vcsize_sel | ((i >> 8) & 0xfff8),iadev->seg_reg+VCT_BASE);
2108 writew((i >> 8) & 0xfffe, iadev->seg_reg+VCTE_BASE);
2110 writew((i & 0xffff) >> 11, iadev->seg_reg+UBR_SBPTR_BASE);
2112 writew((i >> 7) & 0xffff, iadev->seg_reg+UBRWQ_BASE);
2124 writew((i >> 11) & 0xffff, iadev->seg_reg+ABR_SBPTR_BASE);
2126 writew((i >> 7) & 0xffff, iadev->seg_reg+ABRWQ_BASE);
2158 writew(RATE25, iadev->seg_reg+MAXRATE);
2159 writew((UBR_EN | (0x23 << 2)), iadev->seg_reg+STPARMS);
2162 writew(cellrate_to_float(iadev->LineRate),iadev->seg_reg+MAXRATE);
2163 writew((UBR_EN | ABR_EN | (0x23 << 2)), iadev->seg_reg+STPARMS);
2166 writew(0, iadev->seg_reg+IDLEHEADHI);
2167 writew(0, iadev->seg_reg+IDLEHEADLO);
2170 writew(0xaa00, iadev->seg_reg+ABRUBR_ARB);
2179 writew(RM_TYPE_4_0, iadev->seg_reg+RM_TYPE);
2183 writew(MODE_REG_1_VAL, iadev->seg_reg+MODE_REG_1);
2186 writew(T_ONLINE, iadev->seg_reg+MODE_REG_0);
2192 writew(~(TRANSMIT_DONE | TCQ_NOT_EMPTY), iadev->seg_reg+SEG_MASK_REG);
2193 writew(TRANSMIT_DONE, iadev->seg_reg+SEG_INTR_STATUS_REG);
2852 writew( ~(RX_FREEQ_EMPT | RX_EXCP_RCVD),
2958 writew(iadev->ffL.tcq_rd, iadev->seg_reg+TCQ_RD_PTR);
2995 writew(TRANSMIT_DONE, iadev->seg_reg+SEG_INTR_STATUS_REG);