Lines Matching refs:reass_reg
1063 state = readl(iadev->reass_reg + STATE_REG) & 0xffff;
1066 excpq_rd_ptr = readw(iadev->reass_reg + EXCP_Q_RD_PTR) & 0xffff;
1068 if (excpq_rd_ptr == *(u16*)(iadev->reass_reg + EXCP_Q_WR_PTR))
1075 if (excpq_rd_ptr > (readw(iadev->reass_reg + EXCP_Q_ED_ADR)& 0xffff))
1076 excpq_rd_ptr = readw(iadev->reass_reg + EXCP_Q_ST_ADR)& 0xffff;
1077 writew( excpq_rd_ptr, iadev->reass_reg + EXCP_Q_RD_PTR);
1078 state = readl(iadev->reass_reg + STATE_REG) & 0xffff;
1091 writew(iadev->rfL.fdq_wr, iadev->reass_reg+FREEQ_WR_PTR);
1108 if (iadev->rfL.pcq_rd == (readw(iadev->reass_reg+PCQ_WR_PTR)&0xffff))
1118 readw(iadev->reass_reg+PCQ_WR_PTR)&0xffff);)
1124 writew(iadev->rfL.pcq_rd, iadev->reass_reg+PCQ_RD_PTR);
1217 status = readl(iadev->reass_reg+REASS_INTR_STATUS_REG) & 0xffff;
1227 state = readl(iadev->reass_reg + STATE_REG) & 0xffff;
1232 state = readl(iadev->reass_reg + STATE_REG) & 0xffff;
1248 writew( ~(RX_FREEQ_EMPT|RX_EXCP_RCVD),iadev->reass_reg+REASS_MASK_REG);
1364 state = readl(iadev->reass_reg + STATE_REG) & 0xffff;
1366 state = readl(iadev->reass_reg + REASS_MASK_REG) & 0xffff;
1368 iadev->reass_reg+REASS_MASK_REG);
1460 writew(0xffff, iadev->reass_reg+REASS_MASK_REG);
1461 writew(0, iadev->reass_reg+MODE_REG);
1462 writew(RESET_REASS, iadev->reass_reg+REASS_COMMAND_REG);
1478 writew(RX_DESC_BASE >> 16, iadev->reass_reg+REASS_DESC_BASE);
1480 writew(iadev->rx_buf_sz, iadev->reass_reg+BUF_SIZE);
1498 writew(i >> 16, iadev->reass_reg+REASS_QUEUE_BASE);
1499 writew(i, iadev->reass_reg+FREEQ_ST_ADR);
1501 iadev->reass_reg+FREEQ_ED_ADR);
1502 writew(i, iadev->reass_reg+FREEQ_RD_PTR);
1504 iadev->reass_reg+FREEQ_WR_PTR);
1506 freeq_st_adr = readw(iadev->reass_reg+FREEQ_ST_ADR);
1516 writew(i, iadev->reass_reg+PCQ_ST_ADR);
1517 writew(i+iadev->num_vc*sizeof(u_short), iadev->reass_reg+PCQ_ED_ADR);
1518 writew(i, iadev->reass_reg+PCQ_RD_PTR);
1519 writew(i, iadev->reass_reg+PCQ_WR_PTR);
1523 writew(i, iadev->reass_reg+EXCP_Q_ST_ADR);
1525 iadev->reass_reg+EXCP_Q_ED_ADR);
1526 writew(i, iadev->reass_reg+EXCP_Q_RD_PTR);
1527 writew(i, iadev->reass_reg+EXCP_Q_WR_PTR);
1530 iadev->rfL.fdq_st = readw(iadev->reass_reg+FREEQ_ST_ADR) & 0xffff;
1531 iadev->rfL.fdq_ed = readw(iadev->reass_reg+FREEQ_ED_ADR) & 0xffff ;
1532 iadev->rfL.fdq_rd = readw(iadev->reass_reg+FREEQ_RD_PTR) & 0xffff;
1533 iadev->rfL.fdq_wr = readw(iadev->reass_reg+FREEQ_WR_PTR) & 0xffff;
1534 iadev->rfL.pcq_st = readw(iadev->reass_reg+PCQ_ST_ADR) & 0xffff;
1535 iadev->rfL.pcq_ed = readw(iadev->reass_reg+PCQ_ED_ADR) & 0xffff;
1536 iadev->rfL.pcq_rd = readw(iadev->reass_reg+PCQ_RD_PTR) & 0xffff;
1537 iadev->rfL.pcq_wr = readw(iadev->reass_reg+PCQ_WR_PTR) & 0xffff;
1552 writew((i >> 3), iadev->reass_reg+REASS_TABLE_BASE);
1565 writew(((i>>3) & 0xfff8) | vcsize_sel, iadev->reass_reg+VC_LKUP_BASE);
1580 writew(i >> 3, iadev->reass_reg+ABR_LKUP_BASE);
1595 writew(0xff00, iadev->reass_reg+VP_FILTER);
1596 writew(0, iadev->reass_reg+XTRA_RM_OFFSET);
1597 writew(0x1, iadev->reass_reg+PROTOCOL_ID);
1603 writew(0xF6F8, iadev->reass_reg+PKT_TM_CNT );
1608 writew(i, iadev->reass_reg+TMOUT_RANGE);
1615 readw(iadev->reass_reg+REASS_INTR_STATUS_REG);
1618 writew(~(RX_FREEQ_EMPT|RX_PKT_RCVD), iadev->reass_reg+REASS_MASK_REG);
1633 writew(R_ONLINE, iadev->reass_reg+MODE_REG);
2390 iadev->reass_reg = base + REASS_BASE;
2401 iadev->reg,iadev->seg_reg,iadev->reass_reg,
2428 iadev->rx_cell_cnt += readw(iadev->reass_reg+CELL_CTR0)&0xffff;
2429 iadev->rx_cell_cnt += (readw(iadev->reass_reg+CELL_CTR1) & 0xffff) << 16;
2430 iadev->drop_rxpkt += readw(iadev->reass_reg + DRP_PKT_CNTR ) & 0xffff;
2431 iadev->drop_rxcell += readw(iadev->reass_reg + ERR_CNTR) & 0xffff;
2787 if(put_user((u16)(readl(iadev->reass_reg+i) & 0xffff), tmps)) return -EFAULT;
2804 ((u_int *)rfL)[i] = readl(iadev->reass_reg + i) & 0xffff;
2853 iadev->reass_reg+REASS_MASK_REG);