117 static int winbond = 1;  variable
119 static int winbond;  variable
121 module_param(winbond, int, 0);
122 MODULE_PARM_DESC(winbond,
902 	if (winbond && (probe->port == 0x1F0 || probe->port == 0x170)) {  in probe_chip_type()
903 		u8 reg = winbond_readcfg(winbond, 0x81);  in probe_chip_type()
905 		winbond_writecfg(winbond, 0x81, reg);  in probe_chip_type()
906 		reg = winbond_readcfg(winbond, 0x83);  in probe_chip_type()
908 		winbond_writecfg(winbond, 0x83, reg);  in probe_chip_type()
909 		reg = winbond_readcfg(winbond, 0x85);  in probe_chip_type()
911 		winbond_writecfg(winbond, 0x85, reg);  in probe_chip_type()
913 		reg = winbond_readcfg(winbond, 0x81);  in probe_chip_type()
1240 	if (winbond == 1)  in legacy_init()
1241 		winbond = 0x130;	/* Default port, alt is 1B0 */  in legacy_init()