Lines Matching refs:CFG_BASE

572 	prop->cfg_base_address = CFG_BASE;  in gaudi_set_fixed_properties()
661 prop->pcie_aux_dbi_reg_addr = CFG_BASE + mmPCIE_AUX_DBI; in gaudi_set_fixed_properties()
718 (CFG_BASE - SPI_FLASH_BASE_ADDR); in gaudi_pci_bars_map()
847 rc = hl_pci_elbi_read(hdev, CFG_BASE + mmCPU_BOOT_DEV_STS0, in gaudi_early_init()
1813 region->region_base = CFG_BASE; in gaudi_set_pci_memory_regions()
1815 region->offset_in_bar = CFG_BASE - SPI_FLASH_BASE_ADDR; in gaudi_set_pci_memory_regions()
2556 mtr_base_en_lo = lower_32_bits(CFG_BASE + in gaudi_init_pci_dma_qman()
2558 mtr_base_en_hi = upper_32_bits(CFG_BASE + in gaudi_init_pci_dma_qman()
2560 so_base_en_lo = lower_32_bits(CFG_BASE + in gaudi_init_pci_dma_qman()
2562 so_base_en_hi = upper_32_bits(CFG_BASE + in gaudi_init_pci_dma_qman()
2564 mtr_base_ws_lo = lower_32_bits(CFG_BASE + in gaudi_init_pci_dma_qman()
2566 mtr_base_ws_hi = upper_32_bits(CFG_BASE + in gaudi_init_pci_dma_qman()
2568 so_base_ws_lo = lower_32_bits(CFG_BASE + in gaudi_init_pci_dma_qman()
2570 so_base_ws_hi = upper_32_bits(CFG_BASE + in gaudi_init_pci_dma_qman()
2614 lower_32_bits(CFG_BASE + irq_handler_offset)); in gaudi_init_pci_dma_qman()
2616 upper_32_bits(CFG_BASE + irq_handler_offset)); in gaudi_init_pci_dma_qman()
2661 lower_32_bits(CFG_BASE + irq_handler_offset)); in gaudi_init_dma_core()
2663 upper_32_bits(CFG_BASE + irq_handler_offset)); in gaudi_init_dma_core()
2736 mtr_base_en_lo = lower_32_bits(CFG_BASE + in gaudi_init_hbm_dma_qman()
2738 mtr_base_en_hi = upper_32_bits(CFG_BASE + in gaudi_init_hbm_dma_qman()
2740 so_base_en_lo = lower_32_bits(CFG_BASE + in gaudi_init_hbm_dma_qman()
2742 so_base_en_hi = upper_32_bits(CFG_BASE + in gaudi_init_hbm_dma_qman()
2744 mtr_base_ws_lo = lower_32_bits(CFG_BASE + in gaudi_init_hbm_dma_qman()
2746 mtr_base_ws_hi = upper_32_bits(CFG_BASE + in gaudi_init_hbm_dma_qman()
2748 so_base_ws_lo = lower_32_bits(CFG_BASE + in gaudi_init_hbm_dma_qman()
2750 so_base_ws_hi = upper_32_bits(CFG_BASE + in gaudi_init_hbm_dma_qman()
2792 lower_32_bits(CFG_BASE + irq_handler_offset)); in gaudi_init_hbm_dma_qman()
2794 upper_32_bits(CFG_BASE + irq_handler_offset)); in gaudi_init_hbm_dma_qman()
2877 mtr_base_lo = lower_32_bits(CFG_BASE + in gaudi_init_mme_qman()
2879 mtr_base_hi = upper_32_bits(CFG_BASE + in gaudi_init_mme_qman()
2881 so_base_lo = lower_32_bits(CFG_BASE + in gaudi_init_mme_qman()
2883 so_base_hi = upper_32_bits(CFG_BASE + in gaudi_init_mme_qman()
2928 lower_32_bits(CFG_BASE + irq_handler_offset)); in gaudi_init_mme_qman()
2930 upper_32_bits(CFG_BASE + irq_handler_offset)); in gaudi_init_mme_qman()
3002 mtr_base_en_lo = lower_32_bits(CFG_BASE + in gaudi_init_tpc_qman()
3004 mtr_base_en_hi = upper_32_bits(CFG_BASE + in gaudi_init_tpc_qman()
3006 so_base_en_lo = lower_32_bits(CFG_BASE + in gaudi_init_tpc_qman()
3008 so_base_en_hi = upper_32_bits(CFG_BASE + in gaudi_init_tpc_qman()
3010 mtr_base_ws_lo = lower_32_bits(CFG_BASE + in gaudi_init_tpc_qman()
3012 mtr_base_ws_hi = upper_32_bits(CFG_BASE + in gaudi_init_tpc_qman()
3014 so_base_ws_lo = lower_32_bits(CFG_BASE + in gaudi_init_tpc_qman()
3016 so_base_ws_hi = upper_32_bits(CFG_BASE + in gaudi_init_tpc_qman()
3061 lower_32_bits(CFG_BASE + irq_handler_offset)); in gaudi_init_tpc_qman()
3063 upper_32_bits(CFG_BASE + irq_handler_offset)); in gaudi_init_tpc_qman()
3111 so_base_hi = upper_32_bits(CFG_BASE + in gaudi_init_tpc_qmans()
3153 mtr_base_en_lo = lower_32_bits((CFG_BASE & U32_MAX) + in gaudi_init_nic_qman()
3155 mtr_base_en_hi = upper_32_bits(CFG_BASE + in gaudi_init_nic_qman()
3157 so_base_en_lo = lower_32_bits((CFG_BASE & U32_MAX) + in gaudi_init_nic_qman()
3159 so_base_en_hi = upper_32_bits(CFG_BASE + in gaudi_init_nic_qman()
3161 mtr_base_ws_lo = lower_32_bits((CFG_BASE & U32_MAX) + in gaudi_init_nic_qman()
3163 mtr_base_ws_hi = upper_32_bits(CFG_BASE + in gaudi_init_nic_qman()
3165 so_base_ws_lo = lower_32_bits((CFG_BASE & U32_MAX) + in gaudi_init_nic_qman()
3167 so_base_ws_hi = upper_32_bits(CFG_BASE + in gaudi_init_nic_qman()
3211 lower_32_bits(CFG_BASE + irq_handler_offset)); in gaudi_init_nic_qman()
3213 upper_32_bits(CFG_BASE + irq_handler_offset)); in gaudi_init_nic_qman()
3584 WREG32(mmPSOC_TIMESTAMP_BASE - CFG_BASE, 0); in gaudi_enable_timestamp()
3587 WREG32(mmPSOC_TIMESTAMP_BASE - CFG_BASE + 0xC, 0); in gaudi_enable_timestamp()
3588 WREG32(mmPSOC_TIMESTAMP_BASE - CFG_BASE + 0x8, 0); in gaudi_enable_timestamp()
3591 WREG32(mmPSOC_TIMESTAMP_BASE - CFG_BASE, 1); in gaudi_enable_timestamp()
3597 WREG32(mmPSOC_TIMESTAMP_BASE - CFG_BASE, 0); in gaudi_disable_timestamp()
5560 cq_pkt->addr = cpu_to_le64(CFG_BASE + msi_addr); in gaudi_add_end_of_cb_packets()
5716 base_addr = CFG_BASE + mmSYNC_MNGR_E_N_SYNC_MNGR_OBJS_SOB_OBJ_0; in gaudi_restore_sm_registers()
5724 base_addr = CFG_BASE + mmSYNC_MNGR_E_S_SYNC_MNGR_OBJS_SOB_OBJ_0; in gaudi_restore_sm_registers()
5732 base_addr = CFG_BASE + mmSYNC_MNGR_W_N_SYNC_MNGR_OBJS_SOB_OBJ_0; in gaudi_restore_sm_registers()
5740 base_addr = CFG_BASE + mmSYNC_MNGR_E_N_SYNC_MNGR_OBJS_MON_STATUS_0; in gaudi_restore_sm_registers()
5748 base_addr = CFG_BASE + mmSYNC_MNGR_E_S_SYNC_MNGR_OBJS_MON_STATUS_0; in gaudi_restore_sm_registers()
5756 base_addr = CFG_BASE + mmSYNC_MNGR_W_N_SYNC_MNGR_OBJS_MON_STATUS_0; in gaudi_restore_sm_registers()
5764 base_addr = CFG_BASE + mmSYNC_MNGR_W_S_SYNC_MNGR_OBJS_SOB_OBJ_0 + in gaudi_restore_sm_registers()
5773 base_addr = CFG_BASE + mmSYNC_MNGR_W_S_SYNC_MNGR_OBJS_MON_STATUS_0 + in gaudi_restore_sm_registers()
5792 u64 sob_addr = CFG_BASE + in gaudi_restore_dma_registers()
6725 if (params->block_address >= CFG_BASE) in gaudi_extract_ecc_info()
6726 params->block_address -= CFG_BASE; in gaudi_extract_ecc_info()
8225 lower_32_bits(CFG_BASE + in gaudi_run_tpc_kernel()
8683 *addr = CFG_BASE + offset; in gaudi_get_fence_addr()
8830 reg_value -= lower_32_bits(CFG_BASE); in gaudi_add_sync_to_engine_map_entry()
9010 fence_cnt = base_offset + CFG_BASE + in gaudi_print_fences_single_engine()