Lines Matching +full:required +full:- +full:for +full:- +full:hardware +full:- +full:jobs
1 /* SPDX-License-Identifier: GPL-2.0
3 * Copyright 2016-2022 HabanaLabs, Ltd.
19 #include <linux/dma-direction.h>
28 #include <linux/io-64-nonatomic-lo-hi.h>
30 #include <linux/dma-buf.h>
42 * bits[63:59] - Encode mmap type
43 * bits[45:0] - mmap offset value
48 #define HL_MMAP_TYPE_SHIFT (59 - PAGE_SHIFT)
61 * In device fini, wait 10 minutes for user processes to be terminated after we kill them.
94 /* Default value for device reset trigger , an invalid value */
107 * enum hl_mmu_page_table_location - mmu page table location
108 * @MMU_DR_PGT: page-table is located on device DRAM.
109 * @MMU_HR_PGT: page-table is located on host memory.
110 * @MMU_NUM_PGT_LOCATIONS: number of page-table locations currently supported.
113 MMU_DR_PGT = 0, /* device-dram-resident MMU PGT */
132 #define IS_POWER_OF_2(n) (n != 0 && ((n & (n - 1)) == 0))
160 * - HL_DRV_RESET_HARD
164 * - HL_DRV_RESET_FROM_RESET_THR
165 * Set if the caller is the hard-reset thread
167 * - HL_DRV_RESET_HEARTBEAT
170 * - HL_DRV_RESET_TDR
173 * - HL_DRV_RESET_DEV_RELEASE
176 * - HL_DRV_RESET_BYPASS_REQ_TO_FW
180 * - HL_DRV_RESET_FW_FATAL_ERR
183 * - HL_DRV_RESET_DELAY
186 * - HL_DRV_RESET_FROM_WD_THR
212 #define HL_BLOCK_GLBL_SEC_SIZE (HL_BLOCK_SIZE - HL_BLOCK_GLBL_SEC_OFFS)
223 * struct iterate_module_ctx - HW module iterator
226 * @rc: return code for optional use of iterator/iterator-caller
230 * callback for the HW module iterator
234 * @offset: current HW module instance offset from the 1-st HW module instance
235 * in the 1-st block
251 * struct hl_gen_wait_properties - properties for generating a wait CB
256 * @sob_val: SOB value to wait for
271 * struct pgt_info - MMU hop page info.
272 * @node: hash linked-list node for the pgts on host (shadow pgts for device resident MMU and
273 * actual pgts for host resident MMU).
276 * @shadow_addr: shadow hop in the host for device resident MMU.
278 * @num_of_ptes: indicates how many ptes are used in the pgt. used only for dynamically
282 * pgts will be stored on host memory) or on host memory (in which case no shadow is required).
299 * enum hl_pci_match_mode - pci match mode per region
309 * enum hl_fw_component - F/W components to read version through registers.
321 * enum hl_fw_types - F/W types present in the system
323 * @FW_TYPE_LINUX: Linux image for device CPU
324 * @FW_TYPE_BOOT_CPU: Boot image for device CPU
325 * @FW_TYPE_PREBOOT_CPU: Indicates pre-loaded CPUs are present in the system
327 * @FW_TYPE_ALL_TYPES: Mask for all types
339 * enum hl_queue_type - Supported QUEUE types.
345 * @QUEUE_TYPE_CPU: S/W queue for communication with the device's CPU.
346 * @QUEUE_TYPE_HW: queue of DMA and compute engines jobs, for which completion
370 * struct hl_inbound_pci_region - inbound region descriptor
371 * @mode: pci match mode for this region
386 * struct hl_outbound_pci_region - outbound region descriptor
396 * enum queue_cb_alloc_flags - Indicates queue support for CBs that
407 * struct hl_hw_sob - H/W SOB info.
431 * struct hw_queue_properties - queue information.
435 * a CB handle can be provided for jobs on this queue.
453 * enum vm_type - virtual memory mapping request information.
463 * enum mmu_op_flags - mmu operation relevant information.
478 * enum hl_device_hw_state - H/W device state. use this to understand whether
492 * struct hl_mmu_properties - ASIC specific MMU address translation properties.
498 * @pgt_size: size for page tables.
499 * @supported_pages_mask: bitmask for supported page size (relevant only for MMUs
504 * @hop0_tables_total_size: total size for all HOP0 tables.
524 * struct hl_hints_range - hint addresses reserved va range.
534 * struct asic_fixed_properties - ASIC specific immutable properties.
538 * @cpucp_info: received various information from CPU-CP regarding the H/W, e.g.
540 * @uboot_ver: F/W U-boot version.
544 * @pmmu_huge: PCI (host) MMU address translation properties for memory
552 * @sram_user_base_address - SRAM physical start address for user access.
555 * @dram_user_base_address: DRAM physical start address for user access.
571 * for hints validity check.
577 * @host_base_address: host physical start address for host DMA from device
578 * @host_end_address: host physical end address for host DMA from device
580 * @engine_core_interrupt_reg_addr: interrupt register address for engine core to use
588 * @dram_page_size: page size for MMU DRAM allocation.
629 * 1- enabled, 0- isolated.
631 * 1- faulty cluster, 0- good cluster.
633 * 1- enabled, 0- isolated.
634 * @device_mem_alloc_default_page_size: may be different than dram_page_size only for ASICs for
644 * @collective_first_sob: first sync object available for collective use
645 * @collective_first_mon: first monitor available for collective use
646 * @sync_stream_first_sob: first sync object available for sync stream use
647 * @sync_stream_first_mon: first monitor available for sync stream use
648 * @first_available_user_sob: first sob available for the user
649 * @first_available_user_mon: first monitor available for the user
650 * @first_available_user_interrupt: first available interrupt reserved for the user
651 * @first_available_cq: first available CQ for the user.
654 * @tpc_interrupt_id: interrupt id for TPC to use in order to raise events towards the host.
655 * @eq_interrupt_id: interrupt id for EQ, uses to synchronize EQ interrupts in hard-reset.
660 * @completion_mode: 0 - job based completion, 1 - cs based completion
661 * @mme_master_slave_mode: 0 - Each MME works independently, 1 - MME works
677 * @use_get_power_for_reset_history: To support backward compatibility for Goya
679 * @supports_compute_reset: is a reset which is not a hard-reset supported by this asic.
682 * in inference ASICs, as there is no real-world
683 * use-case of doing soft-reset in training (due
686 * @configurable_stop_on_err: is stop-on-error option configurable via debugfs.
689 * @dma_mask: the dma mask to be set for this device
814 * struct hl_fence - software synchronization primitive
816 * @refcount: refcount for this fence
837 * struct hl_cs_compl - command submission completion object.
844 * @type: type of the CS - signal/wait.
868 * struct hl_ts_buff - describes a timestamp buffer.
882 * struct hl_mem_mgr - describes unified memory manager for mappable memory chunks.
894 * struct hl_mmap_mem_buf_behavior - describes unified memory manager buffer behavior
895 * @topic: string identifier used for logging
913 * struct hl_mmap_mem_buf - describes a single unified memory buffer
916 * @refcount: reference counter for buffer users
937 * struct hl_cb - describes a Command Buffer.
995 /* Host <-> CPU-CP shared memory size */
999 * struct hl_sync_stream_properties -
1002 * @next_sob_val: the next value to use for the currently used SOB.
1026 * struct hl_encaps_signals_mgr - describes sync stream encapsulated signals
1037 * struct hl_hw_queue - describes a H/W transport queue.
1038 * @shadow_queue: pointer to a shadow queue that holds pointers to jobs.
1047 * @cq_id: the id for the corresponding CQ for this H/W queue.
1072 * struct hl_cq - describes a completion queue
1101 * struct hl_user_interrupt - holds user interrupt information
1119 * struct timestamp_reg_free_node - holds the timestamp registration free objects node
1130 /* struct timestamp_reg_work_obj - holds the timestamp registration free objects job
1135 * @free_obj_head: list of free jobs nodes (node type timestamp_reg_free_node)
1143 /* struct timestamp_reg_info - holds the timestamp registration related data.
1163 * struct hl_user_pending_interrupt - holds a context to a user thread
1167 * @fence: hl fence object for interrupt completion
1170 * handler for target value comparison
1181 * struct hl_eq - describes the event queue (single one per device)
1189 * previous one. This is for backward compatibility with older
1202 * struct hl_dec - describes a decoder sw instance.
1216 * enum hl_asic_type - supported ASIC types.
1218 * @ASIC_GOYA: Goya device (HL-1000).
1219 * @ASIC_GAUDI: Gaudi device (HL-2000).
1220 * @ASIC_GAUDI_SEC: Gaudi secured device (HL-2000).
1236 * enum hl_pm_mng_profile - power management profile.
1248 * enum hl_pll_frequency - PLL frequency.
1286 * struct pci_mem_region - describe memory region in a PCI bar
1304 * struct static_fw_load_mgr - static FW load manager
1307 * @kmd_msg_to_cpu_reg: register address for KDM->CPU messages
1308 * @cpu_cmd_status_to_host_reg: register address for CPU command status response
1316 * @sram_offset_mask: mask for getting offset into the SRAM
1336 * struct fw_response - FW response to LKD command
1348 * struct dynamic_fw_load_mgr - dynamic FW load manager
1353 * @wait_for_bl_timeout: timeout for waiting for boot loader to respond
1366 * struct pre_fw_load_props - needed properties for pre-FW load
1372 * @wait_for_preboot_timeout: timeout to poll for preboot ready
1384 * struct fw_image_props - properties of FW image
1396 * struct fw_load_mgr - manager FW loading process
1397 * @dynamic_loader: specific structure for dynamic load
1398 * @static_loader: specific structure for static load
1399 * @pre_fw_load_props: parameter for pre FW load
1429 * struct engines_data - asic engines data
1430 * @buf: buffer for engines data in ascii
1441 * struct hl_asic_funcs - ASIC specific functions that are can be called from
1445 * @late_init: sets up late driver/hw state (post hw_init) - Optional.
1446 * @late_fini: tears down what was done in late_init (pre hw_fini) - Optional.
1451 * @halt_engines: halt engines, needed for reset sequence. This also disables
1454 * @suspend: handles IP specific H/W or SW changes for suspend.
1455 * @resume: handles IP specific H/W or SW changes for resume.
1458 * @pqe_write: Write the PQ entry to the PQ. This is ASIC-specific
1474 * @test_queues: run simple test on all queues for sanity check.
1482 * @hl_dma_unmap_sgtable: DMA unmap scatter-gather table.
1484 * @asic_dma_map_sgtable: DMA map scatter-gather table.
1489 * @debugfs_read_dma: debug interface for reading up to 2MB from the device's
1492 * @handle_eqe: handle event queue entry (IRQ) from CPU-CP.
1498 * @mmu_invalidate_cache_range: flush specific MMU STLB cache lines with ASID-VA-size mask.
1499 * @mmu_prefetch_cache_range: pre-fetch specific MMU STLB cache lines with ASID-VA-size mask.
1500 * @send_heartbeat: send is-alive packet to CPU-CP and verify response.
1501 * @debug_coresight: perform certain actions on Coresight for debugging.
1512 * then the timeout is the default timeout for the specific
1517 * @rreg: Read a register. Needed for simulator support.
1518 * @wreg: Write a register. Needed for simulator support.
1522 * @pre_schedule_cs: Perform pre-CS-scheduling operations.
1535 * and place them in the relevant cs jobs
1536 * @collective_wait_create_jobs: allocate collective wait cs jobs
1540 * @descramble_addr: Routine to de-scramble the address prior of
1545 * a valid pointer for it
1550 * after every hard-reset of the device
1552 * @get_msi_info: Retrieve asic-specific MSI ID of the f/w async event
1555 * @init_firmware_preload_params: initialize pre FW-load parameters.
1556 * @init_firmware_loader: initialize data for FW loader.
1558 * @state_dump_init: initialize constants required for state dump
1569 * @set_binning_masks: set binning/enable masks for all relevant components.
1721 * enum hl_va_range_type - virtual address range type.
1734 * struct hl_va_range - virtual addresses range.
1736 * @list: list of virtual addresses blocks available for mappings.
1750 * struct hl_cs_counters_atomic - command submission counters
1755 * @max_cs_in_flight_drop_cnt: dropped due to maximum CS in-flight
1768 * struct hl_dmabuf_priv - a dma-buf private object.
1769 * @dmabuf: pointer to dma-buf object.
1770 * @ctx: pointer to the dma-buf owner's context.
1771 * @phys_pg_pack: pointer to physical page pack if the dma-buf was exported
1775 * if phys_pg_pack is NULL (dma-buf was exported from address).
1789 * struct hl_cs_outcome - represents a single completed CS outcome
1805 * struct hl_cs_outcome_store - represents a limited store of completed CS outcomes
1809 * @nodes_pool: a static pool of pre-allocated outcome objects
1821 * struct hl_ctx - user/kernel context.
1825 * @hr_mmu_phys_hash: if host-resident MMU is used, holds a mapping from
1826 * MMU-hop-page physical address to its host-resident
1830 * @refcount: reference counter for the context. Context is released only when
1834 * command submissions for a long time after CS id wraparound.
1835 * @va_range: holds available virtual addresses for host and dram mappings.
1841 * @cb_va_pool: device VA pool for command buffers which are mapped to the
1844 * @cb_va_pool_base: the base address for the device VA pool
1845 * @cs_sequence: sequence number for CS. Value is assigned to a CS and passed
1848 * @dram_default_hops: array that holds all hops addresses needed for default
1860 * @handle: context's opaque handle for user
1891 * struct hl_ctx_mgr - for handling multiple contexts.
1906 * struct hl_userptr - memory mapping chunk information
1908 * @job_node: linked-list node for hanging the object on the Job's list.
1911 * @sgt: pointer to the scatter-gather table that holds the pages.
1912 * @dir: for DMA unmapping, the direction must be supplied, so save it.
1915 * @addr: user-space virtual address of the start of the memory area.
1934 * struct hl_cs - command submission.
1935 * @jobs_in_queue_cnt: per each queue, maintain counter of submitted jobs.
1937 * @job_list: list of the CS's jobs in the various queues.
1938 * @job_lock: spinlock for the CS's jobs list. Needed for free_job.
1939 * @refcount: reference counter for usage of the CS.
1944 * @work_tdr: delayed work node for TDR.
1955 * @jobs_cnt: counter of submitted jobs on all queues.
1956 * @encaps_sig_hdl_id: encaps signals handle id, set for the first staged cs.
1964 * @tdr_active: true if TDR was activated for this CS (to prevent
1970 * timeout for this CS.
2014 * struct hl_cs_job - command submission job.
2015 * @cs_node: the node to hang on the CS jobs list.
2021 * @userptr_list: linked-list of userptr mappings that belong to this job and
2022 * wait for completion.
2023 * @debugfs_list: node in debugfs list of command submission jobs.
2024 * @refcount: reference counter for usage of the CS job.
2034 * handle to a kernel-allocated CB object, false
2039 * MSG_PROT packets. Relevant only for GAUDI as GOYA doesn't
2064 * struct hl_cs_parser - command submission parser properties.
2068 * @job_userptr_list: linked-list of userptr mappings that belong to the related
2069 * job and wait for completion.
2078 * handle to a kernel-allocated CB object, false
2083 * MSG_PROT packets. Relevant only for GAUDI as GOYA doesn't
2086 * @completion: true if we need completion for this CS.
2109 * struct hl_vm_hash_node - hash element from virtual address to virtual
2114 * @handle: memory handle for device memory allocation.
2127 * struct hl_vm_hw_block_list_node - list element from user virtual address to
2133 * @mapped_size: size of the block which is mapped. May change if partial un-mappings are done.
2146 * struct hl_vm_phys_pg_pack - physical page pack.
2181 * struct hl_vm_va_block - virtual range block information.
2195 * struct hl_vm - virtual memory manager for MMU.
2196 * @dram_pg_pool: pool for DRAM physical pages of 2MB.
2197 * @dram_pg_pool_refcount: reference counter for the pool usage.
2217 * struct hl_debug_params - Coresight debug parameters.
2235 * struct hl_notifier_event - holds the notifier data structure
2251 * struct hl_fpriv - process information stored in FD private data.
2255 * @ctx: current executing context. TODO: remove for multiple ctx per process
2256 * @ctx_mgr: context manager to handle multiple context for this FD.
2257 * @mem_mgr: manager descriptor for memory exportable via mmap
2262 * @restore_phase_mutex: lock for context switch and restore phase.
2263 * @ctx_lock: protects the pointer to current executing context pointer. TODO: remove for multiple
2287 * struct hl_info_list - debugfs file ops.
2300 * struct hl_debugfs_entry - debugfs dentry wrapper.
2310 * struct hl_dbg_device_entry - ASIC specific debugfs manager.
2320 * @cs_job_list: list of available CB jobs.
2333 * @userptr_lookup: the target user ptr to look up for on demand.
2336 * @i2c_bus: generic u8 debugfs file for bus value to use in i2c_data_read.
2337 * @i2c_addr: generic u8 debugfs file for address value to use in i2c_data_read.
2338 * @i2c_reg: generic u8 debugfs file for register value to use in i2c_data_read.
2339 * @i2c_len: generic u8 debugfs file for length value to use in i2c_data_read.
2374 * struct hl_hw_obj_name_entry - single hw object name, member of
2427 * struct hl_mon_state_dump - represents a state dump of a single monitor
2445 * struct hl_sync_to_engine_map_entry - sync object id to engine mapping entry
2458 * struct hl_sync_to_engine_map - maps sync object id to associated engine id
2467 * struct hl_state_dump_specs_funcs - virtual functions used by the state dump
2489 * struct hl_state_dump_specs - defines ASIC known hw objects names
2492 * @funcs: virtual functions used for state dump
2493 * @sync_namager_names: readable names for sync manager if available (ex: N_E)
2494 * @props: pointer to a per asic const props array required for state dump
2525 #define RREG32(reg) hdev->asic_funcs->rreg(hdev, (reg))
2526 #define WREG32(reg, v) hdev->asic_funcs->wreg(hdev, (reg), (v))
2528 hdev->asic_funcs->rreg(hdev, (reg)))
2563 for (;;) { \
2588 __rc ? __rc : ((cond) ? 0 : -ETIMEDOUT); \
2601 * this is done both for efficiency and due to some registers are "clear on read".
2602 * TODO: use read from PCI bar in other places in the code (SW-91406)
2616 __rc = -EINVAL; \
2618 __elem_bitmask = BIT_ULL(arr_size) - 1; \
2619 for (;;) { \
2622 for (__arr_idx = 0; __arr_idx < (arr_size); __arr_idx++) { \
2642 __rc ? __rc : ((__elem_bitmask == 0) ? 0 : -ETIMEDOUT); \
2664 * be updated by host CPU. Required so host knows whether or not the memory
2665 * might need to be byte-swapped before returning value to caller.
2674 for (;;) { \
2691 (cond) ? 0 : -ETIMEDOUT; \
2698 p->address = base; \
2699 p->size = sz; \
2714 * struct hl_device_reset_work - reset work wrapper.
2726 * struct hl_mmu_hr_pgt_priv - used for holding per-device mmu host-resident
2727 * page-table internal information.
2728 * @mmu_pgt_pool: pool of page tables used by a host-resident MMU for
2730 * @mmu_asid_hop0: per-ASID array of host-resident hop0 tables.
2738 * struct hl_mmu_dr_pgt_priv - used for holding per-device mmu device-resident
2739 * page-table internal information.
2740 * @mmu_pgt_pool: pool of page tables used by MMU for allocating hops.
2749 * struct hl_mmu_priv - used for holding per-device mmu internal information.
2750 * @dr: information on the device-resident MMU, when exists.
2751 * @hr: information on the host-resident MMU, when exists.
2759 * struct hl_mmu_per_hop_info - A structure describing one TLB HOP and its entry
2773 * struct hl_mmu_hop_info - A structure describing the TLB hops and their
2774 * hop-entries that were created in order to translate a virtual address to a
2777 * address replaces the original virtual-address when mapped
2779 * @unscrambled_paddr: The un-scrambled physical address.
2780 * @hop_info: Array holding the per-hop information used for the translation.
2781 * @used_hops: The number of hops used for the translation.
2793 * struct hl_hr_mmu_funcs - Device related host resident MMU functions.
2794 * @get_hop0_pgt_info: get page table info structure for HOP0.
2795 * @get_pgt_info: get page table info structure for HOP other than HOP0.
2797 * @get_tlb_mapping_params: get mapping parameters needed for getting TLB info for specific mapping.
2809 * struct hl_mmu_funcs - Device related MMU functions.
2812 * @ctx_init: Initialize a context for using the MMU module.
2814 * @map: maps a virtual address to physical address for a context.
2819 * @get_tlb_info: returns the list of hops and hop-entries used that were
2840 * struct hl_prefetch_work - prefetch work structure handler
2843 * @va: virtual address to pre-fetch.
2844 * @size: pre-fetch size.
2846 * @asid: ASID for maintenance operation.
2864 * struct multi_cs_completion - multi CS wait completion.
2866 * @lock: spinlock for the completion structure
2867 * @timestamp: timestamp for the multi-CS completion
2868 * @stream_master_qid_map: bitmap of all stream masters on which the multi-CS
2881 * struct multi_cs_data - internal data for multi CS call
2885 * @timeout_jiffies: timeout in jiffies for waiting for CS to complete
2887 * @wait_status: wait for CS status
2888 * @completion_bitmap: bitmap of completed CSs (1- completed, otherwise 0)
2890 * @gone_cs: indication of gone CS (1- there was gone CS, otherwise 0)
2891 * @update_ts: update timestamp. 1- update the timestamp, otherwise 0.
2907 * struct hl_clk_throttle_timestamp - current/last clock throttling timestamp
2917 * struct hl_clk_throttle - keeps current/last clock throttling timestamps
2933 * struct user_mapped_block - describes a hw block allowed to be mmapped by user
2935 * @size: allowed size for mmap
2943 * struct cs_timeout_info - info of last CS timeout occurred.
2945 * @write_enable: if set writing to CS parameters in the structure is enabled. otherwise - disabled,
2958 * struct undefined_opcode_info - info about last undefined opcode error
2962 * filled with values, it means the execution was in Lower-CP.
2965 * @cb_addr_streams_len: num of streams - actual len of cb_addr_streams array.
2967 * in Upper-CP (specific stream) and equal to 4 in case
2968 * of undefined opcode in Lower-CP.
2969 * @engine_id: engine-id that the error occurred on
2971 * MAX_QMAN_STREAMS_INFO it means the error occurred on a Lower-CP.
2988 * struct page_fault_info - page fault information.
2992 * @page_fault_detected: if set as 1, then a page-fault was discovered for the
2993 * first time after the driver has finished booting-up.
2994 * Since we're looking for the page-fault's root cause,
2995 * we don't care of the others that might follow it-
3008 * struct razwi_info - RAZWI information.
3010 * @razwi_detected: if set as 1, then a RAZWI was discovered for the
3011 * first time after the driver has finished booting-up.
3012 * Since we're looking for the RAZWI's root cause,
3013 * we don't care of the others that might follow it-
3024 * struct hw_err_info - HW error information.
3026 * @event_detected: if set as 1, then a HW event was discovered for the
3027 * first time after the driver has finished booting-up.
3028 * currently we assume that only fatal events (that require hard-reset) are
3041 * struct fw_err_info - FW error information.
3043 * @event_detected: if set as 1, then a FW event was discovered for the
3044 * first time after the driver has finished booting-up.
3045 * currently we assume that only fatal events (that require hard-reset) are
3058 * struct hl_error_info - holds information collected during an error.
3063 * @hw_err: (fatal) hardware error information.
3076 * struct hl_reset_info - holds current device reset information.
3083 * @in_compute_reset: Device is currently in reset but not in hard-reset.
3093 * @skip_reset_on_timeout: Skip device reset if CS has timed out, wait for it to
3114 * struct hl_device - habanalabs device structure.
3117 * (required only for PCI address match mode)
3122 * @cdev_ctrl: char device for control operations only (INFO IOCTL)
3124 * @dev_ctrl: related kernel device structure for the control device
3125 * @work_heartbeat: delayed work for CPU-CP is-alive check.
3135 * @tpc_interrupt: single TPC interrupt for all TPCs.
3136 * @unexpected_error_interrupt: single interrupt for unexpected user error indication.
3137 * @common_user_cq_interrupt: common user CQ interrupt for all user CQ interrupts.
3140 * @common_decoder_interrupt: common decoder interrupt for all user decoder interrupts.
3143 * @cq_wq: work queues of completion queues for executing work in process
3145 * @eq_wq: work queue of event queue for executing work in process context.
3146 * @cs_cmplt_wq: work queue of CS completions for executing work in process
3148 * @ts_free_obj_wq: work queue for timestamp registration objects release.
3149 * @prefetch_wq: work queue for MMU pre-fetch operations.
3150 * @reset_wq: work queue for device reset procedure.
3153 * @cs_mirror_list: CS mirror list for TDR.
3155 * @kernel_mem_mgr: memory manager for memory buffers with lifespan of driver.
3156 * @event_queue: event queue for IRQ from CPU-CP.
3157 * @dma_pool: DMA pool for small allocations.
3158 * @cpu_accessible_dma_mem: Host <-> CPU-CP shared memory CPU address.
3159 * @cpu_accessible_dma_address: Host <-> CPU-CP shared memory DMA address.
3160 * @cpu_accessible_dma_pool: Host <-> CPU-CP shared memory pool.
3163 * @send_cpu_message_lock: enforces only one message in Host <-> CPU-CP queue.
3164 * @debug_lock: protects critical section of setting debug mode for device
3174 * @vm: virtual memory manager for MMU.
3192 * @mmu_priv: device-specific MMU data.
3193 * @mmu_func: device-related MMU functions.
3198 * @multi_cs_completion: array of multi-CS completion.
3207 * @fw_sw_sub_minor_ver: the sub-minor of current loaded preboot SW version.
3212 * value is saved so in case of hard-reset, the driver will restore
3213 * this value and update the F/W after the re-initialization
3228 * used for CPU boot status
3230 * used for COMMs protocols cmds(COMMS_STS_*)
3232 * drams are binned-out
3234 * tpc engines are binned-out
3235 * @dmabuf_export_cnt: number of dma-buf exporting.
3241 * indicates which decoder engines are binned-out
3243 * indicates which edma engines are binned-out
3246 * which indicates which rotator engines are binned-out(Gaudi3 and above).
3249 * @cdev_idx: char device index. Used for setting its name.
3250 * @cpu_pci_msb_addr: 50-bit extension bits for the device CPU's 40-bit
3260 * such as context-switch, context close, page free, etc.
3261 * @pmmu_huge_range: is a different virtual addresses range used for PMMU with
3271 * @sync_stream_queue_idx: helper index for sync stream queues initialization.
3272 * @collective_mon_idx: helper index for collective initialization
3278 * waiting for the reset thread to finish
3282 * protocol will throw an error. Relevant only for
3284 * @supports_wait_for_multi_cs: true if wait for multi CS is supported
3290 * @supports_ctx_switch: true if a ctx switch is required upon first submission.
3292 * @nic_ports_mask: Controls which NIC ports are enabled. Used only for testing.
3294 * stages and sometimes we want to stop at a certain stage. Used only for testing.
3295 * @mmu_disable: Disable the device MMU(s). Used only for testing.
3296 * @cpu_queues_enable: Whether to enable queues communication vs. the f/w. Used only for testing.
3297 * @pldm: Whether we are running in Palladium environment. Used only for testing.
3298 * @hard_reset_on_fw_events: Whether to do device hard-reset when a fatal event is received from
3299 * the f/w. Used only for testing.
3300 * @bmc_enable: Whether we are running in a box with BMC. Used only for testing.
3302 * Used only for testing.
3304 * that the f/w is always alive. Used only for testing.
3455 /* Parameters for bring-up to be upstreamed */
3469 * struct hl_cs_encaps_sig_handle - encapsulated signals handle structure
3494 * struct hl_info_fw_err_info - firmware error information structure
3512 * typedef hl_ioctl_t - typedef for ioctl function in the driver
3517 * Return: 0 for success, negative value for error
3522 * struct hl_ioctl_desc - describes an IOCTL entry of the driver.
3524 * @func: pointer to the driver's function that should be called for this IOCTL.
3533 if (hdev->fw_sw_major_ver < fw_sw_major) in hl_is_fw_sw_ver_below()
3535 if (hdev->fw_sw_major_ver > fw_sw_major) in hl_is_fw_sw_ver_below()
3537 if (hdev->fw_sw_minor_ver < fw_sw_minor) in hl_is_fw_sw_ver_below()
3547 * hl_get_sg_info() - get number of pages and the DMA address from SG list.
3559 return ((((*dma_addr) & (PAGE_SIZE - 1)) + sg_dma_len(sg)) + in hl_get_sg_info()
3560 (PAGE_SIZE - 1)) >> PAGE_SHIFT; in hl_get_sg_info()
3564 * hl_mem_area_inside_range() - Checks whether address+size are inside a range.
3586 * hl_mem_area_crosses_range() - Checks whether address+size crossing a range.
3598 u64 end_address = address + size - 1; in hl_mem_area_crosses_range()
3644 #define hl_pi_2_offset(pi) ((pi) & (HL_QUEUE_LENGTH - 1))