4129 	rsvd_check = &vcpu->arch.mmu->shadow_zero_check;  in get_mmio_spte()
4857 	struct rsvd_bits_validate *shadow_zero_check;  in reset_shadow_zero_bits_mask()  local
4862 	shadow_zero_check = &context->shadow_zero_check;  in reset_shadow_zero_bits_mask()
4863 	__reset_rsvds_bits_mask(shadow_zero_check, reserved_hpa_bits(),  in reset_shadow_zero_bits_mask()
4879 		shadow_zero_check->rsvd_bits_mask[0][i] |= shadow_me_mask;  in reset_shadow_zero_bits_mask()
4880 		shadow_zero_check->rsvd_bits_mask[1][i] |= shadow_me_mask;  in reset_shadow_zero_bits_mask()
4881 		shadow_zero_check->rsvd_bits_mask[0][i] &= ~shadow_me_value;  in reset_shadow_zero_bits_mask()
4882 		shadow_zero_check->rsvd_bits_mask[1][i] &= ~shadow_me_value;  in reset_shadow_zero_bits_mask()
4899 	struct rsvd_bits_validate *shadow_zero_check;  in reset_tdp_shadow_zero_bits_mask()  local
4902 	shadow_zero_check = &context->shadow_zero_check;  in reset_tdp_shadow_zero_bits_mask()
4905 		__reset_rsvds_bits_mask(shadow_zero_check, reserved_hpa_bits(),  in reset_tdp_shadow_zero_bits_mask()
4910 		__reset_rsvds_bits_mask_ept(shadow_zero_check,  in reset_tdp_shadow_zero_bits_mask()
4918 		shadow_zero_check->rsvd_bits_mask[0][i] &= ~shadow_me_mask;  in reset_tdp_shadow_zero_bits_mask()
4919 		shadow_zero_check->rsvd_bits_mask[1][i] &= ~shadow_me_mask;  in reset_tdp_shadow_zero_bits_mask()
4930 	__reset_rsvds_bits_mask_ept(&context->shadow_zero_check,  in reset_ept_shadow_zero_bits_mask()