Lines Matching +full:supervisor +full:- +full:mode +full:- +full:visible
1 // SPDX-License-Identifier: GPL-2.0-only
3 * Kernel-based Virtual Machine driver for Linux
5 * This module enables machines with Intel VT-x extensions to run virtual
64 int __read_mostly nx_huge_pages = -1;
100 * When setting this variable to true it enables Two-Dimensional-Paging
102 * 1. the guest-virtual to guest-physical
103 * 2. while doing 1. it walks guest-physical to host-physical
204 return !!(regs->reg & flag); \
226 return !!(mmu->cpu_role. base_or_ext . reg##_##name); \
239 return mmu->cpu_role.base.level > 0; in is_cr0_pg()
244 return !mmu->cpu_role.base.has_4_byte_gpte; in is_cr4_pae()
252 .efer = vcpu->arch.efer, in vcpu_to_role_regs()
266 if (IS_ENABLED(CONFIG_RETPOLINE) && mmu->get_guest_pgd == get_guest_cr3) in kvm_mmu_get_guest_pgd()
269 return mmu->get_guest_pgd(vcpu); in kvm_mmu_get_guest_pgd()
280 return -EOPNOTSUPP; in kvm_arch_flush_remote_tlbs_range()
293 kvm_flush_remote_tlbs_gfn(kvm, gfn, sp->role.level); in kvm_flush_remote_tlbs_sptep()
324 gen = kvm_vcpu_memslots(vcpu)->generation; in check_mmio_spte()
378 sp->clear_spte_count++; in count_spte_clear()
388 ssptep->spte_high = sspte.spte_high; in __set_spte()
397 WRITE_ONCE(ssptep->spte_low, sspte.spte_low); in __set_spte()
407 WRITE_ONCE(ssptep->spte_low, sspte.spte_low); in __update_clear_spte_fast()
415 ssptep->spte_high = sspte.spte_high; in __update_clear_spte_fast()
427 orig.spte_low = xchg(&ssptep->spte_low, sspte.spte_low); in __update_clear_spte_slow()
428 orig.spte_high = ssptep->spte_high; in __update_clear_spte_slow()
429 ssptep->spte_high = sspte.spte_high; in __update_clear_spte_slow()
441 * we need to protect against in-progress updates of the spte.
444 * for the high part of the spte. The race is fine for a present->non-present
445 * change (because the high part of the spte is ignored for non-present spte),
446 * but for a present->present change we must reread the spte.
448 * All such changes are done in two steps (present->non-present and
449 * non-present->present), hence it is enough to count the number of
450 * present->non-present updates: if it changed while reading the spte,
460 count = sp->clear_spte_count; in __get_spte_lockless()
463 spte.spte_low = orig->spte_low; in __get_spte_lockless()
466 spte.spte_high = orig->spte_high; in __get_spte_lockless()
469 if (unlikely(spte.spte_low != orig->spte_low || in __get_spte_lockless()
470 count != sp->clear_spte_count)) in __get_spte_lockless()
518 * Whenever an MMU-writable SPTE is overwritten with a read-only SPTE, remote
519 * TLBs must be flushed. Otherwise rmap_write_protect will find a read-only
533 * For the spte updated out of mmu-lock is safe, since in mmu_spte_update()
569 int level = sptep_to_sp(sptep)->role.level; in mmu_spte_clear_track_bits()
581 kvm_update_page_stats(kvm, level, -1); in mmu_spte_clear_track_bits()
627 clear_bit((ffs(shadow_accessed_mask) - 1), in mmu_spte_age()
646 return tdp_mmu_enabled && vcpu->arch.mmu->root_role.direct; in is_tdp_mmu_active()
655 * Prevent page table teardown by making any free-er wait during in walk_shadow_page_lockless_begin()
662 * to vcpu->mode. in walk_shadow_page_lockless_begin()
664 smp_store_mb(vcpu->mode, READING_SHADOW_PAGE_TABLES); in walk_shadow_page_lockless_begin()
674 * Make sure the write to vcpu->mode is not reordered in front of in walk_shadow_page_lockless_end()
678 smp_store_release(&vcpu->mode, OUTSIDE_GUEST_MODE); in walk_shadow_page_lockless_end()
688 r = kvm_mmu_topup_memory_cache(&vcpu->arch.mmu_pte_list_desc_cache, in mmu_topup_memory_caches()
692 r = kvm_mmu_topup_memory_cache(&vcpu->arch.mmu_shadow_page_cache, in mmu_topup_memory_caches()
697 r = kvm_mmu_topup_memory_cache(&vcpu->arch.mmu_shadowed_info_cache, in mmu_topup_memory_caches()
702 return kvm_mmu_topup_memory_cache(&vcpu->arch.mmu_page_header_cache, in mmu_topup_memory_caches()
708 kvm_mmu_free_memory_cache(&vcpu->arch.mmu_pte_list_desc_cache); in mmu_free_memory_caches()
709 kvm_mmu_free_memory_cache(&vcpu->arch.mmu_shadow_page_cache); in mmu_free_memory_caches()
710 kvm_mmu_free_memory_cache(&vcpu->arch.mmu_shadowed_info_cache); in mmu_free_memory_caches()
711 kvm_mmu_free_memory_cache(&vcpu->arch.mmu_page_header_cache); in mmu_free_memory_caches()
723 if (sp->role.passthrough) in kvm_mmu_page_get_gfn()
724 return sp->gfn; in kvm_mmu_page_get_gfn()
726 if (!sp->role.direct) in kvm_mmu_page_get_gfn()
727 return sp->shadowed_translation[index] >> PAGE_SHIFT; in kvm_mmu_page_get_gfn()
729 return sp->gfn + (index << ((sp->role.level - 1) * SPTE_LEVEL_BITS)); in kvm_mmu_page_get_gfn()
741 return sp->shadowed_translation[index] & ACC_ALL; in kvm_mmu_page_get_access()
744 * For direct MMUs (e.g. TDP or non-paging guests) or passthrough SPs, in kvm_mmu_page_get_access()
753 * In both cases, sp->role.access contains the correct access bits. in kvm_mmu_page_get_access()
755 return sp->role.access; in kvm_mmu_page_get_access()
762 sp->shadowed_translation[index] = (gfn << PAGE_SHIFT) | access; in kvm_mmu_page_set_translation()
768 sp->role.passthrough ? "passthrough" : "direct", in kvm_mmu_page_set_translation()
769 sp->gfn, kvm_mmu_page_get_access(sp, index), access); in kvm_mmu_page_set_translation()
773 sp->role.passthrough ? "passthrough" : "direct", in kvm_mmu_page_set_translation()
774 sp->gfn, kvm_mmu_page_get_gfn(sp, index), gfn); in kvm_mmu_page_set_translation()
794 idx = gfn_to_index(gfn, slot->base_gfn, level); in lpage_info_slot()
795 return &slot->arch.lpage_info[level - 2][idx]; in lpage_info_slot()
806 linfo->disallow_lpage += count; in update_gfn_disallow_lpage_count()
807 WARN_ON_ONCE(linfo->disallow_lpage < 0); in update_gfn_disallow_lpage_count()
818 update_gfn_disallow_lpage_count(slot, gfn, -1); in kvm_mmu_gfn_allow_lpage()
827 kvm->arch.indirect_shadow_pages++; in account_shadowed()
828 gfn = sp->gfn; in account_shadowed()
829 slots = kvm_memslots_for_spte_role(kvm, sp->role); in account_shadowed()
832 /* the non-leaf shadow pages are keeping readonly. */ in account_shadowed()
833 if (sp->role.level > PG_LEVEL_4K) in account_shadowed()
852 if (!list_empty(&sp->possible_nx_huge_page_link)) in track_possible_nx_huge_page()
855 ++kvm->stat.nx_lpage_splits; in track_possible_nx_huge_page()
856 list_add_tail(&sp->possible_nx_huge_page_link, in track_possible_nx_huge_page()
857 &kvm->arch.possible_nx_huge_pages); in track_possible_nx_huge_page()
863 sp->nx_huge_page_disallowed = true; in account_nx_huge_page()
875 kvm->arch.indirect_shadow_pages--; in unaccount_shadowed()
876 gfn = sp->gfn; in unaccount_shadowed()
877 slots = kvm_memslots_for_spte_role(kvm, sp->role); in unaccount_shadowed()
879 if (sp->role.level > PG_LEVEL_4K) in unaccount_shadowed()
887 if (list_empty(&sp->possible_nx_huge_page_link)) in untrack_possible_nx_huge_page()
890 --kvm->stat.nx_lpage_splits; in untrack_possible_nx_huge_page()
891 list_del_init(&sp->possible_nx_huge_page_link); in untrack_possible_nx_huge_page()
896 sp->nx_huge_page_disallowed = false; in unaccount_nx_huge_page()
908 if (!slot || slot->flags & KVM_MEMSLOT_INVALID) in gfn_to_memslot_dirty_bitmap()
919 * If the bit zero of rmap_head->val is clear, then it points to the only spte
920 * in this rmap chain. Otherwise, (rmap_head->val & ~1) points to a struct
933 if (!rmap_head->val) { in pte_list_add()
934 rmap_head->val = (unsigned long)spte; in pte_list_add()
935 } else if (!(rmap_head->val & 1)) { in pte_list_add()
937 desc->sptes[0] = (u64 *)rmap_head->val; in pte_list_add()
938 desc->sptes[1] = spte; in pte_list_add()
939 desc->spte_count = 2; in pte_list_add()
940 desc->tail_count = 0; in pte_list_add()
941 rmap_head->val = (unsigned long)desc | 1; in pte_list_add()
944 desc = (struct pte_list_desc *)(rmap_head->val & ~1ul); in pte_list_add()
945 count = desc->tail_count + desc->spte_count; in pte_list_add()
951 if (desc->spte_count == PTE_LIST_EXT) { in pte_list_add()
953 desc->more = (struct pte_list_desc *)(rmap_head->val & ~1ul); in pte_list_add()
954 desc->spte_count = 0; in pte_list_add()
955 desc->tail_count = count; in pte_list_add()
956 rmap_head->val = (unsigned long)desc | 1; in pte_list_add()
958 desc->sptes[desc->spte_count++] = spte; in pte_list_add()
967 struct pte_list_desc *head_desc = (struct pte_list_desc *)(rmap_head->val & ~1ul); in pte_list_desc_remove_entry()
968 int j = head_desc->spte_count - 1; in pte_list_desc_remove_entry()
978 * Replace the to-be-freed SPTE with the last valid entry from the head in pte_list_desc_remove_entry()
982 desc->sptes[i] = head_desc->sptes[j]; in pte_list_desc_remove_entry()
983 head_desc->sptes[j] = NULL; in pte_list_desc_remove_entry()
984 head_desc->spte_count--; in pte_list_desc_remove_entry()
985 if (head_desc->spte_count) in pte_list_desc_remove_entry()
993 if (!head_desc->more) in pte_list_desc_remove_entry()
994 rmap_head->val = 0; in pte_list_desc_remove_entry()
996 rmap_head->val = (unsigned long)head_desc->more | 1; in pte_list_desc_remove_entry()
1006 if (KVM_BUG_ON_DATA_CORRUPTION(!rmap_head->val, kvm)) in pte_list_remove()
1009 if (!(rmap_head->val & 1)) { in pte_list_remove()
1010 if (KVM_BUG_ON_DATA_CORRUPTION((u64 *)rmap_head->val != spte, kvm)) in pte_list_remove()
1013 rmap_head->val = 0; in pte_list_remove()
1015 desc = (struct pte_list_desc *)(rmap_head->val & ~1ul); in pte_list_remove()
1017 for (i = 0; i < desc->spte_count; ++i) { in pte_list_remove()
1018 if (desc->sptes[i] == spte) { in pte_list_remove()
1024 desc = desc->more; in pte_list_remove()
1045 if (!rmap_head->val) in kvm_zap_all_rmap_sptes()
1048 if (!(rmap_head->val & 1)) { in kvm_zap_all_rmap_sptes()
1049 mmu_spte_clear_track_bits(kvm, (u64 *)rmap_head->val); in kvm_zap_all_rmap_sptes()
1053 desc = (struct pte_list_desc *)(rmap_head->val & ~1ul); in kvm_zap_all_rmap_sptes()
1056 for (i = 0; i < desc->spte_count; i++) in kvm_zap_all_rmap_sptes()
1057 mmu_spte_clear_track_bits(kvm, desc->sptes[i]); in kvm_zap_all_rmap_sptes()
1058 next = desc->more; in kvm_zap_all_rmap_sptes()
1063 rmap_head->val = 0; in kvm_zap_all_rmap_sptes()
1071 if (!rmap_head->val) in pte_list_count()
1073 else if (!(rmap_head->val & 1)) in pte_list_count()
1076 desc = (struct pte_list_desc *)(rmap_head->val & ~1ul); in pte_list_count()
1077 return desc->tail_count + desc->spte_count; in pte_list_count()
1085 idx = gfn_to_index(gfn, slot->base_gfn, level); in gfn_to_rmap()
1086 return &slot->arch.rmap[level - PG_LEVEL_4K][idx]; in gfn_to_rmap()
1103 * information in sp->role. in rmap_remove()
1105 slots = kvm_memslots_for_spte_role(kvm, sp->role); in rmap_remove()
1108 rmap_head = gfn_to_rmap(gfn, sp->role.level, slot); in rmap_remove()
1135 if (!rmap_head->val) in rmap_get_first()
1138 if (!(rmap_head->val & 1)) { in rmap_get_first()
1139 iter->desc = NULL; in rmap_get_first()
1140 sptep = (u64 *)rmap_head->val; in rmap_get_first()
1144 iter->desc = (struct pte_list_desc *)(rmap_head->val & ~1ul); in rmap_get_first()
1145 iter->pos = 0; in rmap_get_first()
1146 sptep = iter->desc->sptes[iter->pos]; in rmap_get_first()
1161 if (iter->desc) { in rmap_get_next()
1162 if (iter->pos < PTE_LIST_EXT - 1) { in rmap_get_next()
1163 ++iter->pos; in rmap_get_next()
1164 sptep = iter->desc->sptes[iter->pos]; in rmap_get_next()
1169 iter->desc = iter->desc->more; in rmap_get_next()
1171 if (iter->desc) { in rmap_get_next()
1172 iter->pos = 0; in rmap_get_next()
1173 /* desc->sptes[0] cannot be NULL */ in rmap_get_next()
1174 sptep = iter->desc->sptes[iter->pos]; in rmap_get_next()
1202 WARN_ON_ONCE(sp->role.level == PG_LEVEL_4K); in drop_large_spte()
1211 * Write-protect on the specified @sptep, @pt_protect indicates whether
1212 * spte write-protection is caused by protecting shadow page table.
1216 * - for dirty logging, the spte can be set to writable at anytime if
1218 * - for spte protection, the spte can be writable only after unsync-ing
1272 * - D bit on ad-enabled SPTEs, and
1273 * - W bit on ad-disabled SPTEs.
1293 * kvm_mmu_write_protect_pt_masked - write protect selected PT level pages
1309 slot->base_gfn + gfn_offset, mask, true); in kvm_mmu_write_protect_pt_masked()
1315 rmap_head = gfn_to_rmap(slot->base_gfn + gfn_offset + __ffs(mask), in kvm_mmu_write_protect_pt_masked()
1320 mask &= mask - 1; in kvm_mmu_write_protect_pt_masked()
1325 * kvm_mmu_clear_dirty_pt_masked - clear MMU D-bit for PT level pages, or write
1326 * protect the page if the D-bit isn't supported.
1328 * @slot: slot to clear D-bit
1330 * @mask: indicates which pages we should clear D-bit
1332 * Used for PML to re-log the dirty GPAs after userspace querying dirty_bitmap.
1342 slot->base_gfn + gfn_offset, mask, false); in kvm_mmu_clear_dirty_pt_masked()
1348 rmap_head = gfn_to_rmap(slot->base_gfn + gfn_offset + __ffs(mask), in kvm_mmu_clear_dirty_pt_masked()
1353 mask &= mask - 1; in kvm_mmu_clear_dirty_pt_masked()
1358 * kvm_arch_mmu_enable_log_dirty_pt_masked - enable dirty logging for selected
1373 * initially-all-set mode; must write protect them here so that they in kvm_arch_mmu_enable_log_dirty_pt_masked()
1381 gfn_t start = slot->base_gfn + gfn_offset + __ffs(mask); in kvm_arch_mmu_enable_log_dirty_pt_masked()
1382 gfn_t end = slot->base_gfn + gfn_offset + __fls(mask); in kvm_arch_mmu_enable_log_dirty_pt_masked()
1435 return kvm_mmu_slot_gfn_write_protect(vcpu->kvm, slot, gfn, PG_LEVEL_4K); in kvm_vcpu_write_protect_gfn()
1508 iterator->level = level; in rmap_walk_init_level()
1509 iterator->gfn = iterator->start_gfn; in rmap_walk_init_level()
1510 iterator->rmap = gfn_to_rmap(iterator->gfn, level, iterator->slot); in rmap_walk_init_level()
1511 iterator->end_rmap = gfn_to_rmap(iterator->end_gfn, level, iterator->slot); in rmap_walk_init_level()
1519 iterator->slot = slot; in slot_rmap_walk_init()
1520 iterator->start_level = start_level; in slot_rmap_walk_init()
1521 iterator->end_level = end_level; in slot_rmap_walk_init()
1522 iterator->start_gfn = start_gfn; in slot_rmap_walk_init()
1523 iterator->end_gfn = end_gfn; in slot_rmap_walk_init()
1525 rmap_walk_init_level(iterator, iterator->start_level); in slot_rmap_walk_init()
1530 return !!iterator->rmap; in slot_rmap_walk_okay()
1535 while (++iterator->rmap <= iterator->end_rmap) { in slot_rmap_walk_next()
1536 iterator->gfn += (1UL << KVM_HPAGE_GFN_SHIFT(iterator->level)); in slot_rmap_walk_next()
1538 if (iterator->rmap->val) in slot_rmap_walk_next()
1542 if (++iterator->level > iterator->end_level) { in slot_rmap_walk_next()
1543 iterator->rmap = NULL; in slot_rmap_walk_next()
1547 rmap_walk_init_level(iterator, iterator->level); in slot_rmap_walk_next()
1568 for_each_slot_rmap_range(range->slot, PG_LEVEL_4K, KVM_MAX_HUGEPAGE_LEVEL, in kvm_handle_gfn_range()
1569 range->start, range->end - 1, &iterator) in kvm_handle_gfn_range()
1570 ret |= handler(kvm, iterator.rmap, range->slot, iterator.gfn, in kvm_handle_gfn_range()
1571 iterator.level, range->arg.pte); in kvm_handle_gfn_range()
1587 range->slot->id == APIC_ACCESS_PAGE_PRIVATE_MEMSLOT) in kvm_unmap_gfn_range()
1646 kvm_update_page_stats(kvm, sp->role.level, 1); in __rmap_add()
1648 rmap_head = gfn_to_rmap(gfn, sp->role.level, slot); in __rmap_add()
1651 if (rmap_count > kvm->stat.max_mmu_rmap_size) in __rmap_add()
1652 kvm->stat.max_mmu_rmap_size = rmap_count; in __rmap_add()
1655 kvm_flush_remote_tlbs_gfn(kvm, gfn, sp->role.level); in __rmap_add()
1662 struct kvm_mmu_memory_cache *cache = &vcpu->arch.mmu_pte_list_desc_cache; in rmap_add()
1664 __rmap_add(vcpu->kvm, cache, slot, spte, gfn, access); in rmap_add()
1699 if (KVM_MMU_WARN_ON(is_shadow_present_pte(sp->spt[i]))) in kvm_mmu_check_sptes_at_free()
1700 pr_err_ratelimited("SPTE %llx (@ %p) for gfn %llx shadow-present at free", in kvm_mmu_check_sptes_at_free()
1701 sp->spt[i], &sp->spt[i], in kvm_mmu_check_sptes_at_free()
1709 * kvm->arch.n_used_mmu_pages values. We need a global,
1715 kvm->arch.n_used_mmu_pages += nr; in kvm_mod_used_mmu_pages()
1722 kvm_account_pgtable_pages((void *)sp->spt, +1); in kvm_account_mmu_page()
1727 kvm_mod_used_mmu_pages(kvm, -1); in kvm_unaccount_mmu_page()
1728 kvm_account_pgtable_pages((void *)sp->spt, -1); in kvm_unaccount_mmu_page()
1735 hlist_del(&sp->hash_link); in kvm_mmu_free_shadow_page()
1736 list_del(&sp->link); in kvm_mmu_free_shadow_page()
1737 free_page((unsigned long)sp->spt); in kvm_mmu_free_shadow_page()
1738 if (!sp->role.direct) in kvm_mmu_free_shadow_page()
1739 free_page((unsigned long)sp->shadowed_translation); in kvm_mmu_free_shadow_page()
1754 pte_list_add(cache, parent_pte, &sp->parent_ptes); in mmu_page_add_parent_pte()
1760 pte_list_remove(kvm, parent_pte, &sp->parent_ptes); in mmu_page_remove_parent_pte()
1776 for_each_rmap_spte(&sp->parent_ptes, &iter, sptep) { in kvm_mmu_mark_parents_unsync()
1786 if (__test_and_set_bit(spte_index(spte), sp->unsync_child_bitmap)) in mark_unsync()
1788 if (sp->unsync_children++) in mark_unsync()
1808 if (sp->unsync) in mmu_pages_add()
1809 for (i=0; i < pvec->nr; i++) in mmu_pages_add()
1810 if (pvec->page[i].sp == sp) in mmu_pages_add()
1813 pvec->page[pvec->nr].sp = sp; in mmu_pages_add()
1814 pvec->page[pvec->nr].idx = idx; in mmu_pages_add()
1815 pvec->nr++; in mmu_pages_add()
1816 return (pvec->nr == KVM_PAGE_ARRAY_NR); in mmu_pages_add()
1821 --sp->unsync_children; in clear_unsync_child_bit()
1822 WARN_ON_ONCE((int)sp->unsync_children < 0); in clear_unsync_child_bit()
1823 __clear_bit(idx, sp->unsync_child_bitmap); in clear_unsync_child_bit()
1831 for_each_set_bit(i, sp->unsync_child_bitmap, 512) { in __mmu_unsync_walk()
1833 u64 ent = sp->spt[i]; in __mmu_unsync_walk()
1842 if (child->unsync_children) { in __mmu_unsync_walk()
1844 return -ENOSPC; in __mmu_unsync_walk()
1854 } else if (child->unsync) { in __mmu_unsync_walk()
1857 return -ENOSPC; in __mmu_unsync_walk()
1865 #define INVALID_INDEX (-1)
1870 pvec->nr = 0; in mmu_unsync_walk()
1871 if (!sp->unsync_children) in mmu_unsync_walk()
1880 WARN_ON_ONCE(!sp->unsync); in kvm_unlink_unsync_page()
1882 sp->unsync = 0; in kvm_unlink_unsync_page()
1883 --kvm->stat.mmu_unsync; in kvm_unlink_unsync_page()
1893 if (sp->role.direct) in sp_has_gptes()
1896 if (sp->role.passthrough) in sp_has_gptes()
1909 &(_kvm)->arch.mmu_page_hash[kvm_page_table_hashfn(_gfn)]) \
1910 if ((_sp)->gfn != (_gfn) || !sp_has_gptes(_sp)) {} else
1914 union kvm_mmu_page_role root_role = vcpu->arch.mmu->root_role; in kvm_sync_page_check()
1920 * - level: not part of the overall MMU role and will never match as the MMU's in kvm_sync_page_check()
1922 * - access: updated based on the new guest PTE in kvm_sync_page_check()
1923 * - quadrant: not part of the overall MMU role (similar to level) in kvm_sync_page_check()
1935 * differs then the memslot lookup (SMM vs. non-SMM) will be bogus, the in kvm_sync_page_check()
1938 if (WARN_ON_ONCE(sp->role.direct || !vcpu->arch.mmu->sync_spte || in kvm_sync_page_check()
1939 (sp->role.word ^ root_role.word) & ~sync_role_ign.word)) in kvm_sync_page_check()
1947 if (!sp->spt[i]) in kvm_sync_spte()
1950 return vcpu->arch.mmu->sync_spte(vcpu, sp, i); in kvm_sync_spte()
1959 return -1; in __kvm_sync_page()
1964 if (ret < -1) in __kvm_sync_page()
1965 return -1; in __kvm_sync_page()
1987 kvm_mmu_prepare_zap_page(vcpu->kvm, sp, invalid_list); in kvm_sync_page()
2007 if (sp->role.invalid) in is_obsolete_sp()
2012 unlikely(sp->mmu_valid_gen != kvm->arch.mmu_valid_gen); in is_obsolete_sp()
2031 for (n = i+1; n < pvec->nr; n++) { in mmu_pages_next()
2032 struct kvm_mmu_page *sp = pvec->page[n].sp; in mmu_pages_next()
2033 unsigned idx = pvec->page[n].idx; in mmu_pages_next()
2034 int level = sp->role.level; in mmu_pages_next()
2036 parents->idx[level-1] = idx; in mmu_pages_next()
2040 parents->parent[level-2] = sp; in mmu_pages_next()
2052 if (pvec->nr == 0) in mmu_pages_first()
2055 WARN_ON_ONCE(pvec->page[0].idx != INVALID_INDEX); in mmu_pages_first()
2057 sp = pvec->page[0].sp; in mmu_pages_first()
2058 level = sp->role.level; in mmu_pages_first()
2061 parents->parent[level-2] = sp; in mmu_pages_first()
2066 parents->parent[level-1] = NULL; in mmu_pages_first()
2076 unsigned int idx = parents->idx[level]; in mmu_pages_clear_parents()
2077 sp = parents->parent[level]; in mmu_pages_clear_parents()
2084 } while (!sp->unsync_children); in mmu_pages_clear_parents()
2101 protected |= kvm_vcpu_write_protect_gfn(vcpu, sp->gfn); in mmu_sync_children()
2104 kvm_mmu_remote_flush_or_zap(vcpu->kvm, &invalid_list, true); in mmu_sync_children()
2109 kvm_unlink_unsync_page(vcpu->kvm, sp); in mmu_sync_children()
2113 if (need_resched() || rwlock_needbreak(&vcpu->kvm->mmu_lock)) { in mmu_sync_children()
2114 kvm_mmu_remote_flush_or_zap(vcpu->kvm, &invalid_list, flush); in mmu_sync_children()
2117 return -EINTR; in mmu_sync_children()
2120 cond_resched_rwlock_write(&vcpu->kvm->mmu_lock); in mmu_sync_children()
2125 kvm_mmu_remote_flush_or_zap(vcpu->kvm, &invalid_list, flush); in mmu_sync_children()
2131 atomic_set(&sp->write_flooding_count, 0); in __clear_sp_write_flooding_count()
2157 if (sp->gfn != gfn) { in kvm_mmu_find_shadow_page()
2162 if (sp->role.word != role.word) { in kvm_mmu_find_shadow_page()
2164 * If the guest is creating an upper-level page, zap in kvm_mmu_find_shadow_page()
2170 * upper-level page will be write-protected. in kvm_mmu_find_shadow_page()
2172 if (role.level > PG_LEVEL_4K && sp->unsync) in kvm_mmu_find_shadow_page()
2178 /* unsync and write-flooding only apply to indirect SPs. */ in kvm_mmu_find_shadow_page()
2179 if (sp->role.direct) in kvm_mmu_find_shadow_page()
2182 if (sp->unsync) { in kvm_mmu_find_shadow_page()
2189 * it doesn't write-protect the page or mark it synchronized! in kvm_mmu_find_shadow_page()
2213 ++kvm->stat.mmu_cache_miss; in kvm_mmu_find_shadow_page()
2218 if (collisions > kvm->stat.max_mmu_page_hash_collisions) in kvm_mmu_find_shadow_page()
2219 kvm->stat.max_mmu_page_hash_collisions = collisions; in kvm_mmu_find_shadow_page()
2238 sp = kvm_mmu_memory_cache_alloc(caches->page_header_cache); in kvm_mmu_alloc_shadow_page()
2239 sp->spt = kvm_mmu_memory_cache_alloc(caches->shadow_page_cache); in kvm_mmu_alloc_shadow_page()
2241 sp->shadowed_translation = kvm_mmu_memory_cache_alloc(caches->shadowed_info_cache); in kvm_mmu_alloc_shadow_page()
2243 set_page_private(virt_to_page(sp->spt), (unsigned long)sp); in kvm_mmu_alloc_shadow_page()
2245 INIT_LIST_HEAD(&sp->possible_nx_huge_page_link); in kvm_mmu_alloc_shadow_page()
2252 sp->mmu_valid_gen = kvm->arch.mmu_valid_gen; in kvm_mmu_alloc_shadow_page()
2253 list_add(&sp->link, &kvm->arch.active_mmu_pages); in kvm_mmu_alloc_shadow_page()
2256 sp->gfn = gfn; in kvm_mmu_alloc_shadow_page()
2257 sp->role = role; in kvm_mmu_alloc_shadow_page()
2258 hlist_add_head(&sp->hash_link, sp_list); in kvm_mmu_alloc_shadow_page()
2276 sp_list = &kvm->arch.mmu_page_hash[kvm_page_table_hashfn(gfn)]; in __kvm_mmu_get_shadow_page()
2293 .page_header_cache = &vcpu->arch.mmu_page_header_cache, in kvm_mmu_get_shadow_page()
2294 .shadow_page_cache = &vcpu->arch.mmu_shadow_page_cache, in kvm_mmu_get_shadow_page()
2295 .shadowed_info_cache = &vcpu->arch.mmu_shadowed_info_cache, in kvm_mmu_get_shadow_page()
2298 return __kvm_mmu_get_shadow_page(vcpu->kvm, vcpu, &caches, gfn, role); in kvm_mmu_get_shadow_page()
2307 role = parent_sp->role; in kvm_mmu_child_role()
2308 role.level--; in kvm_mmu_child_role()
2314 * If the guest has 4-byte PTEs then that means it's using 32-bit, in kvm_mmu_child_role()
2315 * 2-level, non-PAE paging. KVM shadows such guests with PAE paging in kvm_mmu_child_role()
2316 * (i.e. 8-byte PTEs). The difference in PTE size means that KVM must in kvm_mmu_child_role()
2329 * Concretely, a 4-byte PDE consumes bits 31:22, while an 8-byte PDE in kvm_mmu_child_role()
2331 * PDPTEs; those 4 PAE page directories are pre-allocated and their in kvm_mmu_child_role()
2332 * quadrant is assigned in mmu_alloc_root(). A 4-byte PTE consumes in kvm_mmu_child_role()
2333 * bits 21:12, while an 8-byte PTE consumes bits 20:12. To consume in kvm_mmu_child_role()
2335 * quadrant, i.e. sets quadrant to '0' or '1'. The parent 8-byte PDE in kvm_mmu_child_role()
2354 return ERR_PTR(-EEXIST); in kvm_mmu_get_child_sp()
2364 iterator->addr = addr; in shadow_walk_init_using_root()
2365 iterator->shadow_addr = root; in shadow_walk_init_using_root()
2366 iterator->level = vcpu->arch.mmu->root_role.level; in shadow_walk_init_using_root()
2368 if (iterator->level >= PT64_ROOT_4LEVEL && in shadow_walk_init_using_root()
2369 vcpu->arch.mmu->cpu_role.base.level < PT64_ROOT_4LEVEL && in shadow_walk_init_using_root()
2370 !vcpu->arch.mmu->root_role.direct) in shadow_walk_init_using_root()
2371 iterator->level = PT32E_ROOT_LEVEL; in shadow_walk_init_using_root()
2373 if (iterator->level == PT32E_ROOT_LEVEL) { in shadow_walk_init_using_root()
2375 * prev_root is currently only used for 64-bit hosts. So only in shadow_walk_init_using_root()
2378 BUG_ON(root != vcpu->arch.mmu->root.hpa); in shadow_walk_init_using_root()
2380 iterator->shadow_addr in shadow_walk_init_using_root()
2381 = vcpu->arch.mmu->pae_root[(addr >> 30) & 3]; in shadow_walk_init_using_root()
2382 iterator->shadow_addr &= SPTE_BASE_ADDR_MASK; in shadow_walk_init_using_root()
2383 --iterator->level; in shadow_walk_init_using_root()
2384 if (!iterator->shadow_addr) in shadow_walk_init_using_root()
2385 iterator->level = 0; in shadow_walk_init_using_root()
2392 shadow_walk_init_using_root(iterator, vcpu, vcpu->arch.mmu->root.hpa, in shadow_walk_init()
2398 if (iterator->level < PG_LEVEL_4K) in shadow_walk_okay()
2401 iterator->index = SPTE_INDEX(iterator->addr, iterator->level); in shadow_walk_okay()
2402 iterator->sptep = ((u64 *)__va(iterator->shadow_addr)) + iterator->index; in shadow_walk_okay()
2409 if (!is_shadow_present_pte(spte) || is_last_spte(spte, iterator->level)) { in __shadow_walk_next()
2410 iterator->level = 0; in __shadow_walk_next()
2414 iterator->shadow_addr = spte & SPTE_BASE_ADDR_MASK; in __shadow_walk_next()
2415 --iterator->level; in __shadow_walk_next()
2420 __shadow_walk_next(iterator, *iterator->sptep); in shadow_walk_next()
2439 spte = make_nonleaf_spte(sp->spt, sp_ad_disabled(sp)); in __link_shadow_page()
2446 * The non-direct sub-pagetable must be updated before linking. For in __link_shadow_page()
2448 * kvm_mmu_find_shadow_page() without write-protecting the gfn, in __link_shadow_page()
2449 * so sp->unsync can be true or false. For higher level non-direct in __link_shadow_page()
2451 * FNAME(fetch)(), so sp->unsync_children can only be false. in __link_shadow_page()
2454 if (WARN_ON_ONCE(sp->unsync_children) || sp->unsync) in __link_shadow_page()
2461 __link_shadow_page(vcpu->kvm, &vcpu->arch.mmu_pte_list_desc_cache, sptep, sp, true); in link_shadow_page()
2473 * sp's access: allow writable in the read-only sp, in validate_direct_spte()
2478 if (child->role.access == direct_access) in validate_direct_spte()
2481 drop_parent_pte(vcpu->kvm, child, sptep); in validate_direct_spte()
2482 kvm_flush_remote_tlbs_sptep(vcpu->kvm, sptep); in validate_direct_spte()
2486 /* Returns the number of zapped non-leaf child shadow pages. */
2495 if (is_last_spte(pte, sp->role.level)) { in mmu_page_zap_pte()
2507 child->role.guest_mode && !child->parent_ptes.val) in mmu_page_zap_pte()
2525 zapped += mmu_page_zap_pte(kvm, sp, sp->spt + i, invalid_list); in kvm_mmu_page_unlink_children()
2535 while ((sptep = rmap_get_first(&sp->parent_ptes, &iter))) in kvm_mmu_unlink_parents()
2547 if (parent->role.level == PG_LEVEL_4K) in mmu_zap_unsync_children()
2570 lockdep_assert_held_write(&kvm->mmu_lock); in __kvm_mmu_prepare_zap_page()
2572 ++kvm->stat.mmu_shadow_zapped; in __kvm_mmu_prepare_zap_page()
2580 if (!sp->role.invalid && sp_has_gptes(sp)) in __kvm_mmu_prepare_zap_page()
2583 if (sp->unsync) in __kvm_mmu_prepare_zap_page()
2585 if (!sp->root_count) { in __kvm_mmu_prepare_zap_page()
2592 * !sp->root_count. in __kvm_mmu_prepare_zap_page()
2594 if (sp->role.invalid) in __kvm_mmu_prepare_zap_page()
2595 list_add(&sp->link, invalid_list); in __kvm_mmu_prepare_zap_page()
2597 list_move(&sp->link, invalid_list); in __kvm_mmu_prepare_zap_page()
2604 list_del(&sp->link); in __kvm_mmu_prepare_zap_page()
2614 if (sp->nx_huge_page_disallowed) in __kvm_mmu_prepare_zap_page()
2617 sp->role.invalid = 1; in __kvm_mmu_prepare_zap_page()
2647 * the page tables and see changes to vcpu->mode here. The barrier in kvm_mmu_commit_zap_page()
2652 * guest mode and/or lockless shadow page table walks. in kvm_mmu_commit_zap_page()
2657 WARN_ON_ONCE(!sp->role.invalid || sp->root_count); in kvm_mmu_commit_zap_page()
2671 if (list_empty(&kvm->arch.active_mmu_pages)) in kvm_mmu_zap_oldest_mmu_pages()
2675 list_for_each_entry_safe_reverse(sp, tmp, &kvm->arch.active_mmu_pages, link) { in kvm_mmu_zap_oldest_mmu_pages()
2680 if (sp->root_count) in kvm_mmu_zap_oldest_mmu_pages()
2695 kvm->stat.mmu_recycled += total_zapped; in kvm_mmu_zap_oldest_mmu_pages()
2701 if (kvm->arch.n_max_mmu_pages > kvm->arch.n_used_mmu_pages) in kvm_mmu_available_pages()
2702 return kvm->arch.n_max_mmu_pages - in kvm_mmu_available_pages()
2703 kvm->arch.n_used_mmu_pages; in kvm_mmu_available_pages()
2710 unsigned long avail = kvm_mmu_available_pages(vcpu->kvm); in make_mmu_pages_available()
2715 kvm_mmu_zap_oldest_mmu_pages(vcpu->kvm, KVM_REFILL_PAGES - avail); in make_mmu_pages_available()
2720 * four pages, e.g. for PAE roots or for 5-level paging. Temporarily in make_mmu_pages_available()
2726 if (!kvm_mmu_available_pages(vcpu->kvm)) in make_mmu_pages_available()
2727 return -ENOSPC; in make_mmu_pages_available()
2737 write_lock(&kvm->mmu_lock); in kvm_mmu_change_mmu_pages()
2739 if (kvm->arch.n_used_mmu_pages > goal_nr_mmu_pages) { in kvm_mmu_change_mmu_pages()
2740 kvm_mmu_zap_oldest_mmu_pages(kvm, kvm->arch.n_used_mmu_pages - in kvm_mmu_change_mmu_pages()
2743 goal_nr_mmu_pages = kvm->arch.n_used_mmu_pages; in kvm_mmu_change_mmu_pages()
2746 kvm->arch.n_max_mmu_pages = goal_nr_mmu_pages; in kvm_mmu_change_mmu_pages()
2748 write_unlock(&kvm->mmu_lock); in kvm_mmu_change_mmu_pages()
2758 write_lock(&kvm->mmu_lock); in kvm_mmu_unprotect_page()
2764 write_unlock(&kvm->mmu_lock); in kvm_mmu_unprotect_page()
2774 if (vcpu->arch.mmu->root_role.direct) in kvm_mmu_unprotect_page_virt()
2779 r = kvm_mmu_unprotect_page(vcpu->kvm, gpa >> PAGE_SHIFT); in kvm_mmu_unprotect_page_virt()
2787 ++kvm->stat.mmu_unsync; in kvm_unsync_page()
2788 sp->unsync = 1; in kvm_unsync_page()
2796 * were marked unsync (or if there is no shadow page), -EPERM if the SPTE must
2797 * be write-protected.
2806 * Force write-protection if the page is being tracked. Note, the page in mmu_try_to_unsync_pages()
2807 * track machinery is used to write-protect upper-level shadow pages, in mmu_try_to_unsync_pages()
2811 return -EPERM; in mmu_try_to_unsync_pages()
2814 * The page is not write-tracked, mark existing shadow pages unsync in mmu_try_to_unsync_pages()
2821 return -EPERM; in mmu_try_to_unsync_pages()
2823 if (sp->unsync) in mmu_try_to_unsync_pages()
2827 return -EEXIST; in mmu_try_to_unsync_pages()
2838 spin_lock(&kvm->arch.mmu_unsync_pages_lock); in mmu_try_to_unsync_pages()
2844 * possible as clearing sp->unsync _must_ hold mmu_lock in mmu_try_to_unsync_pages()
2845 * for write, i.e. unsync cannot transition from 0->1 in mmu_try_to_unsync_pages()
2848 if (READ_ONCE(sp->unsync)) in mmu_try_to_unsync_pages()
2852 WARN_ON_ONCE(sp->role.level != PG_LEVEL_4K); in mmu_try_to_unsync_pages()
2856 spin_unlock(&kvm->arch.mmu_unsync_pages_lock); in mmu_try_to_unsync_pages()
2859 * We need to ensure that the marking of unsync pages is visible in mmu_try_to_unsync_pages()
2863 * before the page had been marked as unsync-ed, something like the in mmu_try_to_unsync_pages()
2867 * --------------------------------------------------------------------- in mmu_try_to_unsync_pages()
2880 * 2.3 Walking of unsync pages sees sp->unsync is in mmu_try_to_unsync_pages()
2889 * (sp->unsync = true) in mmu_try_to_unsync_pages()
2905 int level = sp->role.level; in mmu_set_spte()
2913 bool host_writable = !fault || fault->map_writable; in mmu_set_spte()
2914 bool prefetch = !fault || fault->prefetch; in mmu_set_spte()
2915 bool write_fault = fault && fault->write; in mmu_set_spte()
2918 vcpu->stat.pf_mmio_spte_created++; in mmu_set_spte()
2933 drop_parent_pte(vcpu->kvm, child, sptep); in mmu_set_spte()
2936 drop_spte(vcpu->kvm, sptep); in mmu_set_spte()
2958 kvm_flush_remote_tlbs_gfn(vcpu->kvm, gfn, level); in mmu_set_spte()
2977 unsigned int access = sp->role.access; in direct_pte_prefetch_many()
2984 return -1; in direct_pte_prefetch_many()
2986 ret = gfn_to_page_many_atomic(slot, gfn, pages, end - start); in direct_pte_prefetch_many()
2988 return -1; in direct_pte_prefetch_many()
3005 WARN_ON_ONCE(!sp->role.direct); in __direct_pte_prefetch()
3007 i = spte_index(sptep) & ~(PTE_PREFETCH_NUM - 1); in __direct_pte_prefetch()
3008 spte = sp->spt + i; in __direct_pte_prefetch()
3038 if (sp->role.level > PG_LEVEL_4K) in direct_pte_prefetch()
3045 if (unlikely(vcpu->kvm->mmu_invalidate_in_progress)) in direct_pte_prefetch()
3059 * - Check mmu_invalidate_retry_hva() after grabbing the mapping level, before
3063 * - Hold mmu_lock AND ensure there is no in-progress MMU notifier invalidation
3067 * - Do not use the result to install new mappings, e.g. use the host mapping
3088 * Note, using the already-retrieved memslot and __gfn_to_hva_memslot() in host_pfn_mapping_level()
3091 * read-only memslots due to gfn_to_hva() assuming writes. Earlier in host_pfn_mapping_level()
3093 * read-only memslot. in host_pfn_mapping_level()
3105 * Read each entry once. As above, a non-leaf entry can be promoted to in host_pfn_mapping_level()
3106 * a huge page _during_ this walk. Re-reading the entry could send the in host_pfn_mapping_level()
3111 pgd = READ_ONCE(*pgd_offset(kvm->mm, hva)); in host_pfn_mapping_level()
3148 for ( ; max_level > PG_LEVEL_4K; max_level--) { in kvm_mmu_max_mapping_level()
3150 if (!linfo->disallow_lpage) in kvm_mmu_max_mapping_level()
3163 struct kvm_memory_slot *slot = fault->slot; in kvm_mmu_hugepage_adjust()
3166 fault->huge_page_disallowed = fault->exec && fault->nx_huge_page_workaround_enabled; in kvm_mmu_hugepage_adjust()
3168 if (unlikely(fault->max_level == PG_LEVEL_4K)) in kvm_mmu_hugepage_adjust()
3171 if (is_error_noslot_pfn(fault->pfn)) in kvm_mmu_hugepage_adjust()
3181 fault->req_level = kvm_mmu_max_mapping_level(vcpu->kvm, slot, in kvm_mmu_hugepage_adjust()
3182 fault->gfn, fault->max_level); in kvm_mmu_hugepage_adjust()
3183 if (fault->req_level == PG_LEVEL_4K || fault->huge_page_disallowed) in kvm_mmu_hugepage_adjust()
3190 fault->goal_level = fault->req_level; in kvm_mmu_hugepage_adjust()
3191 mask = KVM_PAGES_PER_HPAGE(fault->goal_level) - 1; in kvm_mmu_hugepage_adjust()
3192 VM_BUG_ON((fault->gfn & mask) != (fault->pfn & mask)); in kvm_mmu_hugepage_adjust()
3193 fault->pfn &= ~mask; in kvm_mmu_hugepage_adjust()
3199 cur_level == fault->goal_level && in disallowed_hugepage_adjust()
3202 spte_to_child_sp(spte)->nx_huge_page_disallowed) { in disallowed_hugepage_adjust()
3210 u64 page_mask = KVM_PAGES_PER_HPAGE(cur_level) - in disallowed_hugepage_adjust()
3211 KVM_PAGES_PER_HPAGE(cur_level - 1); in disallowed_hugepage_adjust()
3212 fault->pfn |= fault->gfn & page_mask; in disallowed_hugepage_adjust()
3213 fault->goal_level--; in disallowed_hugepage_adjust()
3222 gfn_t base_gfn = fault->gfn; in direct_map()
3227 for_each_shadow_entry(vcpu, fault->addr, it) { in direct_map()
3232 if (fault->nx_huge_page_workaround_enabled) in direct_map()
3235 base_gfn = gfn_round_for_level(fault->gfn, it.level); in direct_map()
3236 if (it.level == fault->goal_level) in direct_map()
3240 if (sp == ERR_PTR(-EEXIST)) in direct_map()
3244 if (fault->huge_page_disallowed) in direct_map()
3245 account_nx_huge_page(vcpu->kvm, sp, in direct_map()
3246 fault->req_level >= it.level); in direct_map()
3249 if (WARN_ON_ONCE(it.level != fault->goal_level)) in direct_map()
3250 return -EFAULT; in direct_map()
3252 ret = mmu_set_spte(vcpu, fault->slot, it.sptep, ACC_ALL, in direct_map()
3253 base_gfn, fault->pfn, fault); in direct_map()
3270 if (is_sigpending_pfn(fault->pfn)) { in kvm_handle_error_pfn()
3272 return -EINTR; in kvm_handle_error_pfn()
3280 if (fault->pfn == KVM_PFN_ERR_RO_FAULT) in kvm_handle_error_pfn()
3283 if (fault->pfn == KVM_PFN_ERR_HWPOISON) { in kvm_handle_error_pfn()
3284 kvm_send_hwpoison_signal(fault->slot, fault->gfn); in kvm_handle_error_pfn()
3288 return -EFAULT; in kvm_handle_error_pfn()
3295 gva_t gva = fault->is_tdp ? 0 : fault->addr; in kvm_handle_noslot_fault()
3297 vcpu_cache_mmio_info(vcpu, gva, fault->gfn, in kvm_handle_noslot_fault()
3315 if (unlikely(fault->gfn > kvm_mmu_max_gfn())) in kvm_handle_noslot_fault()
3329 if (fault->rsvd) in page_fault_can_be_fast()
3343 * the fault was caused by a write-protection violation. If the in page_fault_can_be_fast()
3344 * SPTE is MMU-writable (determined later), the fault can be fixed in page_fault_can_be_fast()
3347 if (!fault->present) in page_fault_can_be_fast()
3354 return fault->write; in page_fault_can_be_fast()
3373 * so non-PML cases won't be impacted. in fast_pf_fix_direct_spte()
3381 mark_page_dirty_in_slot(vcpu->kvm, fault->slot, fault->gfn); in fast_pf_fix_direct_spte()
3388 if (fault->exec) in is_access_allowed()
3391 if (fault->write) in is_access_allowed()
3400 * gpa, and sets *spte to the spte value. This spte may be non-preset. If no
3404 * - Must be called between walk_shadow_page_lockless_{begin,end}.
3405 * - The returned sptep must not be used after walk_shadow_page_lockless_end.
3441 sptep = kvm_tdp_mmu_fast_pf_get_last_sptep(vcpu, fault->addr, &spte); in fast_page_fault()
3443 sptep = fast_pf_get_last_sptep(vcpu, fault->addr, &spte); in fast_page_fault()
3449 if (!is_last_spte(spte, sp->role.level)) in fast_page_fault()
3472 * uses A/D bits for non-nested MMUs. Thus, if A/D bits are in fast_page_fault()
3473 * enabled, the SPTE can't be an access-tracked SPTE. in fast_page_fault()
3479 * To keep things simple, only SPTEs that are MMU-writable can in fast_page_fault()
3481 * that were write-protected for dirty-logging or access in fast_page_fault()
3486 * shadow-present, i.e. except for access tracking restoration in fast_page_fault()
3489 if (fault->write && is_mmu_writable_spte(spte)) { in fast_page_fault()
3493 * Do not fix write-permission on the large spte when in fast_page_fault()
3495 * first page into the dirty-bitmap in in fast_page_fault()
3502 if (sp->role.level > PG_LEVEL_4K && in fast_page_fault()
3503 kvm_slot_dirty_track_enabled(fault->slot)) in fast_page_fault()
3533 vcpu->stat.pf_fast++; in fast_page_fault()
3552 else if (!--sp->root_count && sp->role.invalid) in mmu_free_root_page()
3572 && VALID_PAGE(mmu->root.hpa); in kvm_mmu_free_roots()
3577 VALID_PAGE(mmu->prev_roots[i].hpa)) in kvm_mmu_free_roots()
3584 write_lock(&kvm->mmu_lock); in kvm_mmu_free_roots()
3588 mmu_free_root_page(kvm, &mmu->prev_roots[i].hpa, in kvm_mmu_free_roots()
3592 if (kvm_mmu_is_dummy_root(mmu->root.hpa)) { in kvm_mmu_free_roots()
3594 } else if (root_to_sp(mmu->root.hpa)) { in kvm_mmu_free_roots()
3595 mmu_free_root_page(kvm, &mmu->root.hpa, &invalid_list); in kvm_mmu_free_roots()
3596 } else if (mmu->pae_root) { in kvm_mmu_free_roots()
3598 if (!IS_VALID_PAE_ROOT(mmu->pae_root[i])) in kvm_mmu_free_roots()
3601 mmu_free_root_page(kvm, &mmu->pae_root[i], in kvm_mmu_free_roots()
3603 mmu->pae_root[i] = INVALID_PAE_ROOT; in kvm_mmu_free_roots()
3606 mmu->root.hpa = INVALID_PAGE; in kvm_mmu_free_roots()
3607 mmu->root.pgd = 0; in kvm_mmu_free_roots()
3611 write_unlock(&kvm->mmu_lock); in kvm_mmu_free_roots()
3626 WARN_ON_ONCE(mmu->root_role.guest_mode); in kvm_mmu_free_guest_mode_roots()
3629 root_hpa = mmu->prev_roots[i].hpa; in kvm_mmu_free_guest_mode_roots()
3634 if (!sp || sp->role.guest_mode) in kvm_mmu_free_guest_mode_roots()
3645 union kvm_mmu_page_role role = vcpu->arch.mmu->root_role; in mmu_alloc_root()
3655 ++sp->root_count; in mmu_alloc_root()
3657 return __pa(sp->spt); in mmu_alloc_root()
3662 struct kvm_mmu *mmu = vcpu->arch.mmu; in mmu_alloc_direct_roots()
3663 u8 shadow_root_level = mmu->root_role.level; in mmu_alloc_direct_roots()
3668 write_lock(&vcpu->kvm->mmu_lock); in mmu_alloc_direct_roots()
3675 mmu->root.hpa = root; in mmu_alloc_direct_roots()
3678 mmu->root.hpa = root; in mmu_alloc_direct_roots()
3680 if (WARN_ON_ONCE(!mmu->pae_root)) { in mmu_alloc_direct_roots()
3681 r = -EIO; in mmu_alloc_direct_roots()
3686 WARN_ON_ONCE(IS_VALID_PAE_ROOT(mmu->pae_root[i])); in mmu_alloc_direct_roots()
3688 root = mmu_alloc_root(vcpu, i << (30 - PAGE_SHIFT), 0, in mmu_alloc_direct_roots()
3690 mmu->pae_root[i] = root | PT_PRESENT_MASK | in mmu_alloc_direct_roots()
3693 mmu->root.hpa = __pa(mmu->pae_root); in mmu_alloc_direct_roots()
3696 r = -EIO; in mmu_alloc_direct_roots()
3701 mmu->root.pgd = 0; in mmu_alloc_direct_roots()
3703 write_unlock(&vcpu->kvm->mmu_lock); in mmu_alloc_direct_roots()
3720 mutex_lock(&kvm->slots_arch_lock); in mmu_first_shadow_root_alloc()
3738 * Both of these functions are no-ops if the target is in mmu_first_shadow_root_alloc()
3747 r = memslot_rmap_alloc(slot, slot->npages); in mmu_first_shadow_root_alloc()
3761 smp_store_release(&kvm->arch.shadow_root_allocated, true); in mmu_first_shadow_root_alloc()
3764 mutex_unlock(&kvm->slots_arch_lock); in mmu_first_shadow_root_alloc()
3770 struct kvm_mmu *mmu = vcpu->arch.mmu; in mmu_alloc_shadow_roots()
3780 mmu->root.hpa = kvm_mmu_get_dummy_root(); in mmu_alloc_shadow_roots()
3788 if (mmu->cpu_role.base.level == PT32E_ROOT_LEVEL) { in mmu_alloc_shadow_roots()
3790 pdptrs[i] = mmu->get_pdptr(vcpu, i); in mmu_alloc_shadow_roots()
3799 r = mmu_first_shadow_root_alloc(vcpu->kvm); in mmu_alloc_shadow_roots()
3803 write_lock(&vcpu->kvm->mmu_lock); in mmu_alloc_shadow_roots()
3809 * Do we shadow a long mode page table? If so we need to in mmu_alloc_shadow_roots()
3810 * write-protect the guests page table root. in mmu_alloc_shadow_roots()
3812 if (mmu->cpu_role.base.level >= PT64_ROOT_4LEVEL) { in mmu_alloc_shadow_roots()
3814 mmu->root_role.level); in mmu_alloc_shadow_roots()
3815 mmu->root.hpa = root; in mmu_alloc_shadow_roots()
3819 if (WARN_ON_ONCE(!mmu->pae_root)) { in mmu_alloc_shadow_roots()
3820 r = -EIO; in mmu_alloc_shadow_roots()
3825 * We shadow a 32 bit page table. This may be a legacy 2-level in mmu_alloc_shadow_roots()
3826 * or a PAE 3-level page table. In either case we need to be aware that in mmu_alloc_shadow_roots()
3827 * the shadow page table may be a PAE or a long mode page table. in mmu_alloc_shadow_roots()
3830 if (mmu->root_role.level >= PT64_ROOT_4LEVEL) { in mmu_alloc_shadow_roots()
3833 if (WARN_ON_ONCE(!mmu->pml4_root)) { in mmu_alloc_shadow_roots()
3834 r = -EIO; in mmu_alloc_shadow_roots()
3837 mmu->pml4_root[0] = __pa(mmu->pae_root) | pm_mask; in mmu_alloc_shadow_roots()
3839 if (mmu->root_role.level == PT64_ROOT_5LEVEL) { in mmu_alloc_shadow_roots()
3840 if (WARN_ON_ONCE(!mmu->pml5_root)) { in mmu_alloc_shadow_roots()
3841 r = -EIO; in mmu_alloc_shadow_roots()
3844 mmu->pml5_root[0] = __pa(mmu->pml4_root) | pm_mask; in mmu_alloc_shadow_roots()
3849 WARN_ON_ONCE(IS_VALID_PAE_ROOT(mmu->pae_root[i])); in mmu_alloc_shadow_roots()
3851 if (mmu->cpu_role.base.level == PT32E_ROOT_LEVEL) { in mmu_alloc_shadow_roots()
3853 mmu->pae_root[i] = INVALID_PAE_ROOT; in mmu_alloc_shadow_roots()
3860 * If shadowing 32-bit non-PAE page tables, each PAE page in mmu_alloc_shadow_roots()
3861 * directory maps one quarter of the guest's non-PAE page in mmu_alloc_shadow_roots()
3865 quadrant = (mmu->cpu_role.base.level == PT32_ROOT_LEVEL) ? i : 0; in mmu_alloc_shadow_roots()
3868 mmu->pae_root[i] = root | pm_mask; in mmu_alloc_shadow_roots()
3871 if (mmu->root_role.level == PT64_ROOT_5LEVEL) in mmu_alloc_shadow_roots()
3872 mmu->root.hpa = __pa(mmu->pml5_root); in mmu_alloc_shadow_roots()
3873 else if (mmu->root_role.level == PT64_ROOT_4LEVEL) in mmu_alloc_shadow_roots()
3874 mmu->root.hpa = __pa(mmu->pml4_root); in mmu_alloc_shadow_roots()
3876 mmu->root.hpa = __pa(mmu->pae_root); in mmu_alloc_shadow_roots()
3879 mmu->root.pgd = root_pgd; in mmu_alloc_shadow_roots()
3881 write_unlock(&vcpu->kvm->mmu_lock); in mmu_alloc_shadow_roots()
3888 struct kvm_mmu *mmu = vcpu->arch.mmu; in mmu_alloc_special_roots()
3889 bool need_pml5 = mmu->root_role.level > PT64_ROOT_4LEVEL; in mmu_alloc_special_roots()
3895 * When shadowing 32-bit or PAE NPT with 64-bit NPT, the PML4 and PDP in mmu_alloc_special_roots()
3898 * on demand, as running a 32-bit L1 VMM on 64-bit KVM is very rare. in mmu_alloc_special_roots()
3900 if (mmu->root_role.direct || in mmu_alloc_special_roots()
3901 mmu->cpu_role.base.level >= PT64_ROOT_4LEVEL || in mmu_alloc_special_roots()
3902 mmu->root_role.level < PT64_ROOT_4LEVEL) in mmu_alloc_special_roots()
3906 * NPT, the only paging mode that uses this horror, uses a fixed number in mmu_alloc_special_roots()
3907 * of levels for the shadow page tables, e.g. all MMUs are 4-level or in mmu_alloc_special_roots()
3908 * all MMus are 5-level. Thus, this can safely require that pml5_root in mmu_alloc_special_roots()
3912 if (mmu->pae_root && mmu->pml4_root && (!need_pml5 || mmu->pml5_root)) in mmu_alloc_special_roots()
3919 if (WARN_ON_ONCE(!tdp_enabled || mmu->pae_root || mmu->pml4_root || in mmu_alloc_special_roots()
3920 (need_pml5 && mmu->pml5_root))) in mmu_alloc_special_roots()
3921 return -EIO; in mmu_alloc_special_roots()
3924 * Unlike 32-bit NPT, the PDP table doesn't need to be in low mem, and in mmu_alloc_special_roots()
3929 return -ENOMEM; in mmu_alloc_special_roots()
3943 mmu->pae_root = pae_root; in mmu_alloc_special_roots()
3944 mmu->pml4_root = pml4_root; in mmu_alloc_special_roots()
3945 mmu->pml5_root = pml5_root; in mmu_alloc_special_roots()
3954 return -ENOMEM; in mmu_alloc_special_roots()
3967 * walk before the reads of sp->unsync/sp->unsync_children here. in is_unsync_root()
3969 * Even if another CPU was marking the SP as unsync-ed simultaneously, in is_unsync_root()
3970 * any guest page table changes are not guaranteed to be visible anyway in is_unsync_root()
3987 if (sp->unsync || sp->unsync_children) in is_unsync_root()
3998 if (vcpu->arch.mmu->root_role.direct) in kvm_mmu_sync_roots()
4001 if (!VALID_PAGE(vcpu->arch.mmu->root.hpa)) in kvm_mmu_sync_roots()
4006 if (vcpu->arch.mmu->cpu_role.base.level >= PT64_ROOT_4LEVEL) { in kvm_mmu_sync_roots()
4007 hpa_t root = vcpu->arch.mmu->root.hpa; in kvm_mmu_sync_roots()
4014 write_lock(&vcpu->kvm->mmu_lock); in kvm_mmu_sync_roots()
4016 write_unlock(&vcpu->kvm->mmu_lock); in kvm_mmu_sync_roots()
4020 write_lock(&vcpu->kvm->mmu_lock); in kvm_mmu_sync_roots()
4023 hpa_t root = vcpu->arch.mmu->pae_root[i]; in kvm_mmu_sync_roots()
4031 write_unlock(&vcpu->kvm->mmu_lock); in kvm_mmu_sync_roots()
4040 if (is_unsync_root(vcpu->arch.mmu->prev_roots[i].hpa)) in kvm_mmu_sync_prev_roots()
4044 kvm_mmu_free_roots(vcpu->kvm, vcpu->arch.mmu, roots_to_free); in kvm_mmu_sync_prev_roots()
4052 exception->error_code = 0; in nonpaging_gva_to_gpa()
4073 * That SPTE may be non-present.
4080 int leaf = -1; in get_walk()
4096 /* return true if reserved bit(s) are detected on a valid, non-MMIO SPTE. */
4124 * to detect reserved bits on non-MMIO SPTEs. i.e. buggy SPTEs. in get_mmio_spte()
4129 rsvd_check = &vcpu->arch.mmu->shadow_zero_check; in get_mmio_spte()
4131 for (level = root; level >= leaf; level--) in get_mmio_spte()
4135 pr_err("%s: reserved bits set on MMU-present spte, addr 0x%llx, hierarchy:\n", in get_mmio_spte()
4137 for (level = root; level >= leaf; level--) in get_mmio_spte()
4138 pr_err("------ spte = 0x%llx level = %d, rsvd bits = 0x%llx", in get_mmio_spte()
4156 return -EINVAL; in handle_mmio_page_fault()
4183 if (unlikely(fault->rsvd)) in page_fault_handle_page_track()
4186 if (!fault->present || !fault->write) in page_fault_handle_page_track()
4193 if (kvm_gfn_is_write_tracked(vcpu->kvm, fault->slot, fault->gfn)) in page_fault_handle_page_track()
4213 u32 id = vcpu->arch.apf.id; in alloc_apf_token()
4216 vcpu->arch.apf.id = 1; in alloc_apf_token()
4218 return (vcpu->arch.apf.id++ << 12) | vcpu->vcpu_id; in alloc_apf_token()
4228 arch.direct_map = vcpu->arch.mmu->root_role.direct; in kvm_arch_setup_async_pf()
4229 arch.cr3 = kvm_mmu_get_guest_pgd(vcpu, vcpu->arch.mmu); in kvm_arch_setup_async_pf()
4239 if ((vcpu->arch.mmu->root_role.direct != work->arch.direct_map) || in kvm_arch_async_page_ready()
4240 work->wakeup_all) in kvm_arch_async_page_ready()
4247 if (!vcpu->arch.mmu->root_role.direct && in kvm_arch_async_page_ready()
4248 work->arch.cr3 != kvm_mmu_get_guest_pgd(vcpu, vcpu->arch.mmu)) in kvm_arch_async_page_ready()
4251 kvm_mmu_do_page_fault(vcpu, work->cr2_or_gpa, 0, true, NULL); in kvm_arch_async_page_ready()
4256 struct kvm_memory_slot *slot = fault->slot; in __kvm_faultin_pfn()
4264 if (slot && (slot->flags & KVM_MEMSLOT_INVALID)) in __kvm_faultin_pfn()
4270 fault->slot = NULL; in __kvm_faultin_pfn()
4271 fault->pfn = KVM_PFN_NOSLOT; in __kvm_faultin_pfn()
4272 fault->map_writable = false; in __kvm_faultin_pfn()
4279 * when the AVIC is re-enabled. in __kvm_faultin_pfn()
4281 if (slot && slot->id == APIC_ACCESS_PAGE_PRIVATE_MEMSLOT && in __kvm_faultin_pfn()
4282 !kvm_apicv_activated(vcpu->kvm)) in __kvm_faultin_pfn()
4287 fault->pfn = __gfn_to_pfn_memslot(slot, fault->gfn, false, false, &async, in __kvm_faultin_pfn()
4288 fault->write, &fault->map_writable, in __kvm_faultin_pfn()
4289 &fault->hva); in __kvm_faultin_pfn()
4293 if (!fault->prefetch && kvm_can_do_async_pf(vcpu)) { in __kvm_faultin_pfn()
4294 trace_kvm_try_async_get_page(fault->addr, fault->gfn); in __kvm_faultin_pfn()
4295 if (kvm_find_async_pf_gfn(vcpu, fault->gfn)) { in __kvm_faultin_pfn()
4296 trace_kvm_async_pf_repeated_fault(fault->addr, fault->gfn); in __kvm_faultin_pfn()
4299 } else if (kvm_arch_setup_async_pf(vcpu, fault->addr, fault->gfn)) { in __kvm_faultin_pfn()
4305 * Allow gup to bail on pending non-fatal signals when it's also allowed in __kvm_faultin_pfn()
4309 fault->pfn = __gfn_to_pfn_memslot(slot, fault->gfn, false, true, NULL, in __kvm_faultin_pfn()
4310 fault->write, &fault->map_writable, in __kvm_faultin_pfn()
4311 &fault->hva); in __kvm_faultin_pfn()
4320 fault->mmu_seq = vcpu->kvm->mmu_invalidate_seq; in kvm_faultin_pfn()
4327 if (unlikely(is_error_pfn(fault->pfn))) in kvm_faultin_pfn()
4330 if (unlikely(!fault->slot)) in kvm_faultin_pfn()
4343 struct kvm_mmu_page *sp = root_to_sp(vcpu->arch.mmu->root.hpa); in is_page_fault_stale()
4346 if (sp && is_obsolete_sp(vcpu->kvm, sp)) in is_page_fault_stale()
4360 return fault->slot && in is_page_fault_stale()
4361 mmu_invalidate_retry_hva(vcpu->kvm, fault->mmu_seq, fault->hva); in is_page_fault_stale()
4369 if (WARN_ON_ONCE(kvm_mmu_is_dummy_root(vcpu->arch.mmu->root.hpa))) in direct_page_fault()
4388 write_lock(&vcpu->kvm->mmu_lock); in direct_page_fault()
4400 write_unlock(&vcpu->kvm->mmu_lock); in direct_page_fault()
4401 kvm_release_pfn_clean(fault->pfn); in direct_page_fault()
4409 fault->max_level = PG_LEVEL_2M; in nonpaging_page_fault()
4417 u32 flags = vcpu->arch.apf.host_apf_flags; in kvm_handle_page_fault()
4420 /* A 64-bit CR2 should be impossible on 32-bit KVM. */ in kvm_handle_page_fault()
4422 return -EFAULT; in kvm_handle_page_fault()
4425 vcpu->arch.l1tf_flush_l1d = true; in kvm_handle_page_fault()
4434 vcpu->arch.apf.host_apf_flags = 0; in kvm_handle_page_fault()
4468 read_lock(&vcpu->kvm->mmu_lock); in kvm_tdp_mmu_page_fault()
4476 read_unlock(&vcpu->kvm->mmu_lock); in kvm_tdp_mmu_page_fault()
4477 kvm_release_pfn_clean(fault->pfn); in kvm_tdp_mmu_page_fault()
4488 * (shadow_memtype_mask is non-zero), and the VM has non-coherent DMA in kvm_tdp_page_fault()
4496 if (shadow_memtype_mask && kvm_arch_has_noncoherent_dma(vcpu->kvm)) { in kvm_tdp_page_fault()
4497 for ( ; fault->max_level > PG_LEVEL_4K; --fault->max_level) { in kvm_tdp_page_fault()
4498 int page_num = KVM_PAGES_PER_HPAGE(fault->max_level); in kvm_tdp_page_fault()
4499 gfn_t base = gfn_round_for_level(fault->gfn, in kvm_tdp_page_fault()
4500 fault->max_level); in kvm_tdp_page_fault()
4517 context->page_fault = nonpaging_page_fault; in nonpaging_init_context()
4518 context->gva_to_gpa = nonpaging_gva_to_gpa; in nonpaging_init_context()
4519 context->sync_spte = NULL; in nonpaging_init_context()
4527 if (!VALID_PAGE(root->hpa)) in is_root_usable()
4530 if (!role.direct && pgd != root->pgd) in is_root_usable()
4533 sp = root_to_sp(root->hpa); in is_root_usable()
4537 return role.word == sp->role.word; in is_root_usable()
4543 * If a matching root is found, it is assigned to kvm_mmu->root and
4545 * If no match is found, kvm_mmu->root is left invalid, the LRU root is
4554 if (is_root_usable(&mmu->root, new_pgd, new_role)) in cached_root_find_and_keep_current()
4566 swap(mmu->root, mmu->prev_roots[i]); in cached_root_find_and_keep_current()
4567 if (is_root_usable(&mmu->root, new_pgd, new_role)) in cached_root_find_and_keep_current()
4577 * On entry, mmu->root is invalid.
4578 * If a matching root is found, it is assigned to kvm_mmu->root, the LRU entry
4580 * If no match is found, kvm_mmu->root is left invalid and false is returned.
4589 if (is_root_usable(&mmu->prev_roots[i], new_pgd, new_role)) in cached_root_find_without_current()
4595 swap(mmu->root, mmu->prev_roots[i]); in cached_root_find_without_current()
4597 for (; i < KVM_MMU_NUM_PREV_ROOTS - 1; i++) in cached_root_find_without_current()
4598 mmu->prev_roots[i] = mmu->prev_roots[i + 1]; in cached_root_find_without_current()
4599 mmu->prev_roots[i].hpa = INVALID_PAGE; in cached_root_find_without_current()
4607 * Limit reuse to 64-bit hosts+VMs without "special" roots in order to in fast_pgd_switch()
4610 if (VALID_PAGE(mmu->root.hpa) && !root_to_sp(mmu->root.hpa)) in fast_pgd_switch()
4613 if (VALID_PAGE(mmu->root.hpa)) in fast_pgd_switch()
4621 struct kvm_mmu *mmu = vcpu->arch.mmu; in kvm_mmu_new_pgd()
4622 union kvm_mmu_page_role new_role = mmu->root_role; in kvm_mmu_new_pgd()
4626 * will establish a valid root prior to the next VM-Enter. in kvm_mmu_new_pgd()
4628 if (!fast_pgd_switch(vcpu->kvm, mmu, new_pgd, new_role)) in kvm_mmu_new_pgd()
4646 * switching to a new CR3, that GVA->GPA mapping may no longer be in kvm_mmu_new_pgd()
4657 struct kvm_mmu_page *sp = root_to_sp(vcpu->arch.mmu->root.hpa); in kvm_mmu_new_pgd()
4702 rsvd_check->bad_mt_xwr = 0; in __reset_rsvds_bits_mask()
4717 * Non-leaf PML4Es and PDPEs reserve bit 8 (which would be the G bit for in __reset_rsvds_bits_mask()
4726 rsvd_check->rsvd_bits_mask[0][1] = 0; in __reset_rsvds_bits_mask()
4727 rsvd_check->rsvd_bits_mask[0][0] = 0; in __reset_rsvds_bits_mask()
4728 rsvd_check->rsvd_bits_mask[1][0] = in __reset_rsvds_bits_mask()
4729 rsvd_check->rsvd_bits_mask[0][0]; in __reset_rsvds_bits_mask()
4732 rsvd_check->rsvd_bits_mask[1][1] = 0; in __reset_rsvds_bits_mask()
4738 rsvd_check->rsvd_bits_mask[1][1] = rsvd_bits(17, 21); in __reset_rsvds_bits_mask()
4741 rsvd_check->rsvd_bits_mask[1][1] = rsvd_bits(13, 21); in __reset_rsvds_bits_mask()
4744 rsvd_check->rsvd_bits_mask[0][2] = rsvd_bits(63, 63) | in __reset_rsvds_bits_mask()
4748 rsvd_check->rsvd_bits_mask[0][1] = high_bits_rsvd; /* PDE */ in __reset_rsvds_bits_mask()
4749 rsvd_check->rsvd_bits_mask[0][0] = high_bits_rsvd; /* PTE */ in __reset_rsvds_bits_mask()
4750 rsvd_check->rsvd_bits_mask[1][1] = high_bits_rsvd | in __reset_rsvds_bits_mask()
4752 rsvd_check->rsvd_bits_mask[1][0] = in __reset_rsvds_bits_mask()
4753 rsvd_check->rsvd_bits_mask[0][0]; in __reset_rsvds_bits_mask()
4756 rsvd_check->rsvd_bits_mask[0][4] = high_bits_rsvd | in __reset_rsvds_bits_mask()
4759 rsvd_check->rsvd_bits_mask[1][4] = in __reset_rsvds_bits_mask()
4760 rsvd_check->rsvd_bits_mask[0][4]; in __reset_rsvds_bits_mask()
4763 rsvd_check->rsvd_bits_mask[0][3] = high_bits_rsvd | in __reset_rsvds_bits_mask()
4766 rsvd_check->rsvd_bits_mask[0][2] = high_bits_rsvd | in __reset_rsvds_bits_mask()
4768 rsvd_check->rsvd_bits_mask[0][1] = high_bits_rsvd; in __reset_rsvds_bits_mask()
4769 rsvd_check->rsvd_bits_mask[0][0] = high_bits_rsvd; in __reset_rsvds_bits_mask()
4770 rsvd_check->rsvd_bits_mask[1][3] = in __reset_rsvds_bits_mask()
4771 rsvd_check->rsvd_bits_mask[0][3]; in __reset_rsvds_bits_mask()
4772 rsvd_check->rsvd_bits_mask[1][2] = high_bits_rsvd | in __reset_rsvds_bits_mask()
4775 rsvd_check->rsvd_bits_mask[1][1] = high_bits_rsvd | in __reset_rsvds_bits_mask()
4777 rsvd_check->rsvd_bits_mask[1][0] = in __reset_rsvds_bits_mask()
4778 rsvd_check->rsvd_bits_mask[0][0]; in __reset_rsvds_bits_mask()
4786 __reset_rsvds_bits_mask(&context->guest_rsvd_check, in reset_guest_rsvds_bits_mask()
4787 vcpu->arch.reserved_gpa_bits, in reset_guest_rsvds_bits_mask()
4788 context->cpu_role.base.level, is_efer_nx(context), in reset_guest_rsvds_bits_mask()
4807 rsvd_check->rsvd_bits_mask[0][4] = high_bits_rsvd | rsvd_bits(3, 7); in __reset_rsvds_bits_mask_ept()
4808 rsvd_check->rsvd_bits_mask[0][3] = high_bits_rsvd | rsvd_bits(3, 7); in __reset_rsvds_bits_mask_ept()
4809 rsvd_check->rsvd_bits_mask[0][2] = high_bits_rsvd | rsvd_bits(3, 6) | large_1g_rsvd; in __reset_rsvds_bits_mask_ept()
4810 rsvd_check->rsvd_bits_mask[0][1] = high_bits_rsvd | rsvd_bits(3, 6) | large_2m_rsvd; in __reset_rsvds_bits_mask_ept()
4811 rsvd_check->rsvd_bits_mask[0][0] = high_bits_rsvd; in __reset_rsvds_bits_mask_ept()
4814 rsvd_check->rsvd_bits_mask[1][4] = rsvd_check->rsvd_bits_mask[0][4]; in __reset_rsvds_bits_mask_ept()
4815 rsvd_check->rsvd_bits_mask[1][3] = rsvd_check->rsvd_bits_mask[0][3]; in __reset_rsvds_bits_mask_ept()
4816 rsvd_check->rsvd_bits_mask[1][2] = high_bits_rsvd | rsvd_bits(12, 29) | large_1g_rsvd; in __reset_rsvds_bits_mask_ept()
4817 rsvd_check->rsvd_bits_mask[1][1] = high_bits_rsvd | rsvd_bits(12, 20) | large_2m_rsvd; in __reset_rsvds_bits_mask_ept()
4818 rsvd_check->rsvd_bits_mask[1][0] = rsvd_check->rsvd_bits_mask[0][0]; in __reset_rsvds_bits_mask_ept()
4829 rsvd_check->bad_mt_xwr = bad_mt_xwr; in __reset_rsvds_bits_mask_ept()
4835 __reset_rsvds_bits_mask_ept(&context->guest_rsvd_check, in reset_rsvds_bits_mask_ept()
4836 vcpu->arch.reserved_gpa_bits, execonly, in reset_rsvds_bits_mask_ept()
4855 /* KVM doesn't use 2-level page tables for the shadow MMU. */ in reset_shadow_zero_bits_mask()
4860 WARN_ON_ONCE(context->root_role.level < PT32E_ROOT_LEVEL); in reset_shadow_zero_bits_mask()
4862 shadow_zero_check = &context->shadow_zero_check; in reset_shadow_zero_bits_mask()
4864 context->root_role.level, in reset_shadow_zero_bits_mask()
4865 context->root_role.efer_nx, in reset_shadow_zero_bits_mask()
4872 for (i = context->root_role.level; --i >= 0;) { in reset_shadow_zero_bits_mask()
4879 shadow_zero_check->rsvd_bits_mask[0][i] |= shadow_me_mask; in reset_shadow_zero_bits_mask()
4880 shadow_zero_check->rsvd_bits_mask[1][i] |= shadow_me_mask; in reset_shadow_zero_bits_mask()
4881 shadow_zero_check->rsvd_bits_mask[0][i] &= ~shadow_me_value; in reset_shadow_zero_bits_mask()
4882 shadow_zero_check->rsvd_bits_mask[1][i] &= ~shadow_me_value; in reset_shadow_zero_bits_mask()
4895 * possible, however, kvm currently does not do execution-protection.
4902 shadow_zero_check = &context->shadow_zero_check; in reset_tdp_shadow_zero_bits_mask()
4906 context->root_role.level, true, in reset_tdp_shadow_zero_bits_mask()
4917 for (i = context->root_role.level; --i >= 0;) { in reset_tdp_shadow_zero_bits_mask()
4918 shadow_zero_check->rsvd_bits_mask[0][i] &= ~shadow_me_mask; in reset_tdp_shadow_zero_bits_mask()
4919 shadow_zero_check->rsvd_bits_mask[1][i] &= ~shadow_me_mask; in reset_tdp_shadow_zero_bits_mask()
4930 __reset_rsvds_bits_mask_ept(&context->shadow_zero_check, in reset_ept_shadow_zero_bits_mask()
4958 for (byte = 0; byte < ARRAY_SIZE(mmu->permissions); ++byte) { in update_permission_bitmask()
4966 /* Faults from writes to non-writable pages */ in update_permission_bitmask()
4968 /* Faults from user mode accesses to supervisor pages */ in update_permission_bitmask()
4970 /* Faults from fetches of non-executable pages*/ in update_permission_bitmask()
4972 /* Faults from kernel mode fetches of user pages */ in update_permission_bitmask()
4974 /* Faults from kernel mode accesses of user pages */ in update_permission_bitmask()
4978 /* Faults from kernel mode accesses to user pages */ in update_permission_bitmask()
4985 /* Allow supervisor writes if !cr0.wp */ in update_permission_bitmask()
4989 /* Disallow supervisor fetches of user code if cr4.smep */ in update_permission_bitmask()
4994 * SMAP:kernel-mode data accesses from user-mode in update_permission_bitmask()
4998 * - X86_CR4_SMAP is set in CR4 in update_permission_bitmask()
4999 * - A user page is accessed in update_permission_bitmask()
5000 * - The access is not a fetch in update_permission_bitmask()
5001 * - The access is supervisor mode in update_permission_bitmask()
5002 * - If implicit supervisor access or X86_EFLAGS_AC is clear in update_permission_bitmask()
5013 mmu->permissions[byte] = ff | uf | wf | smepf | smapf; in update_permission_bitmask()
5019 * user-mode addresses based on the value in the PKRU register. Protection
5028 * - PK is always zero unless CR4.PKE=1 and EFER.LMA=1
5029 * - PK is always zero if RSVD=1 (reserved bit set) or F=1 (instruction fetch)
5030 * - PK is always zero if U=0 in the page tables
5031 * - PKRU.WD is ignored if CR0.WP=0 and the access is a supervisor access.
5046 mmu->pkru_mask = 0; in update_pkru_bitmask()
5053 for (bit = 0; bit < ARRAY_SIZE(mmu->permissions); ++bit) { in update_pkru_bitmask()
5081 mmu->pkru_mask |= (pkey_bits & 3) << pfec; in update_pkru_bitmask()
5098 context->page_fault = paging64_page_fault; in paging64_init_context()
5099 context->gva_to_gpa = paging64_gva_to_gpa; in paging64_init_context()
5100 context->sync_spte = paging64_sync_spte; in paging64_init_context()
5105 context->page_fault = paging32_page_fault; in paging32_init_context()
5106 context->gva_to_gpa = paging32_gva_to_gpa; in paging32_init_context()
5107 context->sync_spte = paging32_sync_spte; in paging32_init_context()
5143 /* PKEY and LA57 are active iff long mode is active. */ in kvm_calc_cpu_role()
5161 mmu->cpu_role.base.cr0_wp = cr0_wp; in __kvm_mmu_refresh_passthrough_bits()
5171 /* Use 5-level TDP if and only if it's useful/necessary. */ in kvm_mmu_get_tdp_level()
5200 struct kvm_mmu *context = &vcpu->arch.root_mmu; in init_kvm_tdp_mmu()
5203 if (cpu_role.as_u64 == context->cpu_role.as_u64 && in init_kvm_tdp_mmu()
5204 root_role.word == context->root_role.word) in init_kvm_tdp_mmu()
5207 context->cpu_role.as_u64 = cpu_role.as_u64; in init_kvm_tdp_mmu()
5208 context->root_role.word = root_role.word; in init_kvm_tdp_mmu()
5209 context->page_fault = kvm_tdp_page_fault; in init_kvm_tdp_mmu()
5210 context->sync_spte = NULL; in init_kvm_tdp_mmu()
5211 context->get_guest_pgd = get_guest_cr3; in init_kvm_tdp_mmu()
5212 context->get_pdptr = kvm_pdptr_read; in init_kvm_tdp_mmu()
5213 context->inject_page_fault = kvm_inject_page_fault; in init_kvm_tdp_mmu()
5216 context->gva_to_gpa = nonpaging_gva_to_gpa; in init_kvm_tdp_mmu()
5218 context->gva_to_gpa = paging64_gva_to_gpa; in init_kvm_tdp_mmu()
5220 context->gva_to_gpa = paging32_gva_to_gpa; in init_kvm_tdp_mmu()
5230 if (cpu_role.as_u64 == context->cpu_role.as_u64 && in shadow_mmu_init_context()
5231 root_role.word == context->root_role.word) in shadow_mmu_init_context()
5234 context->cpu_role.as_u64 = cpu_role.as_u64; in shadow_mmu_init_context()
5235 context->root_role.word = root_role.word; in shadow_mmu_init_context()
5251 struct kvm_mmu *context = &vcpu->arch.root_mmu; in kvm_init_shadow_mmu()
5256 /* KVM uses PAE paging whenever the guest isn't using 64-bit paging. */ in kvm_init_shadow_mmu()
5262 * notably for huge SPTEs if iTLB multi-hit mitigation is enabled and in kvm_init_shadow_mmu()
5264 * The iTLB multi-hit workaround can be toggled at any time, so assume in kvm_init_shadow_mmu()
5265 * NX can be used by any non-nested shadow MMU to avoid having to reset in kvm_init_shadow_mmu()
5276 struct kvm_mmu *context = &vcpu->arch.guest_mmu; in kvm_init_shadow_npt_mmu()
5328 struct kvm_mmu *context = &vcpu->arch.guest_mmu; in kvm_init_shadow_ept_mmu()
5334 if (new_mode.as_u64 != context->cpu_role.as_u64) { in kvm_init_shadow_ept_mmu()
5336 context->cpu_role.as_u64 = new_mode.as_u64; in kvm_init_shadow_ept_mmu()
5337 context->root_role.word = new_mode.base.word; in kvm_init_shadow_ept_mmu()
5339 context->page_fault = ept_page_fault; in kvm_init_shadow_ept_mmu()
5340 context->gva_to_gpa = ept_gva_to_gpa; in kvm_init_shadow_ept_mmu()
5341 context->sync_spte = ept_sync_spte; in kvm_init_shadow_ept_mmu()
5344 context->pkru_mask = 0; in kvm_init_shadow_ept_mmu()
5356 struct kvm_mmu *context = &vcpu->arch.root_mmu; in init_kvm_softmmu()
5360 context->get_guest_pgd = get_guest_cr3; in init_kvm_softmmu()
5361 context->get_pdptr = kvm_pdptr_read; in init_kvm_softmmu()
5362 context->inject_page_fault = kvm_inject_page_fault; in init_kvm_softmmu()
5368 struct kvm_mmu *g_context = &vcpu->arch.nested_mmu; in init_kvm_nested_mmu()
5370 if (new_mode.as_u64 == g_context->cpu_role.as_u64) in init_kvm_nested_mmu()
5373 g_context->cpu_role.as_u64 = new_mode.as_u64; in init_kvm_nested_mmu()
5374 g_context->get_guest_pgd = get_guest_cr3; in init_kvm_nested_mmu()
5375 g_context->get_pdptr = kvm_pdptr_read; in init_kvm_nested_mmu()
5376 g_context->inject_page_fault = kvm_inject_page_fault; in init_kvm_nested_mmu()
5382 g_context->sync_spte = NULL; in init_kvm_nested_mmu()
5385 * Note that arch.mmu->gva_to_gpa translates l2_gpa to l1_gpa using in init_kvm_nested_mmu()
5393 g_context->gva_to_gpa = nonpaging_gva_to_gpa; in init_kvm_nested_mmu()
5395 g_context->gva_to_gpa = paging64_gva_to_gpa; in init_kvm_nested_mmu()
5397 g_context->gva_to_gpa = paging64_gva_to_gpa; in init_kvm_nested_mmu()
5399 g_context->gva_to_gpa = paging32_gva_to_gpa; in init_kvm_nested_mmu()
5432 vcpu->arch.root_mmu.root_role.word = 0; in kvm_mmu_after_set_cpuid()
5433 vcpu->arch.guest_mmu.root_role.word = 0; in kvm_mmu_after_set_cpuid()
5434 vcpu->arch.nested_mmu.root_role.word = 0; in kvm_mmu_after_set_cpuid()
5435 vcpu->arch.root_mmu.cpu_role.ext.valid = 0; in kvm_mmu_after_set_cpuid()
5436 vcpu->arch.guest_mmu.cpu_role.ext.valid = 0; in kvm_mmu_after_set_cpuid()
5437 vcpu->arch.nested_mmu.cpu_role.ext.valid = 0; in kvm_mmu_after_set_cpuid()
5444 KVM_BUG_ON(kvm_vcpu_has_run(vcpu), vcpu->kvm); in kvm_mmu_after_set_cpuid()
5458 r = mmu_topup_memory_caches(vcpu, !vcpu->arch.mmu->root_role.direct); in kvm_mmu_load()
5464 if (vcpu->arch.mmu->root_role.direct) in kvm_mmu_load()
5489 struct kvm *kvm = vcpu->kvm; in kvm_mmu_unload()
5491 kvm_mmu_free_roots(kvm, &vcpu->arch.root_mmu, KVM_MMU_ROOTS_ALL); in kvm_mmu_unload()
5492 WARN_ON_ONCE(VALID_PAGE(vcpu->arch.root_mmu.root.hpa)); in kvm_mmu_unload()
5493 kvm_mmu_free_roots(kvm, &vcpu->arch.guest_mmu, KVM_MMU_ROOTS_ALL); in kvm_mmu_unload()
5494 WARN_ON_ONCE(VALID_PAGE(vcpu->arch.guest_mmu.root.hpa)); in kvm_mmu_unload()
5516 * is unlikely to zap an in-use PGD. in is_obsolete_root()
5530 if (is_obsolete_root(kvm, mmu->root.hpa)) in __kvm_mmu_free_obsolete_roots()
5534 if (is_obsolete_root(kvm, mmu->prev_roots[i].hpa)) in __kvm_mmu_free_obsolete_roots()
5544 __kvm_mmu_free_obsolete_roots(vcpu->kvm, &vcpu->arch.root_mmu); in kvm_mmu_free_obsolete_roots()
5545 __kvm_mmu_free_obsolete_roots(vcpu->kvm, &vcpu->arch.guest_mmu); in kvm_mmu_free_obsolete_roots()
5556 * as the current vcpu paging mode since we update the sptes only in mmu_pte_write_fetch_gpte()
5557 * when they have the same mode. in mmu_pte_write_fetch_gpte()
5560 /* Handle a 32-bit guest writing two halves of a 64-bit gpte */ in mmu_pte_write_fetch_gpte()
5581 * Skip write-flooding detected for the sp whose level is 1, because in detect_write_flooding()
5582 * it can become unsync, then the guest page is not write-protected. in detect_write_flooding()
5584 if (sp->role.level == PG_LEVEL_4K) in detect_write_flooding()
5587 atomic_inc(&sp->write_flooding_count); in detect_write_flooding()
5588 return atomic_read(&sp->write_flooding_count) >= 3; in detect_write_flooding()
5601 pte_size = sp->role.has_4_byte_gpte ? 4 : 8; in detect_write_misaligned()
5607 if (!(offset & (pte_size - 1)) && bytes == 1) in detect_write_misaligned()
5610 misaligned = (offset ^ (offset + bytes - 1)) & ~(pte_size - 1); in detect_write_misaligned()
5623 level = sp->role.level; in get_written_sptes()
5625 if (sp->role.has_4_byte_gpte) { in get_written_sptes()
5626 page_offset <<= 1; /* 32->64 */ in get_written_sptes()
5628 * A 32-bit pde maps 4MB while the shadow pdes map in get_written_sptes()
5639 if (quadrant != sp->role.quadrant) in get_written_sptes()
5643 spte = &sp->spt[page_offset / sizeof(*spte)]; in get_written_sptes()
5659 * write-protected, so we can exit simply. in kvm_mmu_track_write()
5661 if (!READ_ONCE(vcpu->kvm->arch.indirect_shadow_pages)) in kvm_mmu_track_write()
5664 write_lock(&vcpu->kvm->mmu_lock); in kvm_mmu_track_write()
5668 ++vcpu->kvm->stat.mmu_pte_write; in kvm_mmu_track_write()
5670 for_each_gfn_valid_sp_with_gptes(vcpu->kvm, sp, gfn) { in kvm_mmu_track_write()
5673 kvm_mmu_prepare_zap_page(vcpu->kvm, sp, &invalid_list); in kvm_mmu_track_write()
5674 ++vcpu->kvm->stat.mmu_flooded; in kvm_mmu_track_write()
5682 while (npte--) { in kvm_mmu_track_write()
5684 mmu_page_zap_pte(vcpu->kvm, sp, spte, NULL); in kvm_mmu_track_write()
5685 if (gentry && sp->role.level != PG_LEVEL_4K) in kvm_mmu_track_write()
5686 ++vcpu->kvm->stat.mmu_pde_zapped; in kvm_mmu_track_write()
5692 kvm_mmu_remote_flush_or_zap(vcpu->kvm, &invalid_list, flush); in kvm_mmu_track_write()
5693 write_unlock(&vcpu->kvm->mmu_lock); in kvm_mmu_track_write()
5700 bool direct = vcpu->arch.mmu->root_role.direct; in kvm_mmu_page_fault()
5703 * IMPLICIT_ACCESS is a KVM-defined flag used to correctly perform SMAP in kvm_mmu_page_fault()
5706 * with the KVM-defined value. Clear the flag and continue on, i.e. in kvm_mmu_page_fault()
5713 if (WARN_ON_ONCE(!VALID_PAGE(vcpu->arch.mmu->root.hpa))) in kvm_mmu_page_fault()
5727 if (KVM_BUG_ON(r == RET_PF_INVALID, vcpu->kvm)) in kvm_mmu_page_fault()
5728 return -EIO; in kvm_mmu_page_fault()
5743 if (vcpu->arch.mmu->root_role.direct && in kvm_mmu_page_fault()
5745 kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(cr2_or_gpa)); in kvm_mmu_page_fault()
5750 * vcpu->arch.mmu.page_fault returned RET_PF_EMULATE, but we can still in kvm_mmu_page_fault()
5752 * re-execute the instruction that caused the page fault. Do not allow in kvm_mmu_page_fault()
5755 * faulting on the non-existent MMIO address. Retrying an instruction in kvm_mmu_page_fault()
5780 if (WARN_ON_ONCE(mmu != vcpu->arch.mmu)) in __kvm_mmu_invalidate_addr()
5786 write_lock(&vcpu->kvm->mmu_lock); in __kvm_mmu_invalidate_addr()
5790 if (sp->unsync) { in __kvm_mmu_invalidate_addr()
5794 mmu_page_zap_pte(vcpu->kvm, sp, iterator.sptep, NULL); in __kvm_mmu_invalidate_addr()
5796 kvm_flush_remote_tlbs_sptep(vcpu->kvm, iterator.sptep); in __kvm_mmu_invalidate_addr()
5799 if (!sp->unsync_children) in __kvm_mmu_invalidate_addr()
5802 write_unlock(&vcpu->kvm->mmu_lock); in __kvm_mmu_invalidate_addr()
5812 /* It's actually a GPA for vcpu->arch.guest_mmu. */ in kvm_mmu_invalidate_addr()
5813 if (mmu != &vcpu->arch.guest_mmu) { in kvm_mmu_invalidate_addr()
5814 /* INVLPG on a non-canonical address is a NOP according to the SDM. */ in kvm_mmu_invalidate_addr()
5821 if (!mmu->sync_spte) in kvm_mmu_invalidate_addr()
5825 __kvm_mmu_invalidate_addr(vcpu, mmu, addr, mmu->root.hpa); in kvm_mmu_invalidate_addr()
5829 __kvm_mmu_invalidate_addr(vcpu, mmu, addr, mmu->prev_roots[i].hpa); in kvm_mmu_invalidate_addr()
5846 kvm_mmu_invalidate_addr(vcpu, vcpu->arch.walk_mmu, gva, KVM_MMU_ROOTS_ALL); in kvm_mmu_invlpg()
5847 ++vcpu->stat.invlpg; in kvm_mmu_invlpg()
5854 struct kvm_mmu *mmu = vcpu->arch.mmu; in kvm_mmu_invpcid_gva()
5862 if (VALID_PAGE(mmu->prev_roots[i].hpa) && in kvm_mmu_invpcid_gva()
5863 pcid == kvm_get_pcid(vcpu, mmu->prev_roots[i].pgd)) in kvm_mmu_invpcid_gva()
5869 ++vcpu->stat.invlpg; in kvm_mmu_invpcid_gva()
5918 lockdep_assert_held_write(&kvm->mmu_lock); in __walk_slot_rmaps()
5925 if (need_resched() || rwlock_needbreak(&kvm->mmu_lock)) { in __walk_slot_rmaps()
5928 iterator.gfn - start_gfn + 1); in __walk_slot_rmaps()
5931 cond_resched_rwlock_write(&kvm->mmu_lock); in __walk_slot_rmaps()
5945 slot->base_gfn, slot->base_gfn + slot->npages - 1, in walk_slot_rmaps()
5959 if (!tdp_enabled && mmu->pae_root) in free_mmu_pages()
5960 set_memory_encrypted((unsigned long)mmu->pae_root, 1); in free_mmu_pages()
5961 free_page((unsigned long)mmu->pae_root); in free_mmu_pages()
5962 free_page((unsigned long)mmu->pml4_root); in free_mmu_pages()
5963 free_page((unsigned long)mmu->pml5_root); in free_mmu_pages()
5971 mmu->root.hpa = INVALID_PAGE; in __kvm_mmu_create()
5972 mmu->root.pgd = 0; in __kvm_mmu_create()
5974 mmu->prev_roots[i] = KVM_MMU_ROOT_INFO_INVALID; in __kvm_mmu_create()
5976 /* vcpu->arch.guest_mmu isn't used when !tdp_enabled. */ in __kvm_mmu_create()
5977 if (!tdp_enabled && mmu == &vcpu->arch.guest_mmu) in __kvm_mmu_create()
5982 * while the PDP table is a per-vCPU construct that's allocated at MMU in __kvm_mmu_create()
5983 * creation. When emulating 32-bit mode, cr3 is only 32 bits even on in __kvm_mmu_create()
5987 * table. The main exception, handled here, is SVM's 32-bit NPT. The in __kvm_mmu_create()
5988 * other exception is for shadowing L1's 32-bit or PAE NPT on 64-bit in __kvm_mmu_create()
5989 * KVM; that horror is handled on-demand by mmu_alloc_special_roots(). in __kvm_mmu_create()
5996 return -ENOMEM; in __kvm_mmu_create()
5998 mmu->pae_root = page_address(page); in __kvm_mmu_create()
6004 * only necessary when using shadow paging, as 64-bit NPT can get at in __kvm_mmu_create()
6005 * the C-bit even when shadowing 32-bit NPT, and SME isn't supported in __kvm_mmu_create()
6006 * by 32-bit kernels (when KVM itself uses 32-bit NPT). in __kvm_mmu_create()
6009 set_memory_decrypted((unsigned long)mmu->pae_root, 1); in __kvm_mmu_create()
6014 mmu->pae_root[i] = INVALID_PAE_ROOT; in __kvm_mmu_create()
6023 vcpu->arch.mmu_pte_list_desc_cache.kmem_cache = pte_list_desc_cache; in kvm_mmu_create()
6024 vcpu->arch.mmu_pte_list_desc_cache.gfp_zero = __GFP_ZERO; in kvm_mmu_create()
6026 vcpu->arch.mmu_page_header_cache.kmem_cache = mmu_page_header_cache; in kvm_mmu_create()
6027 vcpu->arch.mmu_page_header_cache.gfp_zero = __GFP_ZERO; in kvm_mmu_create()
6029 vcpu->arch.mmu_shadow_page_cache.gfp_zero = __GFP_ZERO; in kvm_mmu_create()
6031 vcpu->arch.mmu = &vcpu->arch.root_mmu; in kvm_mmu_create()
6032 vcpu->arch.walk_mmu = &vcpu->arch.root_mmu; in kvm_mmu_create()
6034 ret = __kvm_mmu_create(vcpu, &vcpu->arch.guest_mmu); in kvm_mmu_create()
6038 ret = __kvm_mmu_create(vcpu, &vcpu->arch.root_mmu); in kvm_mmu_create()
6044 free_mmu_pages(&vcpu->arch.guest_mmu); in kvm_mmu_create()
6057 &kvm->arch.active_mmu_pages, link) { in kvm_zap_obsolete_pages()
6070 if (WARN_ON_ONCE(sp->role.invalid)) in kvm_zap_obsolete_pages()
6080 cond_resched_rwlock_write(&kvm->mmu_lock)) { in kvm_zap_obsolete_pages()
6086 &kvm->arch.zapped_obsolete_pages, &nr_zapped); in kvm_zap_obsolete_pages()
6102 kvm_mmu_commit_zap_page(kvm, &kvm->arch.zapped_obsolete_pages); in kvm_zap_obsolete_pages()
6106 * Fast invalidate all shadow pages and use lock-break technique
6111 * not use any resource of the being-deleted slot or all slots
6116 lockdep_assert_held(&kvm->slots_lock); in kvm_mmu_zap_all_fast()
6118 write_lock(&kvm->mmu_lock); in kvm_mmu_zap_all_fast()
6128 kvm->arch.mmu_valid_gen = kvm->arch.mmu_valid_gen ? 0 : 1; in kvm_mmu_zap_all_fast()
6131 * In order to ensure all vCPUs drop their soon-to-be invalid roots, in kvm_mmu_zap_all_fast()
6151 write_unlock(&kvm->mmu_lock); in kvm_mmu_zap_all_fast()
6159 * lead to use-after-free. in kvm_mmu_zap_all_fast()
6167 return unlikely(!list_empty_careful(&kvm->arch.zapped_obsolete_pages)); in kvm_has_zapped_obsolete_pages()
6172 INIT_LIST_HEAD(&kvm->arch.active_mmu_pages); in kvm_mmu_init_vm()
6173 INIT_LIST_HEAD(&kvm->arch.zapped_obsolete_pages); in kvm_mmu_init_vm()
6174 INIT_LIST_HEAD(&kvm->arch.possible_nx_huge_pages); in kvm_mmu_init_vm()
6175 spin_lock_init(&kvm->arch.mmu_unsync_pages_lock); in kvm_mmu_init_vm()
6180 kvm->arch.split_page_header_cache.kmem_cache = mmu_page_header_cache; in kvm_mmu_init_vm()
6181 kvm->arch.split_page_header_cache.gfp_zero = __GFP_ZERO; in kvm_mmu_init_vm()
6183 kvm->arch.split_shadow_page_cache.gfp_zero = __GFP_ZERO; in kvm_mmu_init_vm()
6185 kvm->arch.split_desc_cache.kmem_cache = pte_list_desc_cache; in kvm_mmu_init_vm()
6186 kvm->arch.split_desc_cache.gfp_zero = __GFP_ZERO; in kvm_mmu_init_vm()
6191 kvm_mmu_free_memory_cache(&kvm->arch.split_desc_cache); in mmu_free_vm_memory_caches()
6192 kvm_mmu_free_memory_cache(&kvm->arch.split_page_header_cache); in mmu_free_vm_memory_caches()
6193 kvm_mmu_free_memory_cache(&kvm->arch.split_shadow_page_cache); in mmu_free_vm_memory_caches()
6221 start = max(gfn_start, memslot->base_gfn); in kvm_rmap_zap_gfn_range()
6222 end = min(gfn_end, memslot->base_gfn + memslot->npages); in kvm_rmap_zap_gfn_range()
6228 start, end - 1, true, flush); in kvm_rmap_zap_gfn_range()
6246 write_lock(&kvm->mmu_lock); in kvm_zap_gfn_range()
6248 kvm_mmu_invalidate_begin(kvm, 0, -1ul); in kvm_zap_gfn_range()
6256 kvm_flush_remote_tlbs_range(kvm, gfn_start, gfn_end - gfn_start); in kvm_zap_gfn_range()
6258 kvm_mmu_invalidate_end(kvm, 0, -1ul); in kvm_zap_gfn_range()
6260 write_unlock(&kvm->mmu_lock); in kvm_zap_gfn_range()
6275 write_lock(&kvm->mmu_lock); in kvm_mmu_slot_remove_write_access()
6278 write_unlock(&kvm->mmu_lock); in kvm_mmu_slot_remove_write_access()
6282 read_lock(&kvm->mmu_lock); in kvm_mmu_slot_remove_write_access()
6284 read_unlock(&kvm->mmu_lock); in kvm_mmu_slot_remove_write_access()
6295 if (need_resched() || rwlock_needbreak(&kvm->mmu_lock)) in need_topup_split_caches_or_resched()
6303 return need_topup(&kvm->arch.split_desc_cache, SPLIT_DESC_CACHE_MIN_NR_OBJECTS) || in need_topup_split_caches_or_resched()
6304 need_topup(&kvm->arch.split_page_header_cache, 1) || in need_topup_split_caches_or_resched()
6305 need_topup(&kvm->arch.split_shadow_page_cache, 1); in need_topup_split_caches_or_resched()
6317 * but aliasing rarely occurs post-boot or for many gfns. If there is in topup_split_caches()
6318 * only one rmap entry, rmap->val points directly at that one entry and in topup_split_caches()
6327 lockdep_assert_held(&kvm->slots_lock); in topup_split_caches()
6329 r = __kvm_mmu_topup_memory_cache(&kvm->arch.split_desc_cache, capacity, in topup_split_caches()
6334 r = kvm_mmu_topup_memory_cache(&kvm->arch.split_page_header_cache, 1); in topup_split_caches()
6338 return kvm_mmu_topup_memory_cache(&kvm->arch.split_shadow_page_cache, 1); in topup_split_caches()
6361 caches.page_header_cache = &kvm->arch.split_page_header_cache; in shadow_mmu_get_sp_for_split()
6362 caches.shadow_page_cache = &kvm->arch.split_shadow_page_cache; in shadow_mmu_get_sp_for_split()
6373 struct kvm_mmu_memory_cache *cache = &kvm->arch.split_desc_cache; in shadow_mmu_split_huge_page()
6384 sptep = &sp->spt[index]; in shadow_mmu_split_huge_page()
6391 * gfn-to-pfn translation since the SP is direct, so no need to in shadow_mmu_split_huge_page()
6402 flush |= !is_last_spte(*sptep, sp->role.level); in shadow_mmu_split_huge_page()
6406 spte = make_huge_page_split_spte(kvm, huge_spte, sp->role, index); in shadow_mmu_split_huge_page()
6408 __rmap_add(kvm, cache, slot, sptep, gfn, sp->role.access); in shadow_mmu_split_huge_page()
6425 level = huge_sp->role.level; in shadow_mmu_try_split_huge_page()
6429 r = -ENOSPC; in shadow_mmu_try_split_huge_page()
6434 write_unlock(&kvm->mmu_lock); in shadow_mmu_try_split_huge_page()
6437 * If the topup succeeds, return -EAGAIN to indicate that the in shadow_mmu_try_split_huge_page()
6441 r = topup_split_caches(kvm) ?: -EAGAIN; in shadow_mmu_try_split_huge_page()
6442 write_lock(&kvm->mmu_lock); in shadow_mmu_try_split_huge_page()
6467 if (WARN_ON_ONCE(!sp->role.guest_mode)) in shadow_mmu_try_split_huge_pages()
6470 /* The rmaps should never contain non-leaf SPTEs. */ in shadow_mmu_try_split_huge_pages()
6475 if (WARN_ON_ONCE(sp->unsync)) in shadow_mmu_try_split_huge_pages()
6479 if (sp->role.invalid) in shadow_mmu_try_split_huge_pages()
6489 if (!r || r == -EAGAIN) in shadow_mmu_try_split_huge_pages()
6492 /* The split failed and shouldn't be retried (e.g. -ENOMEM). */ in shadow_mmu_try_split_huge_pages()
6512 for (level = KVM_MAX_HUGEPAGE_LEVEL; level > target_level; level--) in kvm_shadow_mmu_try_split_huge_pages()
6514 level, level, start, end - 1, true, false); in kvm_shadow_mmu_try_split_huge_pages()
6517 /* Must be called with the mmu_lock held in write-mode. */
6541 u64 start = memslot->base_gfn; in kvm_mmu_slot_try_split_huge_pages()
6542 u64 end = start + memslot->npages; in kvm_mmu_slot_try_split_huge_pages()
6548 write_lock(&kvm->mmu_lock); in kvm_mmu_slot_try_split_huge_pages()
6550 write_unlock(&kvm->mmu_lock); in kvm_mmu_slot_try_split_huge_pages()
6553 read_lock(&kvm->mmu_lock); in kvm_mmu_slot_try_split_huge_pages()
6555 read_unlock(&kvm->mmu_lock); in kvm_mmu_slot_try_split_huge_pages()
6559 * write-protecting and/or clearing dirty on the newly split SPTEs to in kvm_mmu_slot_try_split_huge_pages()
6588 if (sp->role.direct && in kvm_mmu_zap_collapsible_spte()
6589 sp->role.level < kvm_mmu_max_mapping_level(kvm, slot, sp->gfn, in kvm_mmu_zap_collapsible_spte()
6609 * Note, use KVM_MAX_HUGEPAGE_LEVEL - 1 since there's no need to zap in kvm_rmap_zap_collapsible_sptes()
6613 PG_LEVEL_4K, KVM_MAX_HUGEPAGE_LEVEL - 1, true)) in kvm_rmap_zap_collapsible_sptes()
6621 write_lock(&kvm->mmu_lock); in kvm_mmu_zap_collapsible_sptes()
6623 write_unlock(&kvm->mmu_lock); in kvm_mmu_zap_collapsible_sptes()
6627 read_lock(&kvm->mmu_lock); in kvm_mmu_zap_collapsible_sptes()
6629 read_unlock(&kvm->mmu_lock); in kvm_mmu_zap_collapsible_sptes()
6637 write_lock(&kvm->mmu_lock); in kvm_mmu_slot_leaf_clear_dirty()
6643 write_unlock(&kvm->mmu_lock); in kvm_mmu_slot_leaf_clear_dirty()
6647 read_lock(&kvm->mmu_lock); in kvm_mmu_slot_leaf_clear_dirty()
6649 read_unlock(&kvm->mmu_lock); in kvm_mmu_slot_leaf_clear_dirty()
6668 write_lock(&kvm->mmu_lock); in kvm_mmu_zap_all()
6670 list_for_each_entry_safe(sp, node, &kvm->arch.active_mmu_pages, link) { in kvm_mmu_zap_all()
6671 if (WARN_ON_ONCE(sp->role.invalid)) in kvm_mmu_zap_all()
6675 if (cond_resched_rwlock_write(&kvm->mmu_lock)) in kvm_mmu_zap_all()
6684 write_unlock(&kvm->mmu_lock); in kvm_mmu_zap_all()
6711 gen &= ~((u64)KVM_ADDRESS_SPACE_NUM - 1); in kvm_mmu_invalidate_mmio_sptes()
6727 int nr_to_scan = sc->nr_to_scan; in mmu_shrink_scan()
6737 * Never scan more than sc->nr_to_scan VM instances. in mmu_shrink_scan()
6742 if (!nr_to_scan--) in mmu_shrink_scan()
6745 * n_used_mmu_pages is accessed without holding kvm->mmu_lock in mmu_shrink_scan()
6750 if (!kvm->arch.n_used_mmu_pages && in mmu_shrink_scan()
6754 idx = srcu_read_lock(&kvm->srcu); in mmu_shrink_scan()
6755 write_lock(&kvm->mmu_lock); in mmu_shrink_scan()
6759 &kvm->arch.zapped_obsolete_pages); in mmu_shrink_scan()
6763 freed = kvm_mmu_zap_oldest_mmu_pages(kvm, sc->nr_to_scan); in mmu_shrink_scan()
6766 write_unlock(&kvm->mmu_lock); in mmu_shrink_scan()
6767 srcu_read_unlock(&kvm->srcu, idx); in mmu_shrink_scan()
6771 * per-vm shrinkers cry out in mmu_shrink_scan()
6774 list_move_tail(&kvm->vm_list, &vm_list); in mmu_shrink_scan()
6825 return -EPERM; in set_nx_huge_pages()
6827 /* In "auto" mode deploy workaround only if CPU has the bug. */ in set_nx_huge_pages()
6840 return -EBUSY; in set_nx_huge_pages()
6845 return -EINVAL; in set_nx_huge_pages()
6856 mutex_lock(&kvm->slots_lock); in set_nx_huge_pages()
6858 mutex_unlock(&kvm->slots_lock); in set_nx_huge_pages()
6860 wake_up_process(kvm->arch.nx_huge_page_recovery_thread); in set_nx_huge_pages()
6870 * its default value of -1 is technically undefined behavior for a boolean.
6876 if (nx_huge_pages == -1) in kvm_mmu_x86_module_init()
6896 int ret = -ENOMEM; in kvm_mmu_vendor_module_init()
6925 ret = register_shrinker(&mmu_shrinker, "x86-mmu"); in kvm_mmu_vendor_module_init()
6941 free_mmu_pages(&vcpu->arch.root_mmu); in kvm_mmu_destroy()
6942 free_mmu_pages(&vcpu->arch.guest_mmu); in kvm_mmu_destroy()
6985 return -EPERM; in set_nx_huge_pages_recovery_param()
7002 wake_up_process(kvm->arch.nx_huge_page_recovery_thread); in set_nx_huge_pages_recovery_param()
7012 unsigned long nx_lpage_splits = kvm->stat.nx_lpage_splits; in kvm_recover_nx_huge_pages()
7021 rcu_idx = srcu_read_lock(&kvm->srcu); in kvm_recover_nx_huge_pages()
7022 write_lock(&kvm->mmu_lock); in kvm_recover_nx_huge_pages()
7033 for ( ; to_zap; --to_zap) { in kvm_recover_nx_huge_pages()
7034 if (list_empty(&kvm->arch.possible_nx_huge_pages)) in kvm_recover_nx_huge_pages()
7044 sp = list_first_entry(&kvm->arch.possible_nx_huge_pages, in kvm_recover_nx_huge_pages()
7047 WARN_ON_ONCE(!sp->nx_huge_page_disallowed); in kvm_recover_nx_huge_pages()
7048 WARN_ON_ONCE(!sp->role.direct); in kvm_recover_nx_huge_pages()
7064 * of kvm->nr_memslots_dirty_logging is not a problem: if it is in kvm_recover_nx_huge_pages()
7071 if (atomic_read(&kvm->nr_memslots_dirty_logging)) { in kvm_recover_nx_huge_pages()
7074 slots = kvm_memslots_for_spte_role(kvm, sp->role); in kvm_recover_nx_huge_pages()
7075 slot = __gfn_to_memslot(slots, sp->gfn); in kvm_recover_nx_huge_pages()
7085 WARN_ON_ONCE(sp->nx_huge_page_disallowed); in kvm_recover_nx_huge_pages()
7087 if (need_resched() || rwlock_needbreak(&kvm->mmu_lock)) { in kvm_recover_nx_huge_pages()
7091 cond_resched_rwlock_write(&kvm->mmu_lock); in kvm_recover_nx_huge_pages()
7101 write_unlock(&kvm->mmu_lock); in kvm_recover_nx_huge_pages()
7102 srcu_read_unlock(&kvm->srcu, rcu_idx); in kvm_recover_nx_huge_pages()
7112 return enabled ? start_time + msecs_to_jiffies(period) - get_jiffies_64() in get_nx_huge_page_recovery_timeout()
7149 "kvm-nx-lpage-recovery", in kvm_mmu_post_init_vm()
7150 &kvm->arch.nx_huge_page_recovery_thread); in kvm_mmu_post_init_vm()
7152 kthread_unpark(kvm->arch.nx_huge_page_recovery_thread); in kvm_mmu_post_init_vm()
7159 if (kvm->arch.nx_huge_page_recovery_thread) in kvm_mmu_pre_destroy_vm()
7160 kthread_stop(kvm->arch.nx_huge_page_recovery_thread); in kvm_mmu_pre_destroy_vm()