551 static __always_inline void amd_set_core_ssb_state(unsigned long tifn)  in amd_set_core_ssb_state()  argument
557 		msr |= ssbd_tif_to_amd_ls_cfg(tifn);  in amd_set_core_ssb_state()
562 	if (tifn & _TIF_SSBD) {  in amd_set_core_ssb_state()
590 static __always_inline void amd_set_core_ssb_state(unsigned long tifn)  in amd_set_core_ssb_state()  argument
592 	u64 msr = x86_amd_ls_cfg_base | ssbd_tif_to_amd_ls_cfg(tifn);  in amd_set_core_ssb_state()
598 static __always_inline void amd_set_ssb_virt_state(unsigned long tifn)  in amd_set_ssb_virt_state()  argument
604 	wrmsrl(MSR_AMD64_VIRT_SPEC_CTRL, ssbd_tif_to_spec_ctrl(tifn));  in amd_set_ssb_virt_state()
614 						      unsigned long tifn)  in __speculation_ctrl_update()  argument
616 	unsigned long tif_diff = tifp ^ tifn;  in __speculation_ctrl_update()
625 			amd_set_ssb_virt_state(tifn);  in __speculation_ctrl_update()
628 			amd_set_core_ssb_state(tifn);  in __speculation_ctrl_update()
632 		msr |= ssbd_tif_to_spec_ctrl(tifn);  in __speculation_ctrl_update()
639 		msr |= stibp_tif_to_spec_ctrl(tifn);  in __speculation_ctrl_update()
694 	unsigned long tifp, tifn;  in __switch_to_xtra()  local
696 	tifn = read_task_thread_flags(next_p);  in __switch_to_xtra()
703 	if ((tifp & _TIF_BLOCKSTEP || tifn & _TIF_BLOCKSTEP) &&  in __switch_to_xtra()
709 		msk = tifn & _TIF_BLOCKSTEP;  in __switch_to_xtra()
714 	if ((tifp ^ tifn) & _TIF_NOTSC)  in __switch_to_xtra()
717 	if ((tifp ^ tifn) & _TIF_NOCPUID)  in __switch_to_xtra()
718 		set_cpuid_faulting(!!(tifn & _TIF_NOCPUID));  in __switch_to_xtra()
720 	if (likely(!((tifp | tifn) & _TIF_SPEC_FORCE_UPDATE))) {  in __switch_to_xtra()
721 		__speculation_ctrl_update(tifp, tifn);  in __switch_to_xtra()
724 		tifn = speculation_ctrl_update_tif(next_p);  in __switch_to_xtra()
727 		__speculation_ctrl_update(~tifn, tifn);  in __switch_to_xtra()