Lines Matching refs:rev
432 u32 rev, dummy; in __apply_microcode_amd() local
437 native_rdmsr(MSR_AMD64_PATCH_LEVEL, rev, dummy); in __apply_microcode_amd()
438 if (rev != mc->hdr.patch_id) in __apply_microcode_amd()
459 u32 rev, dummy, *new_rev; in early_apply_microcode() local
476 native_rdmsr(MSR_AMD64_PATCH_LEVEL, rev, dummy); in early_apply_microcode()
483 if (rev > mc->hdr.patch_id) in early_apply_microcode()
644 u32 rev, dummy __always_unused; in reload_ucode_amd() local
654 rdmsr(MSR_AMD64_PATCH_LEVEL, rev, dummy); in reload_ucode_amd()
656 if (rev < mc->hdr.patch_id) { in reload_ucode_amd()
671 csig->rev = c->microcode; in collect_cpu_info_amd()
678 if (p && (p->patch_id == csig->rev)) in collect_cpu_info_amd()
681 pr_info("CPU%d: patch_level=0x%08x\n", cpu, csig->rev); in collect_cpu_info_amd()
693 u32 rev, dummy __always_unused; in apply_microcode_amd() local
706 rdmsr(MSR_AMD64_PATCH_LEVEL, rev, dummy); in apply_microcode_amd()
709 if (rev > mc_amd->hdr.patch_id) { in apply_microcode_amd()
720 rev = mc_amd->hdr.patch_id; in apply_microcode_amd()
723 pr_info("CPU%d: new patch_level=0x%08x\n", cpu, rev); in apply_microcode_amd()
726 uci->cpu_sig.rev = rev; in apply_microcode_amd()
727 c->microcode = rev; in apply_microcode_amd()
731 boot_cpu_data.microcode = rev; in apply_microcode_amd()