68 #define imsic_read_switchcase(__ireg)			\  argument
69 	case __ireg:					\
70 		return imsic_vs_csr_read(__ireg);
71 #define imsic_read_switchcase_2(__ireg)			\  argument
72 	imsic_read_switchcase(__ireg + 0)		\
73 	imsic_read_switchcase(__ireg + 1)
74 #define imsic_read_switchcase_4(__ireg)			\  argument
75 	imsic_read_switchcase_2(__ireg + 0)		\
76 	imsic_read_switchcase_2(__ireg + 2)
77 #define imsic_read_switchcase_8(__ireg)			\  argument
78 	imsic_read_switchcase_4(__ireg + 0)		\
79 	imsic_read_switchcase_4(__ireg + 4)
80 #define imsic_read_switchcase_16(__ireg)		\  argument
81 	imsic_read_switchcase_8(__ireg + 0)		\
82 	imsic_read_switchcase_8(__ireg + 8)
83 #define imsic_read_switchcase_32(__ireg)		\  argument
84 	imsic_read_switchcase_16(__ireg + 0)		\
85 	imsic_read_switchcase_16(__ireg + 16)
86 #define imsic_read_switchcase_64(__ireg)		\  argument
87 	imsic_read_switchcase_32(__ireg + 0)		\
88 	imsic_read_switchcase_32(__ireg + 32)
108 #define imsic_swap_switchcase(__ireg, __v)		\  argument
109 	case __ireg:					\
110 		return imsic_vs_csr_swap(__ireg, __v);
111 #define imsic_swap_switchcase_2(__ireg, __v)		\  argument
112 	imsic_swap_switchcase(__ireg + 0, __v)		\
113 	imsic_swap_switchcase(__ireg + 1, __v)
114 #define imsic_swap_switchcase_4(__ireg, __v)		\  argument
115 	imsic_swap_switchcase_2(__ireg + 0, __v)	\
116 	imsic_swap_switchcase_2(__ireg + 2, __v)
117 #define imsic_swap_switchcase_8(__ireg, __v)		\  argument
118 	imsic_swap_switchcase_4(__ireg + 0, __v)	\
119 	imsic_swap_switchcase_4(__ireg + 4, __v)
120 #define imsic_swap_switchcase_16(__ireg, __v)		\  argument
121 	imsic_swap_switchcase_8(__ireg + 0, __v)	\
122 	imsic_swap_switchcase_8(__ireg + 8, __v)
123 #define imsic_swap_switchcase_32(__ireg, __v)		\  argument
124 	imsic_swap_switchcase_16(__ireg + 0, __v)	\
125 	imsic_swap_switchcase_16(__ireg + 16, __v)
126 #define imsic_swap_switchcase_64(__ireg, __v)		\  argument
127 	imsic_swap_switchcase_32(__ireg + 0, __v)	\
128 	imsic_swap_switchcase_32(__ireg + 32, __v)
146 #define imsic_write_switchcase(__ireg, __v)		\  argument
147 	case __ireg:					\
148 		imsic_vs_csr_write(__ireg, __v);	\
150 #define imsic_write_switchcase_2(__ireg, __v)		\  argument
151 	imsic_write_switchcase(__ireg + 0, __v)		\
152 	imsic_write_switchcase(__ireg + 1, __v)
153 #define imsic_write_switchcase_4(__ireg, __v)		\  argument
154 	imsic_write_switchcase_2(__ireg + 0, __v)	\
155 	imsic_write_switchcase_2(__ireg + 2, __v)
156 #define imsic_write_switchcase_8(__ireg, __v)		\  argument
157 	imsic_write_switchcase_4(__ireg + 0, __v)	\
158 	imsic_write_switchcase_4(__ireg + 4, __v)
159 #define imsic_write_switchcase_16(__ireg, __v)		\  argument
160 	imsic_write_switchcase_8(__ireg + 0, __v)	\
161 	imsic_write_switchcase_8(__ireg + 8, __v)
162 #define imsic_write_switchcase_32(__ireg, __v)		\  argument
163 	imsic_write_switchcase_16(__ireg + 0, __v)	\
164 	imsic_write_switchcase_16(__ireg + 16, __v)
165 #define imsic_write_switchcase_64(__ireg, __v)		\  argument
166 	imsic_write_switchcase_32(__ireg + 0, __v)	\
167 	imsic_write_switchcase_32(__ireg + 32, __v)
183 #define imsic_set_switchcase(__ireg, __v)		\  argument
184 	case __ireg:					\
185 		imsic_vs_csr_set(__ireg, __v);		\
187 #define imsic_set_switchcase_2(__ireg, __v)		\  argument
188 	imsic_set_switchcase(__ireg + 0, __v)		\
189 	imsic_set_switchcase(__ireg + 1, __v)
190 #define imsic_set_switchcase_4(__ireg, __v)		\  argument
191 	imsic_set_switchcase_2(__ireg + 0, __v)		\
192 	imsic_set_switchcase_2(__ireg + 2, __v)
193 #define imsic_set_switchcase_8(__ireg, __v)		\  argument
194 	imsic_set_switchcase_4(__ireg + 0, __v)		\
195 	imsic_set_switchcase_4(__ireg + 4, __v)
196 #define imsic_set_switchcase_16(__ireg, __v)		\  argument
197 	imsic_set_switchcase_8(__ireg + 0, __v)		\
198 	imsic_set_switchcase_8(__ireg + 8, __v)
199 #define imsic_set_switchcase_32(__ireg, __v)		\  argument
200 	imsic_set_switchcase_16(__ireg + 0, __v)	\
201 	imsic_set_switchcase_16(__ireg + 16, __v)
202 #define imsic_set_switchcase_64(__ireg, __v)		\  argument
203 	imsic_set_switchcase_32(__ireg + 0, __v)	\
204 	imsic_set_switchcase_32(__ireg + 32, __v)