Lines Matching defs:insn
86 #define INSN_LEN(insn) ((((insn) & 0x3) < 0x3) ? 2 : 4) argument
119 #define RVC_RS1S(insn) (8 + RV_X(insn, SH_RD, 3)) argument
120 #define RVC_RS2S(insn) (8 + RV_X(insn, SH_RS2C, 3)) argument
121 #define RVC_RS2(insn) RV_X(insn, SH_RS2C, 5) argument
129 #define REG_OFFSET(insn, pos) \ argument
132 #define REG_PTR(insn, pos, regs) \ argument
135 #define GET_RM(insn) (((insn) >> 12) & 7) argument
137 #define GET_RS1(insn, regs) (*REG_PTR(insn, SH_RS1, regs)) argument
138 #define GET_RS2(insn, regs) (*REG_PTR(insn, SH_RS2, regs)) argument
139 #define GET_RS1S(insn, regs) (*REG_PTR(RVC_RS1S(insn), 0, regs)) argument
140 #define GET_RS2S(insn, regs) (*REG_PTR(RVC_RS2S(insn), 0, regs)) argument
141 #define GET_RS2C(insn, regs) (*REG_PTR(insn, SH_RS2C, regs)) argument
143 #define SET_RD(insn, regs, val) (*REG_PTR(insn, SH_RD, regs) = (val)) argument
144 #define IMM_I(insn) ((s32)(insn) >> 20) argument
145 #define IMM_S(insn) (((s32)(insn) >> 25 << 5) | \ argument
149 #define GET_PRECISION(insn) (((insn) >> 25) & 3) argument
150 #define GET_RM(insn) (((insn) >> 12) & 7) argument
154 #define DECLARE_UNPRIVILEGED_LOAD_FUNCTION(type, insn) \ argument
163 #define DECLARE_UNPRIVILEGED_STORE_FUNCTION(type, insn) \ argument
242 unsigned long insn = get_insn(epc); in handle_misaligned_load() local
325 unsigned long insn = get_insn(epc); in handle_misaligned_store() local