Lines Matching full:isa
36 /* Host ISA bitmap */
39 /* Per-cpu ISA extensions. */
48 * @isa_bitmap: ISA bitmap to use
51 * NOTE: If isa_bitmap is NULL then Host ISA bitmap will be used.
65 * @isa_bitmap: ISA bitmap to use
69 * NOTE: If isa_bitmap is NULL then Host ISA bitmap will be used.
87 pr_err("Zicbom detected in ISA string, disabling as no cbom-block-size found\n"); in riscv_isa_extension_check()
96 pr_err("Zicboz detected in ISA string, but no cboz-block-size found\n"); in riscv_isa_extension_check()
115 * The canonical order of ISA extension names in the ISA string is defined in
119 * isa_ext_arr defines the order of the ISA string in /proc/cpuinfo.
189 unsigned long *isa2hwcap, const char *isa) in riscv_parse_isa_string() argument
197 isa += 4; in riscv_parse_isa_string()
199 while (*isa) { in riscv_parse_isa_string()
200 const char *ext = isa++; in riscv_parse_isa_string()
201 const char *ext_end = isa; in riscv_parse_isa_string()
209 * not valid ISA extensions. It works until multi-letter in riscv_parse_isa_string()
213 ++isa; in riscv_parse_isa_string()
242 for (; *isa && *isa != '_'; ++isa) in riscv_parse_isa_string()
243 if (unlikely(!isalnum(*isa))) in riscv_parse_isa_string()
246 ext_end = isa; in riscv_parse_isa_string()
272 * ensure that, when isa was incremented at the start of the loop, in riscv_parse_isa_string()
290 if (!isdigit(*isa)) in riscv_parse_isa_string()
293 while (isdigit(*++isa)) in riscv_parse_isa_string()
296 if (tolower(*isa) != 'p') in riscv_parse_isa_string()
299 if (!isdigit(*++isa)) { in riscv_parse_isa_string()
300 --isa; in riscv_parse_isa_string()
304 while (isdigit(*++isa)) in riscv_parse_isa_string()
311 * The parser expects that at the start of an iteration isa points to the in riscv_parse_isa_string()
316 if (*isa == '_') in riscv_parse_isa_string()
317 ++isa; in riscv_parse_isa_string()
324 set_bit(bit, isainfo->isa); \ in riscv_parse_isa_string()
334 set_bit(nr, isainfo->isa); in riscv_parse_isa_string()
348 const char *isa; in riscv_fill_hwcap_from_isa_string() local
371 rc = of_property_read_string(node, "riscv,isa", &isa); in riscv_fill_hwcap_from_isa_string()
374 pr_warn("Unable to find \"riscv,isa\" devicetree entry\n"); in riscv_fill_hwcap_from_isa_string()
378 rc = acpi_get_riscv_isa(rhct, cpu, &isa); in riscv_fill_hwcap_from_isa_string()
380 pr_warn("Unable to get ISA for the hart - %d\n", cpu); in riscv_fill_hwcap_from_isa_string()
385 riscv_parse_isa_string(&this_hwcap, isainfo, isa2hwcap, isa); in riscv_fill_hwcap_from_isa_string()
388 * These ones were as they were part of the base ISA when the in riscv_fill_hwcap_from_isa_string()
390 * unconditionally where `i` is in riscv,isa on DT systems. in riscv_fill_hwcap_from_isa_string()
393 set_bit(RISCV_ISA_EXT_ZICSR, isainfo->isa); in riscv_fill_hwcap_from_isa_string()
394 set_bit(RISCV_ISA_EXT_ZIFENCEI, isainfo->isa); in riscv_fill_hwcap_from_isa_string()
395 set_bit(RISCV_ISA_EXT_ZICNTR, isainfo->isa); in riscv_fill_hwcap_from_isa_string()
396 set_bit(RISCV_ISA_EXT_ZIHPM, isainfo->isa); in riscv_fill_hwcap_from_isa_string()
400 * All "okay" hart should have same isa. Set HWCAP based on in riscv_fill_hwcap_from_isa_string()
410 bitmap_copy(riscv_isa, isainfo->isa, RISCV_ISA_EXT_MAX); in riscv_fill_hwcap_from_isa_string()
412 bitmap_and(riscv_isa, riscv_isa, isainfo->isa, RISCV_ISA_EXT_MAX); in riscv_fill_hwcap_from_isa_string()
434 if (!of_property_present(cpu_node, "riscv,isa-extensions")) { in riscv_fill_hwcap_from_ext_list()
440 if (of_property_match_string(cpu_node, "riscv,isa-extensions", in riscv_fill_hwcap_from_ext_list()
451 set_bit(riscv_isa_ext[i].id, isainfo->isa); in riscv_fill_hwcap_from_ext_list()
457 * All "okay" harts should have same isa. Set HWCAP based on in riscv_fill_hwcap_from_ext_list()
466 bitmap_copy(riscv_isa, isainfo->isa, RISCV_ISA_EXT_MAX); in riscv_fill_hwcap_from_ext_list()
468 bitmap_and(riscv_isa, riscv_isa, isainfo->isa, RISCV_ISA_EXT_MAX); in riscv_fill_hwcap_from_ext_list()
509 pr_info("Falling back to deprecated \"riscv,isa\"\n"); in riscv_fill_hwcap()
526 * ISA string in device tree might have 'v' flag, but in riscv_fill_hwcap()
538 pr_info("riscv: base ISA extensions %s\n", print_str); in riscv_fill_hwcap()
708 WARN(1, "This extension id:%d is not in ISA extension list", id); in riscv_cpufeature_patch_func()