642 	dcr_host_t		dcrs;  member
896 	dcr_write(port->dcrs, DCRO_PEGPL_SPECIAL, 0x68782800);  in ppc440speA_pciex_init_utl()
1023 	dcr_write(port->dcrs, DCRO_PEGPL_SPECIAL, 0x0);  in ppc460ex_pciex_init_utl()
1323 	dcr_write(port->dcrs, DCRO_PEGPL_CFG, 0x10000000);  /* guarded on */  in ppc405ex_pciex_init_port_hw()
1332 	dcr_write(port->dcrs, DCRO_PEGPL_SPECIAL, 0x0);  in ppc405ex_pciex_init_utl()
1462 	dcr_write(port->dcrs, DCRO_PEGPL_CFGBAH,  in ppc4xx_pciex_port_init_mapping()
1464 	dcr_write(port->dcrs, DCRO_PEGPL_CFGBAL,  in ppc4xx_pciex_port_init_mapping()
1468 	dcr_write(port->dcrs, DCRO_PEGPL_CFGMSK, 0xe0000001);  in ppc4xx_pciex_port_init_mapping()
1471 	dcr_write(port->dcrs, DCRO_PEGPL_REGBAH,  in ppc4xx_pciex_port_init_mapping()
1473 	dcr_write(port->dcrs, DCRO_PEGPL_REGBAL,  in ppc4xx_pciex_port_init_mapping()
1477 	dcr_write(port->dcrs, DCRO_PEGPL_REGMSK, 0x00007001);  in ppc4xx_pciex_port_init_mapping()
1480 	dcr_write(port->dcrs, DCRO_PEGPL_OMR1MSKL, 0);  in ppc4xx_pciex_port_init_mapping()
1481 	dcr_write(port->dcrs, DCRO_PEGPL_OMR2MSKL, 0);  in ppc4xx_pciex_port_init_mapping()
1482 	dcr_write(port->dcrs, DCRO_PEGPL_OMR3MSKL, 0);  in ppc4xx_pciex_port_init_mapping()
1483 	dcr_write(port->dcrs, DCRO_PEGPL_MSGMSK, 0);  in ppc4xx_pciex_port_init_mapping()
1620 	gpl_cfg = dcr_read(port->dcrs, DCRO_PEGPL_CFG);  in ppc4xx_pciex_read_config()
1621 	dcr_write(port->dcrs, DCRO_PEGPL_CFG, gpl_cfg | GPL_DMER_MASK_DISA);  in ppc4xx_pciex_read_config()
1651 	dcr_write(port->dcrs, DCRO_PEGPL_CFG, gpl_cfg);  in ppc4xx_pciex_read_config()
1675 	gpl_cfg = dcr_read(port->dcrs, DCRO_PEGPL_CFG);  in ppc4xx_pciex_write_config()
1676 	dcr_write(port->dcrs, DCRO_PEGPL_CFG, gpl_cfg | GPL_DMER_MASK_DISA);  in ppc4xx_pciex_write_config()
1695 	dcr_write(port->dcrs, DCRO_PEGPL_CFG, gpl_cfg);  in ppc4xx_pciex_write_config()
1737 		dcr_write(port->dcrs, DCRO_PEGPL_OMR1BAH, lah);  in ppc4xx_setup_one_pciex_POM()
1738 		dcr_write(port->dcrs, DCRO_PEGPL_OMR1BAL, lal);  in ppc4xx_setup_one_pciex_POM()
1739 		dcr_write(port->dcrs, DCRO_PEGPL_OMR1MSKH, 0x7fffffff);  in ppc4xx_setup_one_pciex_POM()
1742 			dcr_write(port->dcrs, DCRO_PEGPL_OMR1MSKL,  in ppc4xx_setup_one_pciex_POM()
1749 			dcr_write(port->dcrs, DCRO_PEGPL_OMR1MSKL,  in ppc4xx_setup_one_pciex_POM()
1753 			dcr_write(port->dcrs, DCRO_PEGPL_OMR1MSKL,  in ppc4xx_setup_one_pciex_POM()
1760 		dcr_write(port->dcrs, DCRO_PEGPL_OMR2BAH, lah);  in ppc4xx_setup_one_pciex_POM()
1761 		dcr_write(port->dcrs, DCRO_PEGPL_OMR2BAL, lal);  in ppc4xx_setup_one_pciex_POM()
1762 		dcr_write(port->dcrs, DCRO_PEGPL_OMR2MSKH, 0x7fffffff);  in ppc4xx_setup_one_pciex_POM()
1763 		dcr_write(port->dcrs, DCRO_PEGPL_OMR2MSKL,  in ppc4xx_setup_one_pciex_POM()
1769 		dcr_write(port->dcrs, DCRO_PEGPL_OMR3BAH, lah);  in ppc4xx_setup_one_pciex_POM()
1770 		dcr_write(port->dcrs, DCRO_PEGPL_OMR3BAL, lal);  in ppc4xx_setup_one_pciex_POM()
1771 		dcr_write(port->dcrs, DCRO_PEGPL_OMR3MSKH, 0x7fffffff);  in ppc4xx_setup_one_pciex_POM()
1773 		dcr_write(port->dcrs, DCRO_PEGPL_OMR3MSKL,  in ppc4xx_setup_one_pciex_POM()
2077 	unsigned int dcrs;  in ppc4xx_probe_pciex_bridge()  local
2145 	dcrs = dcr_resource_start(np, 0);  in ppc4xx_probe_pciex_bridge()
2146 	if (dcrs == 0) {  in ppc4xx_probe_pciex_bridge()
2150 	port->dcrs = dcr_map(np, dcrs, dcr_resource_len(np, 0));  in ppc4xx_probe_pciex_bridge()