Lines Matching refs:CACHE_EVENT_PTR
164 CACHE_EVENT_PTR(PM_LD_MISS_L1),
165 CACHE_EVENT_PTR(PM_LD_REF_L1),
166 CACHE_EVENT_PTR(PM_L1_PREF),
167 CACHE_EVENT_PTR(PM_ST_MISS_L1),
168 CACHE_EVENT_PTR(PM_L1_ICACHE_MISS),
169 CACHE_EVENT_PTR(PM_INST_FROM_L1),
170 CACHE_EVENT_PTR(PM_IC_PREF_WRITE),
171 CACHE_EVENT_PTR(PM_DATA_FROM_L3MISS),
172 CACHE_EVENT_PTR(PM_DATA_FROM_L3),
173 CACHE_EVENT_PTR(PM_L3_PREF_ALL),
174 CACHE_EVENT_PTR(PM_L2_ST_MISS),
175 CACHE_EVENT_PTR(PM_L2_ST),
177 CACHE_EVENT_PTR(PM_BR_MPRED_CMPL),
178 CACHE_EVENT_PTR(PM_BRU_FIN),
180 CACHE_EVENT_PTR(PM_DTLB_MISS),
181 CACHE_EVENT_PTR(PM_ITLB_MISS),