Lines Matching +full:quad +full:- +full:precision
1 /* SPDX-License-Identifier: GPL-2.0 */
7 #include <asm/asm-offsets.h>
12 #include <asm/asm-compat.h>
46 * Note that on 32-bit this can only use registers that will be
47 * restored by fast_exception_return, i.e. r3 - r6, r10 and r11.
68 li r4,-1
117 #error This asm code isn't ready for 32-bit kernels
156 * usage of floating-point registers. These routines must be called
164 .long 0x3f800000 /* 1.0 in single-precision FP */
166 .long 0x3f000000 /* 0.5 in single-precision FP */
174 .quad 0
176 .quad 0x3ff0000000000000 /* 1.0 */
178 .quad 0x3fe0000000000000 /* 0.5 */
197 stwu r1,-64(r1)
199 stdu r1,-64(r1)
301 * r3 -> destination, r4 -> source.
318 * Vector reciprocal square-root estimate, floating point.
320 * by 2 iterations of Newton-Raphson to get sufficient accuracy.
321 * r3 -> destination, r4 -> source.
339 fnmsubs fr3,fr1,fr3,fr4 /* 1 - s * r * r */
340 fmadds fr1,fr2,fr3,fr1 /* r = r + 0.5 * r * (1 - s * r * r) */
343 fnmsubs fr3,fr1,fr3,fr4 /* 1 - s * r * r */
344 fmadds fr1,fr2,fr3,fr1 /* r = r + 0.5 * r * (1 - s * r * r) */