Lines Matching full:pe

89  * PE would be created there.
95 * EEH allowed maximal frozen times. If one particular PE's
96 * frozen count in last hour exceeds this limit, the PE will
137 u64 slot_resets; /* PE reset */
176 edev->pe->phb->global_number, edev->bdfn >> 8, in eeh_dump_dev_log()
179 edev->pe->phb->global_number, edev->bdfn >> 8, in eeh_dump_dev_log()
269 static void *eeh_dump_pe_log(struct eeh_pe *pe, void *flag) in eeh_dump_pe_log() argument
274 eeh_pe_for_each_dev(pe, edev, tmp) in eeh_dump_pe_log()
283 * @pe: EEH PE
291 void eeh_slot_error_detail(struct eeh_pe *pe, int severity) in eeh_slot_error_detail() argument
304 * When the @severity is EEH_LOG_PERM, the PE is going to be in eeh_slot_error_detail()
306 * the PE will be closed. The drivers rely on working IO path in eeh_slot_error_detail()
311 if (!(pe->type & EEH_PE_PHB)) { in eeh_slot_error_detail()
314 eeh_pci_enable(pe, EEH_OPT_THAW_MMIO); in eeh_slot_error_detail()
321 * is set automatically when the PE is put to EEH_PE_ISOLATED. in eeh_slot_error_detail()
328 eeh_ops->configure_bridge(pe); in eeh_slot_error_detail()
329 if (!(pe->state & EEH_PE_CFG_BLOCKED)) { in eeh_slot_error_detail()
330 eeh_pe_restore_bars(pe); in eeh_slot_error_detail()
333 eeh_pe_traverse(pe, eeh_dump_pe_log, &loglen); in eeh_slot_error_detail()
337 eeh_ops->get_log(pe, severity, pci_regs_buf, loglen); in eeh_slot_error_detail()
354 * For that case, it's meaningless to recover frozen PE. Intead,
357 static int eeh_phb_check_failure(struct eeh_pe *pe) in eeh_phb_check_failure() argument
366 /* Find the PHB PE */ in eeh_phb_check_failure()
367 phb_pe = eeh_phb_pe_get(pe->phb); in eeh_phb_check_failure()
369 pr_warn("%s Can't find PE for PHB#%x\n", in eeh_phb_check_failure()
370 __func__, pe->phb->global_number); in eeh_phb_check_failure()
430 struct eeh_pe *pe, *parent_pe; in eeh_dev_check_failure() local
444 pe = eeh_dev_to_pe(edev); in eeh_dev_check_failure()
447 if (!pe) { in eeh_dev_check_failure()
457 ret = eeh_phb_check_failure(pe); in eeh_dev_check_failure()
462 * If the PE isn't owned by us, we shouldn't check the in eeh_dev_check_failure()
463 * state. Instead, let the owner handle it if the PE has in eeh_dev_check_failure()
466 if (eeh_pe_passed(pe)) in eeh_dev_check_failure()
477 if (pe->state & EEH_PE_ISOLATED) { in eeh_dev_check_failure()
478 pe->check_count++; in eeh_dev_check_failure()
479 if (pe->check_count == EEH_MAX_FAILS) { in eeh_dev_check_failure()
485 pe->check_count, in eeh_dev_check_failure()
502 ret = eeh_ops->get_state(pe, NULL); in eeh_dev_check_failure()
507 * PE's state, EEH not support and Permanently unavailable in eeh_dev_check_failure()
508 * state, PE is in good state. in eeh_dev_check_failure()
513 pe->false_positives++; in eeh_dev_check_failure()
519 * It should be corner case that the parent PE has been in eeh_dev_check_failure()
523 parent_pe = pe->parent; in eeh_dev_check_failure()
529 /* Frozen parent PE ? */ in eeh_dev_check_failure()
532 pe = parent_pe; in eeh_dev_check_failure()
533 pr_err("EEH: Failure of PHB#%x-PE#%x will be handled at parent PHB#%x-PE#%x.\n", in eeh_dev_check_failure()
534 pe->phb->global_number, pe->addr, in eeh_dev_check_failure()
535 pe->phb->global_number, parent_pe->addr); in eeh_dev_check_failure()
548 eeh_pe_mark_isolated(pe); in eeh_dev_check_failure()
555 pr_debug("EEH: %s: Frozen PHB#%x-PE#%x detected\n", in eeh_dev_check_failure()
556 __func__, pe->phb->global_number, pe->addr); in eeh_dev_check_failure()
557 eeh_send_failure_event(pe); in eeh_dev_check_failure()
599 * @pe: EEH PE
606 int eeh_pci_enable(struct eeh_pe *pe, int function) in eeh_pci_enable() argument
611 * pHyp doesn't allow to enable IO or DMA on unfrozen PE. in eeh_pci_enable()
612 * Also, it's pointless to enable them on unfrozen PE. So in eeh_pci_enable()
638 rc = eeh_ops->get_state(pe, NULL); in eeh_pci_enable()
653 rc = eeh_ops->set_option(pe, function); in eeh_pci_enable()
656 "PHB#%x-PE#%x, err=%d\n", in eeh_pci_enable()
657 __func__, function, pe->phb->global_number, in eeh_pci_enable()
658 pe->addr, rc); in eeh_pci_enable()
662 rc = eeh_wait_state(pe, PCI_BUS_RESET_WAIT_MSEC); in eeh_pci_enable()
729 struct eeh_pe *pe = eeh_dev_to_pe(edev); in pcibios_set_pcie_reset_state() local
731 if (!pe) { in pcibios_set_pcie_reset_state()
732 pr_err("%s: No PE found on PCI device %s\n", in pcibios_set_pcie_reset_state()
739 eeh_ops->reset(pe, EEH_RESET_DEACTIVATE); in pcibios_set_pcie_reset_state()
740 eeh_unfreeze_pe(pe); in pcibios_set_pcie_reset_state()
741 if (!(pe->type & EEH_PE_VF)) in pcibios_set_pcie_reset_state()
742 eeh_pe_state_clear(pe, EEH_PE_CFG_BLOCKED, true); in pcibios_set_pcie_reset_state()
743 eeh_pe_dev_traverse(pe, eeh_restore_dev_state, dev); in pcibios_set_pcie_reset_state()
744 eeh_pe_state_clear(pe, EEH_PE_ISOLATED, true); in pcibios_set_pcie_reset_state()
747 eeh_pe_mark_isolated(pe); in pcibios_set_pcie_reset_state()
748 eeh_pe_state_clear(pe, EEH_PE_CFG_BLOCKED, true); in pcibios_set_pcie_reset_state()
749 eeh_ops->set_option(pe, EEH_OPT_FREEZE_PE); in pcibios_set_pcie_reset_state()
750 eeh_pe_dev_traverse(pe, eeh_disable_and_save_dev_state, dev); in pcibios_set_pcie_reset_state()
751 if (!(pe->type & EEH_PE_VF)) in pcibios_set_pcie_reset_state()
752 eeh_pe_state_mark(pe, EEH_PE_CFG_BLOCKED); in pcibios_set_pcie_reset_state()
753 eeh_ops->reset(pe, EEH_RESET_HOT); in pcibios_set_pcie_reset_state()
756 eeh_pe_mark_isolated(pe); in pcibios_set_pcie_reset_state()
757 eeh_pe_state_clear(pe, EEH_PE_CFG_BLOCKED, true); in pcibios_set_pcie_reset_state()
758 eeh_ops->set_option(pe, EEH_OPT_FREEZE_PE); in pcibios_set_pcie_reset_state()
759 eeh_pe_dev_traverse(pe, eeh_disable_and_save_dev_state, dev); in pcibios_set_pcie_reset_state()
760 if (!(pe->type & EEH_PE_VF)) in pcibios_set_pcie_reset_state()
761 eeh_pe_state_mark(pe, EEH_PE_CFG_BLOCKED); in pcibios_set_pcie_reset_state()
762 eeh_ops->reset(pe, EEH_RESET_FUNDAMENTAL); in pcibios_set_pcie_reset_state()
765 eeh_pe_state_clear(pe, EEH_PE_ISOLATED | EEH_PE_CFG_BLOCKED, true); in pcibios_set_pcie_reset_state()
794 struct eeh_pe *pe; in eeh_pe_refreeze_passed() local
797 eeh_for_each_pe(root, pe) { in eeh_pe_refreeze_passed()
798 if (eeh_pe_passed(pe)) { in eeh_pe_refreeze_passed()
799 state = eeh_ops->get_state(pe, NULL); in eeh_pe_refreeze_passed()
802 pr_info("EEH: Passed-through PE PHB#%x-PE#%x was thawed by reset, re-freezing for safety.\n", in eeh_pe_refreeze_passed()
803 pe->phb->global_number, pe->addr); in eeh_pe_refreeze_passed()
804 eeh_pe_set_option(pe, EEH_OPT_FREEZE_PE); in eeh_pe_refreeze_passed()
811 * eeh_pe_reset_full - Complete a full reset process on the indicated PE
812 * @pe: EEH PE
815 * This function executes a full reset procedure on a PE, including setting
821 * This function will attempt to reset a PE three times before failing.
823 int eeh_pe_reset_full(struct eeh_pe *pe, bool include_passed) in eeh_pe_reset_full() argument
833 * PE requires a fundamental reset. in eeh_pe_reset_full()
835 eeh_pe_dev_traverse(pe, eeh_set_dev_freset, &freset); in eeh_pe_reset_full()
840 /* Mark the PE as in reset state and block config space accesses */ in eeh_pe_reset_full()
841 eeh_pe_state_mark(pe, reset_state); in eeh_pe_reset_full()
845 ret = eeh_pe_reset(pe, type, include_passed); in eeh_pe_reset_full()
847 ret = eeh_pe_reset(pe, EEH_RESET_DEACTIVATE, in eeh_pe_reset_full()
851 pr_warn("EEH: Failure %d resetting PHB#%x-PE#%x (attempt %d)\n\n", in eeh_pe_reset_full()
852 state, pe->phb->global_number, pe->addr, i + 1); in eeh_pe_reset_full()
856 pr_warn("EEH: PHB#%x-PE#%x: Successful reset (attempt %d)\n", in eeh_pe_reset_full()
857 pe->phb->global_number, pe->addr, i + 1); in eeh_pe_reset_full()
859 /* Wait until the PE is in a functioning state */ in eeh_pe_reset_full()
860 state = eeh_wait_state(pe, PCI_BUS_RESET_WAIT_MSEC); in eeh_pe_reset_full()
862 pr_warn("EEH: Unrecoverable slot failure on PHB#%x-PE#%x", in eeh_pe_reset_full()
863 pe->phb->global_number, pe->addr); in eeh_pe_reset_full()
870 pr_warn("EEH: PHB#%x-PE#%x: Slot inactive after reset: 0x%x (attempt %d)\n", in eeh_pe_reset_full()
871 pe->phb->global_number, pe->addr, state, i + 1); in eeh_pe_reset_full()
874 /* Resetting the PE may have unfrozen child PEs. If those PEs have been in eeh_pe_reset_full()
878 eeh_pe_refreeze_passed(pe); in eeh_pe_reset_full()
880 eeh_pe_state_clear(pe, reset_state, true); in eeh_pe_reset_full()
907 * we can restore it after reset, either PHB range or PE range. in eeh_save_bars()
1069 if (!edev || !edev->pdev || !edev->pe) { in eeh_remove_device()
1076 * device attached to the parent PE in order for BAR restore in eeh_remove_device()
1078 * from the parent PE during the BAR resotre. in eeh_remove_device()
1107 if (!(edev->pe->state & EEH_PE_KEEP)) in eeh_remove_device()
1113 int eeh_unfreeze_pe(struct eeh_pe *pe) in eeh_unfreeze_pe() argument
1117 ret = eeh_pci_enable(pe, EEH_OPT_THAW_MMIO); in eeh_unfreeze_pe()
1119 pr_warn("%s: Failure %d enabling IO on PHB#%x-PE#%x\n", in eeh_unfreeze_pe()
1120 __func__, ret, pe->phb->global_number, pe->addr); in eeh_unfreeze_pe()
1124 ret = eeh_pci_enable(pe, EEH_OPT_THAW_DMA); in eeh_unfreeze_pe()
1126 pr_warn("%s: Failure %d enabling DMA on PHB#%x-PE#%x\n", in eeh_unfreeze_pe()
1127 __func__, ret, pe->phb->global_number, pe->addr); in eeh_unfreeze_pe()
1142 static int eeh_pe_change_owner(struct eeh_pe *pe) in eeh_pe_change_owner() argument
1149 /* Check PE state */ in eeh_pe_change_owner()
1150 ret = eeh_ops->get_state(pe, NULL); in eeh_pe_change_owner()
1154 /* Unfrozen PE, nothing to do */ in eeh_pe_change_owner()
1158 /* Frozen PE, check if it needs PE level reset */ in eeh_pe_change_owner()
1159 eeh_pe_for_each_dev(pe, edev, tmp) { in eeh_pe_change_owner()
1178 return eeh_pe_reset_and_recover(pe); in eeh_pe_change_owner()
1182 ret = eeh_unfreeze_pe(pe); in eeh_pe_change_owner()
1184 eeh_pe_state_clear(pe, EEH_PE_ISOLATED, true); in eeh_pe_change_owner()
1189 * eeh_dev_open - Increase count of pass through devices for PE
1193 * PE. In the result, the EEH errors detected on the PE won't be
1194 * reported. The PE owner will be responsible for detection
1208 /* No EEH device or PE ? */ in eeh_dev_open()
1210 if (!edev || !edev->pe) in eeh_dev_open()
1214 * The PE might have been put into frozen state, but we in eeh_dev_open()
1216 * in frozen PE won't work properly. Clear the frozen state in eeh_dev_open()
1219 ret = eeh_pe_change_owner(edev->pe); in eeh_dev_open()
1223 /* Increase PE's pass through count */ in eeh_dev_open()
1224 atomic_inc(&edev->pe->pass_dev_cnt); in eeh_dev_open()
1235 * eeh_dev_release - Decrease count of pass through devices for PE
1238 * Decrease count of pass through devices for the indicated PE. If
1239 * there is no passed through device in PE, the EEH errors detected
1240 * on the PE will be reported and handled as usual.
1254 if (!edev || !edev->pe || !eeh_pe_passed(edev->pe)) in eeh_dev_release()
1257 /* Decrease PE's pass through count */ in eeh_dev_release()
1258 WARN_ON(atomic_dec_if_positive(&edev->pe->pass_dev_cnt) < 0); in eeh_dev_release()
1259 eeh_pe_change_owner(edev->pe); in eeh_dev_release()
1284 * eeh_iommu_group_to_pe - Convert IOMMU group to EEH PE
1287 * The routine is called to convert IOMMU group to EEH PE.
1303 /* No EEH device or PE ? */ in eeh_iommu_group_to_pe()
1305 if (!edev || !edev->pe) in eeh_iommu_group_to_pe()
1308 return edev->pe; in eeh_iommu_group_to_pe()
1315 * eeh_pe_set_option - Set options for the indicated PE
1316 * @pe: EEH PE
1320 * on the indicated PE, to enable IO or DMA for the frozen PE.
1322 int eeh_pe_set_option(struct eeh_pe *pe, int option) in eeh_pe_set_option() argument
1326 /* Invalid PE ? */ in eeh_pe_set_option()
1327 if (!pe) in eeh_pe_set_option()
1333 * isn't expected to be disabled on one specific PE. in eeh_pe_set_option()
1338 ret = eeh_pe_change_owner(pe); in eeh_pe_set_option()
1353 ret = eeh_pci_enable(pe, option); in eeh_pe_set_option()
1366 * eeh_pe_get_state - Retrieve PE's state
1367 * @pe: EEH PE
1369 * Retrieve the PE's state, which includes 3 aspects: enabled
1372 int eeh_pe_get_state(struct eeh_pe *pe) in eeh_pe_get_state() argument
1377 /* Existing PE ? */ in eeh_pe_get_state()
1378 if (!pe) in eeh_pe_get_state()
1385 * If the parent PE is owned by the host kernel and is undergoing in eeh_pe_get_state()
1386 * error recovery, we should return the PE state as temporarily in eeh_pe_get_state()
1390 if (pe->parent && in eeh_pe_get_state()
1391 !(pe->state & EEH_PE_REMOVED) && in eeh_pe_get_state()
1392 (pe->parent->state & (EEH_PE_ISOLATED | EEH_PE_RECOVERING))) in eeh_pe_get_state()
1395 result = eeh_ops->get_state(pe, NULL); in eeh_pe_get_state()
1415 static int eeh_pe_reenable_devices(struct eeh_pe *pe, bool include_passed) in eeh_pe_reenable_devices() argument
1421 eeh_pe_restore_bars(pe); in eeh_pe_reenable_devices()
1427 eeh_pe_for_each_dev(pe, edev, tmp) { in eeh_pe_reenable_devices()
1440 /* The PE is still in frozen state */ in eeh_pe_reenable_devices()
1441 if (include_passed || !eeh_pe_passed(pe)) { in eeh_pe_reenable_devices()
1442 ret = eeh_unfreeze_pe(pe); in eeh_pe_reenable_devices()
1444 pr_info("EEH: Note: Leaving passthrough PHB#%x-PE#%x frozen.\n", in eeh_pe_reenable_devices()
1445 pe->phb->global_number, pe->addr); in eeh_pe_reenable_devices()
1447 eeh_pe_state_clear(pe, EEH_PE_ISOLATED, include_passed); in eeh_pe_reenable_devices()
1453 * eeh_pe_reset - Issue PE reset according to specified type
1454 * @pe: EEH PE
1458 * The routine is called to reset the specified PE with the
1460 * PE reset is the most important part for error recovery.
1462 int eeh_pe_reset(struct eeh_pe *pe, int option, bool include_passed) in eeh_pe_reset() argument
1466 /* Invalid PE ? */ in eeh_pe_reset()
1467 if (!pe) in eeh_pe_reset()
1475 ret = eeh_ops->reset(pe, option); in eeh_pe_reset()
1476 eeh_pe_state_clear(pe, EEH_PE_CFG_BLOCKED, include_passed); in eeh_pe_reset()
1480 ret = eeh_pe_reenable_devices(pe, include_passed); in eeh_pe_reset()
1485 * Proactively freeze the PE to drop all MMIO access in eeh_pe_reset()
1489 eeh_ops->set_option(pe, EEH_OPT_FREEZE_PE); in eeh_pe_reset()
1491 eeh_pe_state_mark(pe, EEH_PE_CFG_BLOCKED); in eeh_pe_reset()
1492 ret = eeh_ops->reset(pe, option); in eeh_pe_reset()
1505 * eeh_pe_configure - Configure PCI bridges after PE reset
1506 * @pe: EEH PE
1509 * those PCI devices, especially PCI bridges affected by PE
1512 int eeh_pe_configure(struct eeh_pe *pe) in eeh_pe_configure() argument
1516 /* Invalid PE ? */ in eeh_pe_configure()
1517 if (!pe) in eeh_pe_configure()
1525 * eeh_pe_inject_err - Injecting the specified PCI error to the indicated PE
1526 * @pe: the indicated PE
1533 * is determined by @type and @func, to the indicated PE for
1536 int eeh_pe_inject_err(struct eeh_pe *pe, int type, int func, in eeh_pe_inject_err() argument
1539 /* Invalid PE ? */ in eeh_pe_inject_err()
1540 if (!pe) in eeh_pe_inject_err()
1555 return eeh_ops->err_inject(pe, type, func, addr, mask); in eeh_pe_inject_err()
1646 struct eeh_pe *pe; in eeh_force_recover_write() local
1655 * When PE is NULL the event is a "special" event. Rather than in eeh_force_recover_write()
1656 * recovering a specific PE it forces the EEH core to scan for failed in eeh_force_recover_write()
1673 /* Retrieve PE */ in eeh_force_recover_write()
1674 pe = eeh_pe_get(hose, pe_no); in eeh_force_recover_write()
1675 if (!pe) in eeh_force_recover_write()
1682 * from an odd state (e.g. PE removed, or recovery of a in eeh_force_recover_write()
1683 * non-isolated PE) in eeh_force_recover_write()
1685 __eeh_send_failure_event(pe); in eeh_force_recover_write()
1804 * PE freeze. Using the in_8() accessor skips the eeh detection hook in eeh_debugfs_break_device()
1807 * where the HW will asynchronously freeze a PE and it's up to in eeh_debugfs_break_device()