Lines Matching +full:0 +full:x1700
20 #define OF_DT_BEGIN_NODE 0x1 /* Start of node, full name */
21 #define OF_DT_END_NODE 0x2 /* End node */
22 #define OF_DT_PROP 0x3 /* Property: name off, size,
24 #define OF_DT_NOP 0x4 /* nop */
25 #define OF_DT_END 0x9
27 #define OF_DT_VERSION 0x10
41 * ends when size is 0
102 #define OV_IGNORE 0x80 /* ignore this vector */
103 #define OV_CESSATION_POLICY 0x40 /* halt if unsupported option present*/
106 #define OV1_PPC_2_00 0x80 /* set if we support PowerPC 2.00 */
107 #define OV1_PPC_2_01 0x40 /* set if we support PowerPC 2.01 */
108 #define OV1_PPC_2_02 0x20 /* set if we support PowerPC 2.02 */
109 #define OV1_PPC_2_03 0x10 /* set if we support PowerPC 2.03 */
110 #define OV1_PPC_2_04 0x08 /* set if we support PowerPC 2.04 */
111 #define OV1_PPC_2_05 0x04 /* set if we support PowerPC 2.05 */
112 #define OV1_PPC_2_06 0x02 /* set if we support PowerPC 2.06 */
113 #define OV1_PPC_2_07 0x01 /* set if we support PowerPC 2.07 */
115 #define OV1_PPC_3_00 0x80 /* set if we support PowerPC 3.00 */
116 #define OV1_PPC_3_1 0x40 /* set if we support PowerPC 3.1 */
119 #define OV2_REAL_MODE 0x20 /* set if we want OF in real mode */
122 #define OV3_FP 0x80 /* floating point */
123 #define OV3_VMX 0x40 /* VMX/Altivec */
124 #define OV3_DFP 0x20 /* decimal FP */
127 #define OV4_MIN_ENT_CAP 0x01 /* minimum VP entitled capacity */
135 #define OV5_FEAT(x) ((x) & 0xff)
137 #define OV5_LPAR 0x0280 /* logical partitioning supported */
138 #define OV5_SPLPAR 0x0240 /* shared-processor LPAR supported */
140 #define OV5_DRCONF_MEMORY 0x0220
141 #define OV5_LARGE_PAGES 0x0210 /* large pages supported */
142 #define OV5_DONATE_DEDICATE_CPU 0x0202 /* donate dedicated CPU support */
143 #define OV5_MSI 0x0201 /* PCIe/MSI support */
144 #define OV5_CMO 0x0480 /* Cooperative Memory Overcommitment */
145 #define OV5_XCMO 0x0440 /* Page Coalescing */
146 #define OV5_FORM1_AFFINITY 0x0580 /* FORM1 NUMA affinity */
147 #define OV5_PRRN 0x0540 /* Platform Resource Reassignment */
148 #define OV5_FORM2_AFFINITY 0x0520 /* Form2 NUMA affinity */
149 #define OV5_HP_EVT 0x0604 /* Hot Plug Event support */
150 #define OV5_RESIZE_HPT 0x0601 /* Hash Page Table resizing */
151 #define OV5_PFO_HW_RNG 0x1180 /* PFO Random Number Generator */
152 #define OV5_PFO_HW_842 0x1140 /* PFO Compression Accelerator */
153 #define OV5_PFO_HW_ENCR 0x1120 /* PFO Encryption Accelerator */
154 #define OV5_SUB_PROCESSORS 0x1501 /* 1,2,or 4 Sub-Processors supported */
155 #define OV5_DRMEM_V2 0x1680 /* ibm,dynamic-reconfiguration-v2 */
156 #define OV5_XIVE_SUPPORT 0x17C0 /* XIVE Exploitation Support Mask */
157 #define OV5_XIVE_LEGACY 0x1700 /* XIVE legacy mode Only */
158 #define OV5_XIVE_EXPLOIT 0x1740 /* XIVE exploitation mode Only */
159 #define OV5_XIVE_EITHER 0x1780 /* XIVE legacy or exploitation mode */
161 #define OV5_MMU_SUPPORT 0x18C0 /* MMU Mode Support Mask */
162 #define OV5_MMU_HASH 0x1800 /* Hash MMU Only */
163 #define OV5_MMU_RADIX 0x1840 /* Radix MMU Only */
164 #define OV5_MMU_EITHER 0x1880 /* Hash or Radix Supported */
165 #define OV5_MMU_DYNAMIC 0x18C0 /* Hash or Radix Can Switch Later */
166 #define OV5_NMMU 0x1820 /* Nest MMU Available */
168 #define OV5_HASH_SEG_TBL 0x1980 /* In Memory Segment Tables Available */
169 #define OV5_HASH_GTSE 0x1940 /* Guest Translation Shoot Down Avail */
171 #define OV5_RADIX_GTSE 0x1A40 /* Guest Translation Shoot Down Avail */
172 #define OV5_DRC_INFO 0x1640 /* Redef Prop Structures: drc-info */
175 #define OV6_LINUX 0x02 /* Linux is our OS */