Lines Matching +full:0 +full:xf800

39 	interrupts = <19 2 0 0>;
42 /* controller at 0xa000 */
48 	bus-range = <0 255>;
50 	interrupts = <26 2 0 0>;
53 	pcie@0 {
54 		reg = <0 0 0 0 0>;
59 		interrupts = <26 2 0 0>;
60 		interrupt-map-mask = <0xf800 0 0 7>;
62 			/* IDSEL 0x0 */
63 			0000 0x0 0x0 0x1 &mpic 0x0 0x1 0x0 0x0
64 			0000 0x0 0x0 0x2 &mpic 0x1 0x1 0x0 0x0
65 			0000 0x0 0x0 0x3 &mpic 0x2 0x1 0x0 0x0
66 			0000 0x0 0x0 0x4 &mpic 0x3 0x1 0x0 0x0
71 /* controller at 0x9000 */
77 	bus-range = <0 255>;
79 	interrupts = <25 2 0 0>;
82 	pcie@0 {
83 		reg = <0 0 0 0 0>;
88 		interrupts = <25 2 0 0>;
89 		interrupt-map-mask = <0xf800 0 0 7>;
92 			/* IDSEL 0x0 */
93 			0000 0x0 0x0 0x1 &mpic 0x4 0x1 0x0 0x0
94 			0000 0x0 0x0 0x2 &mpic 0x5 0x1 0x0 0x0
95 			0000 0x0 0x0 0x3 &mpic 0x6 0x1 0x0 0x0
96 			0000 0x0 0x0 0x4 &mpic 0x7 0x1 0x0 0x0
101 /* controller at 0x8000 */
107 	bus-range = <0 255>;
109 	interrupts = <24 2 0 0>;
110 	law_trgt_if = <0>;
112 	pcie@0 {
113 		reg = <0 0 0 0 0>;
118 		interrupts = <24 2 0 0>;
119 		interrupt-map-mask = <0xf800 0 0 7>;
122 			/* IDSEL 0x0 */
123 			0000 0x0 0x0 0x1 &mpic 0x8 0x1 0x0 0x0
124 			0000 0x0 0x0 0x2 &mpic 0x9 0x1 0x0 0x0
125 			0000 0x0 0x0 0x3 &mpic 0xa 0x1 0x0 0x0
126 			0000 0x0 0x0 0x4 &mpic 0xb 0x1 0x0 0x0
136 	bus-frequency = <0>;		// Filled out by uboot.
138 	ecm-law@0 {
140 		reg = <0x0 0x1000>;
146 		reg = <0x1000 0x1000>;
147 		interrupts = <17 2 0 0>;
152 		reg = <0x2000 0x1000>;
153 		interrupts = <18 2 0 0>;
156 /include/ "pq3-i2c-0.dtsi"
158 /include/ "pq3-duart-0.dtsi"
159 /include/ "pq3-espi-0.dtsi"
165 /include/ "pq3-gpio-0.dtsi"
169 		reg = <0x20000 0x1000>;
171 		cache-size = <0x80000>; // L2,512K
172 		interrupts = <16 2 0 0>;
175 /include/ "pq3-dma-0.dtsi"
176 /include/ "pq3-usb2-dr-0.dtsi"
180 /include/ "pq3-etsec1-0.dtsi"
181 /include/ "pq3-etsec1-timer-0.dtsi"
184 		interrupts = <68 2 0 0 69 2 0 0 70 2 0 0>;
190 /include/ "pq3-esdhc-0.dtsi"
195 /include/ "pq3-sec3.1-0.dtsi"
201 		reg = <0xe0000 0x1000>;
207 		reg = <0xe0070 0x20>;