Lines Matching +full:0 +full:x1900
8 ranges = <0 0x10000000 0 0x10000000 0 0x10000000 /* PIO & CONF & APB */
9 0 0x20000000 0 0x20000000 0 0x10000000
10 0 0x40000000 0 0x40000000 0 0x40000000 /* PCI MEM */
11 0xe00 0x00000000 0xe00 0x00000000 0x100 0x0000000>;
15 reg = <0 0x10000000 0 0x400>;
18 loongson,pic-base-vec = <0>;
24 reg = <0 0x100d0100 0 0x78>;
31 reg = <0 0x10080000 0 0x100>;
41 reg = <0 0x10080100 0 0x100>;
51 reg = <0 0x10080200 0 0x100>;
61 reg = <0 0x10080300 0 0x100>;
76 reg = <0 0x1a000000 0 0x02000000>,
77 <0xefe 0x00000000 0 0x20000000>;
79 ranges = <0x01000000 0x0 0x00020000 0x0 0x18020000 0x0 0x00020000>,
80 <0x02000000 0x0 0x40000000 0x0 0x40000000 0x0 0x40000000>;
82 ohci@4,0 {
83 compatible = "pci0014,7a24.0",
88 reg = <0x2000 0x0 0x0 0x0 0x0>;
94 compatible = "pci0014,7a14.0",
99 reg = <0x2100 0x0 0x0 0x0 0x0>;
104 ohci@5,0 {
105 compatible = "pci0014,7a24.0",
110 reg = <0x2800 0x0 0x0 0x0 0x0>;
116 compatible = "pci0014,7a14.0",
121 reg = <0x2900 0x0 0x0 0x0 0x0>;
126 sata@8,0 {
127 compatible = "pci0014,7a08.0",
132 reg = <0x4000 0x0 0x0 0x0 0x0>;
138 compatible = "pci0014,7a08.0",
143 reg = <0x4100 0x0 0x0 0x0 0x0>;
149 compatible = "pci0014,7a08.0",
154 reg = <0x4200 0x0 0x0 0x0 0x0>;
159 gpu@6,0 {
160 compatible = "pci0014,7a15.0",
165 reg = <0x3000 0x0 0x0 0x0 0x0>;
171 compatible = "pci0014,7a06.0",
176 reg = <0x3100 0x0 0x0 0x0 0x0>;
181 hda@7,0 {
182 compatible = "pci0014,7a07.0",
187 reg = <0x3800 0x0 0x0 0x0 0x0>;
192 gmac@3,0 {
193 compatible = "pci0014,7a03.0",
199 reg = <0x1800 0x0 0x0 0x0 0x0>;
207 #size-cells = <0>;
209 phy0: ethernet-phy@0 {
210 reg = <0>;
216 compatible = "pci0014,7a03.0",
222 reg = <0x1900 0x0 0x0 0x0 0x0>;
230 #size-cells = <0>;
233 reg = <0>;
238 pci_bridge@9,0 {
244 reg = <0x4800 0x0 0x0 0x0 0x0>;
249 interrupt-map-mask = <0 0 0 0>;
250 interrupt-map = <0 0 0 0 &pic 32 IRQ_TYPE_LEVEL_HIGH>;
253 pci_bridge@a,0 {
259 reg = <0x5000 0x0 0x0 0x0 0x0>;
264 interrupt-map-mask = <0 0 0 0>;
265 interrupt-map = <0 0 0 0 &pic 33 IRQ_TYPE_LEVEL_HIGH>;
268 pci_bridge@b,0 {
274 reg = <0x5800 0x0 0x0 0x0 0x0>;
279 interrupt-map-mask = <0 0 0 0>;
280 interrupt-map = <0 0 0 0 &pic 34 IRQ_TYPE_LEVEL_HIGH>;
283 pci_bridge@c,0 {
289 reg = <0x6000 0x0 0x0 0x0 0x0>;
294 interrupt-map-mask = <0 0 0 0>;
295 interrupt-map = <0 0 0 0 &pic 35 IRQ_TYPE_LEVEL_HIGH>;
298 pci_bridge@d,0 {
304 reg = <0x6800 0x0 0x0 0x0 0x0>;
309 interrupt-map-mask = <0 0 0 0>;
310 interrupt-map = <0 0 0 0 &pic 36 IRQ_TYPE_LEVEL_HIGH>;
313 pci_bridge@e,0 {
319 reg = <0x7000 0x0 0x0 0x0 0x0>;
324 interrupt-map-mask = <0 0 0 0>;
325 interrupt-map = <0 0 0 0 &pic 37 IRQ_TYPE_LEVEL_HIGH>;
328 pci_bridge@f,0 {
334 reg = <0x7800 0x0 0x0 0x0 0x0>;
339 interrupt-map-mask = <0 0 0 0>;
340 interrupt-map = <0 0 0 0 &pic 40 IRQ_TYPE_LEVEL_HIGH>;
343 pci_bridge@10,0 {
349 reg = <0x8000 0x0 0x0 0x0 0x0>;
354 interrupt-map-mask = <0 0 0 0>;
355 interrupt-map = <0 0 0 0 &pic 41 IRQ_TYPE_LEVEL_HIGH>;
358 pci_bridge@11,0 {
364 reg = <0x8800 0x0 0x0 0x0 0x0>;
369 interrupt-map-mask = <0 0 0 0>;
370 interrupt-map = <0 0 0 0 &pic 42 IRQ_TYPE_LEVEL_HIGH>;
373 pci_bridge@12,0 {
379 reg = <0x9000 0x0 0x0 0x0 0x0>;
384 interrupt-map-mask = <0 0 0 0>;
385 interrupt-map = <0 0 0 0 &pic 43 IRQ_TYPE_LEVEL_HIGH>;
388 pci_bridge@13,0 {
394 reg = <0x9800 0x0 0x0 0x0 0x0>;
399 interrupt-map-mask = <0 0 0 0>;
400 interrupt-map = <0 0 0 0 &pic 38 IRQ_TYPE_LEVEL_HIGH>;
403 pci_bridge@14,0 {
409 reg = <0xa000 0x0 0x0 0x0 0x0>;
414 interrupt-map-mask = <0 0 0 0>;
415 interrupt-map = <0 0 0 0 &pic 39 IRQ_TYPE_LEVEL_HIGH>;
423 ranges = <1 0 0 0x18000000 0x20000>;