Lines Matching refs:CLKDEV_INIT
422 CLKDEV_INIT(NULL, "periph", &clk_periph),
423 CLKDEV_INIT("bcm63xx_uart.0", "refclk", &clk_periph),
424 CLKDEV_INIT("bcm63xx_uart.1", "refclk", &clk_periph),
426 CLKDEV_INIT(NULL, "enet0", &clk_enet0),
427 CLKDEV_INIT(NULL, "enet1", &clk_enet1),
428 CLKDEV_INIT(NULL, "ephy", &clk_ephy),
429 CLKDEV_INIT(NULL, "usbh", &clk_usbh),
430 CLKDEV_INIT(NULL, "usbd", &clk_usbd),
431 CLKDEV_INIT(NULL, "spi", &clk_spi),
432 CLKDEV_INIT(NULL, "pcm", &clk_pcm),
433 CLKDEV_INIT("bcm63xx_enet.0", "enet", &clk_enet0),
434 CLKDEV_INIT("bcm63xx_enet.1", "enet", &clk_enet1),
439 CLKDEV_INIT(NULL, "periph", &clk_periph),
440 CLKDEV_INIT("bcm63xx_uart.0", "refclk", &clk_periph),
441 CLKDEV_INIT("bcm63xx_uart.1", "refclk", &clk_periph),
442 CLKDEV_INIT("bcm63xx-hsspi.0", "pll", &clk_hsspi_pll),
444 CLKDEV_INIT(NULL, "enetsw", &clk_enetsw),
445 CLKDEV_INIT(NULL, "usbh", &clk_usbh),
446 CLKDEV_INIT(NULL, "usbd", &clk_usbd),
447 CLKDEV_INIT(NULL, "hsspi", &clk_hsspi),
448 CLKDEV_INIT(NULL, "pcie", &clk_pcie),
453 CLKDEV_INIT(NULL, "periph", &clk_periph),
454 CLKDEV_INIT("bcm63xx_uart.0", "refclk", &clk_periph),
456 CLKDEV_INIT(NULL, "enet0", &clk_enet0),
457 CLKDEV_INIT(NULL, "enet1", &clk_enet1),
458 CLKDEV_INIT(NULL, "ephy", &clk_ephy),
459 CLKDEV_INIT(NULL, "usbh", &clk_usbh),
460 CLKDEV_INIT(NULL, "usbd", &clk_usbd),
461 CLKDEV_INIT(NULL, "spi", &clk_spi),
462 CLKDEV_INIT("bcm63xx_enet.0", "enet", &clk_enet_misc),
467 CLKDEV_INIT(NULL, "periph", &clk_periph),
468 CLKDEV_INIT("bcm63xx_uart.0", "refclk", &clk_periph),
470 CLKDEV_INIT(NULL, "enet0", &clk_enet0),
471 CLKDEV_INIT(NULL, "enet1", &clk_enet1),
472 CLKDEV_INIT(NULL, "ephy", &clk_ephy),
473 CLKDEV_INIT(NULL, "usbh", &clk_usbh),
474 CLKDEV_INIT(NULL, "usbd", &clk_usbd),
475 CLKDEV_INIT(NULL, "spi", &clk_spi),
476 CLKDEV_INIT("bcm63xx_enet.0", "enet", &clk_enet_misc),
481 CLKDEV_INIT(NULL, "periph", &clk_periph),
482 CLKDEV_INIT("bcm63xx_uart.0", "refclk", &clk_periph),
484 CLKDEV_INIT(NULL, "enet0", &clk_enet0),
485 CLKDEV_INIT(NULL, "enet1", &clk_enet1),
486 CLKDEV_INIT(NULL, "ephy", &clk_ephy),
487 CLKDEV_INIT(NULL, "usbh", &clk_usbh),
488 CLKDEV_INIT(NULL, "usbd", &clk_usbd),
489 CLKDEV_INIT(NULL, "spi", &clk_spi),
490 CLKDEV_INIT("bcm63xx_enet.0", "enet", &clk_enet_misc),
491 CLKDEV_INIT("bcm63xx_enet.1", "enet", &clk_enet_misc),
496 CLKDEV_INIT(NULL, "periph", &clk_periph),
497 CLKDEV_INIT("bcm63xx_uart.0", "refclk", &clk_periph),
498 CLKDEV_INIT("bcm63xx_uart.1", "refclk", &clk_periph),
500 CLKDEV_INIT(NULL, "enet0", &clk_enet0),
501 CLKDEV_INIT(NULL, "enet1", &clk_enet1),
502 CLKDEV_INIT(NULL, "ephy", &clk_ephy),
503 CLKDEV_INIT(NULL, "usbh", &clk_usbh),
504 CLKDEV_INIT(NULL, "usbd", &clk_usbd),
505 CLKDEV_INIT(NULL, "spi", &clk_spi),
506 CLKDEV_INIT(NULL, "pcm", &clk_pcm),
507 CLKDEV_INIT(NULL, "swpkt_sar", &clk_swpkt_sar),
508 CLKDEV_INIT(NULL, "swpkt_usb", &clk_swpkt_usb),
509 CLKDEV_INIT("bcm63xx_enet.0", "enet", &clk_enet0),
510 CLKDEV_INIT("bcm63xx_enet.1", "enet", &clk_enet1),
515 CLKDEV_INIT(NULL, "periph", &clk_periph),
516 CLKDEV_INIT("bcm63xx_uart.0", "refclk", &clk_periph),
517 CLKDEV_INIT("bcm63xx_uart.1", "refclk", &clk_periph),
518 CLKDEV_INIT("bcm63xx-hsspi.0", "pll", &clk_hsspi_pll),
520 CLKDEV_INIT(NULL, "enetsw", &clk_enetsw),
521 CLKDEV_INIT(NULL, "usbh", &clk_usbh),
522 CLKDEV_INIT(NULL, "usbd", &clk_usbd),
523 CLKDEV_INIT(NULL, "spi", &clk_spi),
524 CLKDEV_INIT(NULL, "hsspi", &clk_hsspi),
525 CLKDEV_INIT(NULL, "pcie", &clk_pcie),
526 CLKDEV_INIT(NULL, "ipsec", &clk_ipsec),
531 CLKDEV_INIT(NULL, "periph", &clk_periph),
532 CLKDEV_INIT("bcm63xx_uart.0", "refclk", &clk_periph),
533 CLKDEV_INIT("bcm63xx_uart.1", "refclk", &clk_periph),
535 CLKDEV_INIT(NULL, "enetsw", &clk_enetsw),
536 CLKDEV_INIT(NULL, "usbh", &clk_usbh),
537 CLKDEV_INIT(NULL, "usbd", &clk_usbd),
538 CLKDEV_INIT(NULL, "spi", &clk_spi),
539 CLKDEV_INIT(NULL, "xtm", &clk_xtm),
540 CLKDEV_INIT(NULL, "ipsec", &clk_ipsec),