Lines Matching refs:r16
227 SET_ONE_RR(0, PAGE_SHIFT, r2, r16, 1);;
228 SET_ONE_RR(1, PAGE_SHIFT, r2, r16, 1);;
229 SET_ONE_RR(2, PAGE_SHIFT, r2, r16, 1);;
230 SET_ONE_RR(3, PAGE_SHIFT, r2, r16, 1);;
231 SET_ONE_RR(4, PAGE_SHIFT, r2, r16, 1);;
232 SET_ONE_RR(5, PAGE_SHIFT, r2, r16, 1);;
233 SET_ONE_RR(6, IA64_GRANULE_SHIFT, r2, r16, 0);;
234 SET_ONE_RR(7, IA64_GRANULE_SHIFT, r2, r16, 0);;
243 mov r16=IA64_TR_KERNEL
253 itr.i itr[r16]=r18
255 itr.d dtr[r16]=r18
262 movl r16=(IA64_PSR_IT|IA64_PSR_IC|IA64_PSR_DT|IA64_PSR_RT|IA64_PSR_DFH|IA64_PSR_BN \
265 mov cr.ipsr=r16
275 SET_AREA_FOR_BOOTING_CPU(r2, r16);
277 STORE_REGION_REGS(r16, r8,r9,r10,r11,r12,r13,r14,r15);
278 SAL_TO_OS_BOOT_HANDOFF_STATE_SAVE(r16,r17,r25)
315 mov r16=-1
329 shr.u r16=r3,IA64_GRANULE_SHIFT
347 mov IA64_KR(CURRENT_STACK)=r16
421 alloc r16=ar.pfs,1,0,0,0
427 1: mov r16=dbr[r18]
435 st8.nta [in0]=r16,8
444 alloc r16=ar.pfs,1,0,0,0
451 1: ld8.nta r16=[in0],8
455 mov dbr[r18]=r16
895 mov cr.ipsr=r16 // set new PSR
943 mov cr.ipsr=r16 // set new PSR
1030 alloc r16=ar.pfs,1,0,0,0
1056 alloc r16=ar.pfs,1,0,0,0; \
1074 alloc r16=ar.pfs,1,0,0,0;;
1091 movl r16=SAL_PSR_BITS_TO_SET;;
1092 mov cr.ipsr=r16