Lines Matching +full:0 +full:x29
14 * @rs0: register containing affinity level 0 bit shift
28 * aff0 = mpidr_masked & 0xff;
29 * aff1 = mpidr_masked & 0xff00;
30 * aff2 = mpidr_masked & 0xff0000;
31 * aff3 = mpidr_masked & 0xff00000000;
41 and \dst, \mpidr, #0xff // mask=aff0
43 and \mask, \mpidr, #0xff00 // mask = aff1
46 and \mask, \mpidr, #0xff0000 // mask = aff2
49 and \mask, \mpidr, #0xff00000000 // mask = aff3
61 * path through cpu_resume() will return 0.
66 stp x29, lr, [x0, #SLEEP_STACK_DATA_CALLEE_REGS]
93 stp x29, lr, [sp, #-16]!
95 ldp x29, lr, [sp], #16
135 add x29, x0, #SLEEP_STACK_DATA_CALLEE_REGS
150 ldp x19, x20, [x29, #16]
151 ldp x21, x22, [x29, #32]
152 ldp x23, x24, [x29, #48]
153 ldp x25, x26, [x29, #64]
154 ldp x27, x28, [x29, #80]
155 ldp x29, lr, [x29]
156 mov x0, #0