Lines Matching refs:sp
65 mov x10, sp
68 sub sp, sp, #(FREGS_SIZE + 32)
71 stp x0, x1, [sp, #FREGS_X0]
72 stp x2, x3, [sp, #FREGS_X2]
73 stp x4, x5, [sp, #FREGS_X4]
74 stp x6, x7, [sp, #FREGS_X6]
75 str x8, [sp, #FREGS_X8]
78 str xzr, [sp, #FREGS_DIRECT_TRAMP]
82 str x29, [sp, #FREGS_FP]
83 str x9, [sp, #FREGS_LR]
84 str x10, [sp, #FREGS_SP]
87 str x30, [sp, #FREGS_PC]
90 stp x29, x9, [sp, #FREGS_SIZE + 16]
91 add x29, sp, #FREGS_SIZE + 16
94 stp x29, x30, [sp, #FREGS_SIZE]
95 add x29, sp, #FREGS_SIZE
100 mov x3, sp // regs
120 ldp x0, x1, [sp, #FREGS_X0]
121 ldp x2, x3, [sp, #FREGS_X2]
122 ldp x4, x5, [sp, #FREGS_X4]
123 ldp x6, x7, [sp, #FREGS_X6]
124 ldr x8, [sp, #FREGS_X8]
127 ldr x29, [sp, #FREGS_FP]
130 ldr x17, [sp, #FREGS_DIRECT_TRAMP]
135 ldr x30, [sp, #FREGS_LR]
136 ldr x9, [sp, #FREGS_PC]
139 add sp, sp, #FREGS_SIZE + 32
155 ldr x9, [sp, #FREGS_LR]
156 ldr x30, [sp, #FREGS_PC]
159 add sp, sp, #FREGS_SIZE + 32
216 stp x29, x30, [sp, #-16]!
217 mov x29, sp
221 ldp x29, x30, [sp], #16
333 sub sp, sp, #FGRET_REGS_SIZE
334 stp x0, x1, [sp, #FGRET_REGS_X0]
335 stp x2, x3, [sp, #FGRET_REGS_X2]
336 stp x4, x5, [sp, #FGRET_REGS_X4]
337 stp x6, x7, [sp, #FGRET_REGS_X6]
338 str x29, [sp, #FGRET_REGS_FP] // parent's fp
340 mov x0, sp
345 ldp x0, x1, [sp, #FGRET_REGS_X0]
346 ldp x2, x3, [sp, #FGRET_REGS_X2]
347 ldp x4, x5, [sp, #FGRET_REGS_X4]
348 ldp x6, x7, [sp, #FGRET_REGS_X6]
349 add sp, sp, #FGRET_REGS_SIZE