Lines Matching +full:2 +full:- +full:5
1 /* SPDX-License-Identifier: GPL-2.0-only */
14 #include <linux/kasan-tags.h>
16 #include <asm/gpr-num.h>
21 * C5.2, version:ARM DDI 0487A.f)
22 * [20-19] : Op0
23 * [18-16] : Op1
24 * [15-12] : CRn
25 * [11-8] : CRm
26 * [7-5] : Op2
36 #define Op2_shift 5
83 * As per Arm ARM for v8-A, Section "C.5.1.3 op0 == 0b00, architectural hints,
98 #define PSTATE_DIT pstate_field(3, 2)
117 #define SYS_DC_ISW sys_insn(1, 0, 7, 6, 2)
120 #define SYS_DC_CSW sys_insn(1, 0, 7, 10, 2)
123 #define SYS_DC_CISW sys_insn(1, 0, 7, 14, 2)
128 #define SYS_IC_IALLU sys_insn(1, 0, 7, 5, 0)
129 #define SYS_IC_IVAU sys_insn(1, 3, 7, 5, 1)
133 #define SYS_DC_IGDVAC sys_insn(1, 0, 7, 6, 5)
137 #define SYS_DC_CGDVAC sys_insn(1, 3, 7, 10, 5)
143 #define SYS_DC_CGDVAP sys_insn(1, 3, 7, 12, 5)
147 #define SYS_DC_CGDVADP sys_insn(1, 3, 7, 13, 5)
151 #define SYS_DC_CIGDVAC sys_insn(1, 3, 7, 14, 5)
164 #include "asm/sysreg-defs.h"
170 #define SYS_SVCR_SMSTOP_SM_EL0 sys_reg(0, 3, 4, 2, 3)
174 #define SYS_DBGBVRn_EL1(n) sys_reg(2, 0, 0, n, 4)
175 #define SYS_DBGBCRn_EL1(n) sys_reg(2, 0, 0, n, 5)
176 #define SYS_DBGWVRn_EL1(n) sys_reg(2, 0, 0, n, 6)
177 #define SYS_DBGWCRn_EL1(n) sys_reg(2, 0, 0, n, 7)
178 #define SYS_MDRAR_EL1 sys_reg(2, 0, 1, 0, 0)
180 #define SYS_OSLSR_EL1 sys_reg(2, 0, 1, 1, 4)
186 #define SYS_OSDLR_EL1 sys_reg(2, 0, 1, 3, 4)
187 #define SYS_DBGPRCR_EL1 sys_reg(2, 0, 1, 4, 4)
188 #define SYS_DBGCLAIMSET_EL1 sys_reg(2, 0, 7, 8, 6)
189 #define SYS_DBGCLAIMCLR_EL1 sys_reg(2, 0, 7, 9, 6)
190 #define SYS_DBGAUTHSTATUS_EL1 sys_reg(2, 0, 7, 14, 6)
191 #define SYS_MDCCSR_EL0 sys_reg(2, 3, 0, 1, 0)
192 #define SYS_DBGDTR_EL0 sys_reg(2, 3, 0, 4, 0)
193 #define SYS_DBGDTRRX_EL0 sys_reg(2, 3, 0, 5, 0)
194 #define SYS_DBGDTRTX_EL0 sys_reg(2, 3, 0, 5, 0)
195 #define SYS_DBGVCR32_EL2 sys_reg(2, 4, 0, 7, 0)
197 #define SYS_BRBINF_EL1(n) sys_reg(2, 1, 8, (n & 15), (((n & 16) >> 2) | 0))
198 #define SYS_BRBINFINJ_EL1 sys_reg(2, 1, 9, 1, 0)
199 #define SYS_BRBSRC_EL1(n) sys_reg(2, 1, 8, (n & 15), (((n & 16) >> 2) | 1))
200 #define SYS_BRBSRCINJ_EL1 sys_reg(2, 1, 9, 1, 1)
201 #define SYS_BRBTGT_EL1(n) sys_reg(2, 1, 8, (n & 15), (((n & 16) >> 2) | 2))
202 #define SYS_BRBTGTINJ_EL1 sys_reg(2, 1, 9, 1, 2)
203 #define SYS_BRBTS_EL1 sys_reg(2, 1, 9, 0, 2)
205 #define SYS_BRBCR_EL1 sys_reg(2, 1, 9, 0, 0)
206 #define SYS_BRBFCR_EL1 sys_reg(2, 1, 9, 0, 1)
207 #define SYS_BRBIDR0_EL1 sys_reg(2, 1, 9, 2, 0)
209 #define SYS_TRCITECR_EL1 sys_reg(3, 0, 1, 2, 3)
210 #define SYS_TRCACATR(m) sys_reg(2, 1, 2, ((m & 7) << 1), (2 | (m >> 3)))
211 #define SYS_TRCACVR(m) sys_reg(2, 1, 2, ((m & 7) << 1), (0 | (m >> 3)))
212 #define SYS_TRCAUTHSTATUS sys_reg(2, 1, 7, 14, 6)
213 #define SYS_TRCAUXCTLR sys_reg(2, 1, 0, 6, 0)
214 #define SYS_TRCBBCTLR sys_reg(2, 1, 0, 15, 0)
215 #define SYS_TRCCCCTLR sys_reg(2, 1, 0, 14, 0)
216 #define SYS_TRCCIDCCTLR0 sys_reg(2, 1, 3, 0, 2)
217 #define SYS_TRCCIDCCTLR1 sys_reg(2, 1, 3, 1, 2)
218 #define SYS_TRCCIDCVR(m) sys_reg(2, 1, 3, ((m & 7) << 1), 0)
219 #define SYS_TRCCLAIMCLR sys_reg(2, 1, 7, 9, 6)
220 #define SYS_TRCCLAIMSET sys_reg(2, 1, 7, 8, 6)
221 #define SYS_TRCCNTCTLR(m) sys_reg(2, 1, 0, (4 | (m & 3)), 5)
222 #define SYS_TRCCNTRLDVR(m) sys_reg(2, 1, 0, (0 | (m & 3)), 5)
223 #define SYS_TRCCNTVR(m) sys_reg(2, 1, 0, (8 | (m & 3)), 5)
224 #define SYS_TRCCONFIGR sys_reg(2, 1, 0, 4, 0)
225 #define SYS_TRCDEVARCH sys_reg(2, 1, 7, 15, 6)
226 #define SYS_TRCDEVID sys_reg(2, 1, 7, 2, 7)
227 #define SYS_TRCEVENTCTL0R sys_reg(2, 1, 0, 8, 0)
228 #define SYS_TRCEVENTCTL1R sys_reg(2, 1, 0, 9, 0)
229 #define SYS_TRCEXTINSELR(m) sys_reg(2, 1, 0, (8 | (m & 3)), 4)
230 #define SYS_TRCIDR0 sys_reg(2, 1, 0, 8, 7)
231 #define SYS_TRCIDR10 sys_reg(2, 1, 0, 2, 6)
232 #define SYS_TRCIDR11 sys_reg(2, 1, 0, 3, 6)
233 #define SYS_TRCIDR12 sys_reg(2, 1, 0, 4, 6)
234 #define SYS_TRCIDR13 sys_reg(2, 1, 0, 5, 6)
235 #define SYS_TRCIDR1 sys_reg(2, 1, 0, 9, 7)
236 #define SYS_TRCIDR2 sys_reg(2, 1, 0, 10, 7)
237 #define SYS_TRCIDR3 sys_reg(2, 1, 0, 11, 7)
238 #define SYS_TRCIDR4 sys_reg(2, 1, 0, 12, 7)
239 #define SYS_TRCIDR5 sys_reg(2, 1, 0, 13, 7)
240 #define SYS_TRCIDR6 sys_reg(2, 1, 0, 14, 7)
241 #define SYS_TRCIDR7 sys_reg(2, 1, 0, 15, 7)
242 #define SYS_TRCIDR8 sys_reg(2, 1, 0, 0, 6)
243 #define SYS_TRCIDR9 sys_reg(2, 1, 0, 1, 6)
244 #define SYS_TRCIMSPEC(m) sys_reg(2, 1, 0, (m & 7), 7)
245 #define SYS_TRCITEEDCR sys_reg(2, 1, 0, 2, 1)
246 #define SYS_TRCOSLSR sys_reg(2, 1, 1, 1, 4)
247 #define SYS_TRCPRGCTLR sys_reg(2, 1, 0, 1, 0)
248 #define SYS_TRCQCTLR sys_reg(2, 1, 0, 1, 1)
249 #define SYS_TRCRSCTLR(m) sys_reg(2, 1, 1, (m & 15), (0 | (m >> 4)))
250 #define SYS_TRCRSR sys_reg(2, 1, 0, 10, 0)
251 #define SYS_TRCSEQEVR(m) sys_reg(2, 1, 0, (m & 3), 4)
252 #define SYS_TRCSEQRSTEVR sys_reg(2, 1, 0, 6, 4)
253 #define SYS_TRCSEQSTR sys_reg(2, 1, 0, 7, 4)
254 #define SYS_TRCSSCCR(m) sys_reg(2, 1, 1, (m & 7), 2)
255 #define SYS_TRCSSCSR(m) sys_reg(2, 1, 1, (8 | (m & 7)), 2)
256 #define SYS_TRCSSPCICR(m) sys_reg(2, 1, 1, (m & 7), 3)
257 #define SYS_TRCSTALLCTLR sys_reg(2, 1, 0, 11, 0)
258 #define SYS_TRCSTATR sys_reg(2, 1, 0, 3, 0)
259 #define SYS_TRCSYNCPR sys_reg(2, 1, 0, 13, 0)
260 #define SYS_TRCTRACEIDR sys_reg(2, 1, 0, 0, 1)
261 #define SYS_TRCTSCTLR sys_reg(2, 1, 0, 12, 0)
262 #define SYS_TRCVICTLR sys_reg(2, 1, 0, 0, 2)
263 #define SYS_TRCVIIECTLR sys_reg(2, 1, 0, 1, 2)
264 #define SYS_TRCVIPCSSCTLR sys_reg(2, 1, 0, 3, 2)
265 #define SYS_TRCVISSCTLR sys_reg(2, 1, 0, 2, 2)
266 #define SYS_TRCVMIDCCTLR0 sys_reg(2, 1, 3, 2, 2)
267 #define SYS_TRCVMIDCCTLR1 sys_reg(2, 1, 3, 3, 2)
268 #define SYS_TRCVMIDCVR(m) sys_reg(2, 1, 3, ((m & 7) << 1), 1)
271 #define SYS_TRCOSLAR sys_reg(2, 1, 1, 0, 4)
274 #define SYS_MPIDR_EL1 sys_reg(3, 0, 0, 0, 5)
278 #define SYS_RGSR_EL1 sys_reg(3, 0, 1, 0, 5)
281 #define SYS_TRFCR_EL1 sys_reg(3, 0, 1, 2, 1)
283 #define SYS_TCR_EL1 sys_reg(3, 0, 2, 0, 2)
285 #define SYS_APIAKEYLO_EL1 sys_reg(3, 0, 2, 1, 0)
286 #define SYS_APIAKEYHI_EL1 sys_reg(3, 0, 2, 1, 1)
287 #define SYS_APIBKEYLO_EL1 sys_reg(3, 0, 2, 1, 2)
288 #define SYS_APIBKEYHI_EL1 sys_reg(3, 0, 2, 1, 3)
290 #define SYS_APDAKEYLO_EL1 sys_reg(3, 0, 2, 2, 0)
291 #define SYS_APDAKEYHI_EL1 sys_reg(3, 0, 2, 2, 1)
292 #define SYS_APDBKEYLO_EL1 sys_reg(3, 0, 2, 2, 2)
293 #define SYS_APDBKEYHI_EL1 sys_reg(3, 0, 2, 2, 3)
295 #define SYS_APGAKEYLO_EL1 sys_reg(3, 0, 2, 3, 0)
296 #define SYS_APGAKEYHI_EL1 sys_reg(3, 0, 2, 3, 1)
303 #define SYS_AFSR0_EL1 sys_reg(3, 0, 5, 1, 0)
304 #define SYS_AFSR1_EL1 sys_reg(3, 0, 5, 1, 1)
305 #define SYS_ESR_EL1 sys_reg(3, 0, 5, 2, 0)
307 #define SYS_ERRIDR_EL1 sys_reg(3, 0, 5, 3, 0)
308 #define SYS_ERRSELR_EL1 sys_reg(3, 0, 5, 3, 1)
309 #define SYS_ERXFR_EL1 sys_reg(3, 0, 5, 4, 0)
310 #define SYS_ERXCTLR_EL1 sys_reg(3, 0, 5, 4, 1)
311 #define SYS_ERXSTATUS_EL1 sys_reg(3, 0, 5, 4, 2)
312 #define SYS_ERXADDR_EL1 sys_reg(3, 0, 5, 4, 3)
313 #define SYS_ERXPFGF_EL1 sys_reg(3, 0, 5, 4, 4)
314 #define SYS_ERXPFGCTL_EL1 sys_reg(3, 0, 5, 4, 5)
315 #define SYS_ERXPFGCDN_EL1 sys_reg(3, 0, 5, 4, 6)
316 #define SYS_ERXMISC0_EL1 sys_reg(3, 0, 5, 5, 0)
317 #define SYS_ERXMISC1_EL1 sys_reg(3, 0, 5, 5, 1)
318 #define SYS_ERXMISC2_EL1 sys_reg(3, 0, 5, 5, 2)
319 #define SYS_ERXMISC3_EL1 sys_reg(3, 0, 5, 5, 3)
320 #define SYS_TFSR_EL1 sys_reg(3, 0, 5, 6, 0)
321 #define SYS_TFSRE0_EL1 sys_reg(3, 0, 5, 6, 1)
331 BIT_ULL(6) | BIT_ULL(4) | BIT_ULL(2) | BIT_ULL(0))
348 #define TRBSR_EL1_BSC_MASK GENMASK(5, 0)
352 #define SYS_PMINTENCLR_EL1 sys_reg(3, 0, 9, 14, 2)
356 #define SYS_MAIR_EL1 sys_reg(3, 0, 10, 2, 0)
364 #define SYS_ICC_HPPIR0_EL1 sys_reg(3, 0, 12, 8, 2)
369 #define SYS_ICC_AP0R2_EL1 SYS_ICC_AP0Rn_EL1(2)
374 #define SYS_ICC_AP1R2_EL1 SYS_ICC_AP1Rn_EL1(2)
378 #define SYS_ICC_SGI1R_EL1 sys_reg(3, 0, 12, 11, 5)
383 #define SYS_ICC_HPPIR1_EL1 sys_reg(3, 0, 12, 12, 2)
386 #define SYS_ICC_SRE_EL1 sys_reg(3, 0, 12, 12, 5)
390 #define SYS_ACCDATA_EL1 sys_reg(3, 0, 13, 0, 5)
396 #define SYS_RNDR_EL0 sys_reg(3, 3, 2, 4, 0)
397 #define SYS_RNDRRS_EL0 sys_reg(3, 3, 2, 4, 1)
401 #define SYS_PMCNTENCLR_EL0 sys_reg(3, 3, 9, 12, 2)
404 #define SYS_PMSELR_EL0 sys_reg(3, 3, 9, 12, 5)
409 #define SYS_PMXEVCNTR_EL0 sys_reg(3, 3, 9, 13, 2)
413 #define SYS_TPIDR_EL0 sys_reg(3, 3, 13, 0, 2)
415 #define SYS_TPIDR2_EL0 sys_reg(3, 3, 13, 0, 5)
421 #define SYS_AMCR_EL0 SYS_AM_EL0(2, 0)
422 #define SYS_AMCFGR_EL0 SYS_AM_EL0(2, 1)
423 #define SYS_AMCGCR_EL0 SYS_AM_EL0(2, 2)
424 #define SYS_AMUSERENR_EL0 SYS_AM_EL0(2, 3)
425 #define SYS_AMCNTENCLR0_EL0 SYS_AM_EL0(2, 4)
426 #define SYS_AMCNTENSET0_EL0 SYS_AM_EL0(2, 5)
433 * Counter: 11 011 1101 010:n<3> n<2:0>
434 * Type: 11 011 1101 011:n<3> n<2:0>
435 * n: 0-15
439 * Counter: 11 011 1101 110:n<3> n<2:0>
440 * Type: 11 011 1101 111:n<3> n<2:0>
441 * n: 0-15
452 #define SYS_AMEVCNTR0_INST_RET_EL0 SYS_AMEVCNTR0_EL0(2)
458 #define SYS_CNTPCTSS_EL0 sys_reg(3, 3, 14, 0, 5)
461 #define SYS_CNTP_TVAL_EL0 sys_reg(3, 3, 14, 2, 0)
462 #define SYS_CNTP_CTL_EL0 sys_reg(3, 3, 14, 2, 1)
463 #define SYS_CNTP_CVAL_EL0 sys_reg(3, 3, 14, 2, 2)
466 #define SYS_CNTV_CVAL_EL0 sys_reg(3, 3, 14, 3, 2)
468 #define SYS_AARCH32_CNTP_TVAL sys_reg(0, 0, 14, 2, 0)
469 #define SYS_AARCH32_CNTP_CTL sys_reg(0, 0, 14, 2, 1)
471 #define SYS_AARCH32_CNTP_CVAL sys_reg(0, 2, 0, 14, 0)
483 #define SYS_VMPIDR_EL2 sys_reg(3, 4, 0, 0, 5)
489 #define SYS_CPTR_EL2 sys_reg(3, 4, 1, 1, 2)
493 #define SYS_TTBR0_EL2 sys_reg(3, 4, 2, 0, 0)
494 #define SYS_TTBR1_EL2 sys_reg(3, 4, 2, 0, 1)
495 #define SYS_TCR_EL2 sys_reg(3, 4, 2, 0, 2)
496 #define SYS_VTTBR_EL2 sys_reg(3, 4, 2, 1, 0)
497 #define SYS_VTCR_EL2 sys_reg(3, 4, 2, 1, 2)
499 #define SYS_TRFCR_EL2 sys_reg(3, 4, 1, 2, 1)
504 #define SYS_IFSR32_EL2 sys_reg(3, 4, 5, 0, 1)
505 #define SYS_AFSR0_EL2 sys_reg(3, 4, 5, 1, 0)
506 #define SYS_AFSR1_EL2 sys_reg(3, 4, 5, 1, 1)
507 #define SYS_ESR_EL2 sys_reg(3, 4, 5, 2, 0)
508 #define SYS_VSESR_EL2 sys_reg(3, 4, 5, 2, 3)
509 #define SYS_FPEXC32_EL2 sys_reg(3, 4, 5, 3, 0)
510 #define SYS_TFSR_EL2 sys_reg(3, 4, 5, 6, 0)
515 #define SYS_MAIR_EL2 sys_reg(3, 4, 10, 2, 0)
520 #define SYS_RMR_EL2 sys_reg(3, 4, 12, 0, 2)
525 #define SYS_ICH_AP0R2_EL2 __SYS__AP0Rx_EL2(2)
531 #define SYS_ICH_AP1R2_EL2 __SYS__AP1Rx_EL2(2)
535 #define SYS_ICC_SRE_EL2 sys_reg(3, 4, 12, 9, 5)
538 #define SYS_ICH_MISR_EL2 sys_reg(3, 4, 12, 11, 2)
540 #define SYS_ICH_ELRSR_EL2 sys_reg(3, 4, 12, 11, 5)
546 #define SYS_ICH_LR2_EL2 __SYS__LR0_EL2(2)
549 #define SYS_ICH_LR5_EL2 __SYS__LR0_EL2(5)
556 #define SYS_ICH_LR10_EL2 __SYS__LR8_EL2(2)
559 #define SYS_ICH_LR13_EL2 __SYS__LR8_EL2(5)
564 #define SYS_TPIDR_EL2 sys_reg(3, 4, 13, 0, 2)
570 #define SYS_SCTLR_EL12 sys_reg(3, 5, 1, 0, 0)
571 #define SYS_TTBR0_EL12 sys_reg(3, 5, 2, 0, 0)
572 #define SYS_TTBR1_EL12 sys_reg(3, 5, 2, 0, 1)
573 #define SYS_TCR_EL12 sys_reg(3, 5, 2, 0, 2)
574 #define SYS_SPSR_EL12 sys_reg(3, 5, 4, 0, 0)
575 #define SYS_ELR_EL12 sys_reg(3, 5, 4, 0, 1)
576 #define SYS_AFSR0_EL12 sys_reg(3, 5, 5, 1, 0)
577 #define SYS_AFSR1_EL12 sys_reg(3, 5, 5, 1, 1)
578 #define SYS_ESR_EL12 sys_reg(3, 5, 5, 2, 0)
579 #define SYS_TFSR_EL12 sys_reg(3, 5, 5, 6, 0)
580 #define SYS_MAIR_EL12 sys_reg(3, 5, 10, 2, 0)
581 #define SYS_AMAIR_EL12 sys_reg(3, 5, 10, 3, 0)
582 #define SYS_VBAR_EL12 sys_reg(3, 5, 12, 0, 0)
583 #define SYS_CNTKCTL_EL12 sys_reg(3, 5, 14, 1, 0)
584 #define SYS_CNTP_TVAL_EL02 sys_reg(3, 5, 14, 2, 0)
585 #define SYS_CNTP_CTL_EL02 sys_reg(3, 5, 14, 2, 1)
586 #define SYS_CNTP_CVAL_EL02 sys_reg(3, 5, 14, 2, 2)
587 #define SYS_CNTV_TVAL_EL02 sys_reg(3, 5, 14, 3, 0)
588 #define SYS_CNTV_CTL_EL02 sys_reg(3, 5, 14, 3, 1)
589 #define SYS_CNTV_CVAL_EL02 sys_reg(3, 5, 14, 3, 2)
599 #define OP_AT_S1E0R sys_insn(AT_Op0, 0, AT_CRn, 8, 2)
606 #define OP_AT_S12E1W sys_insn(AT_Op0, 4, AT_CRn, 8, 5)
613 #define OP_TLBI_ASIDE1OS sys_insn(1, 0, 8, 1, 2)
615 #define OP_TLBI_VALE1OS sys_insn(1, 0, 8, 1, 5)
617 #define OP_TLBI_RVAE1IS sys_insn(1, 0, 8, 2, 1)
618 #define OP_TLBI_RVAAE1IS sys_insn(1, 0, 8, 2, 3)
619 #define OP_TLBI_RVALE1IS sys_insn(1, 0, 8, 2, 5)
620 #define OP_TLBI_RVAALE1IS sys_insn(1, 0, 8, 2, 7)
623 #define OP_TLBI_ASIDE1IS sys_insn(1, 0, 8, 3, 2)
625 #define OP_TLBI_VALE1IS sys_insn(1, 0, 8, 3, 5)
627 #define OP_TLBI_RVAE1OS sys_insn(1, 0, 8, 5, 1)
628 #define OP_TLBI_RVAAE1OS sys_insn(1, 0, 8, 5, 3)
629 #define OP_TLBI_RVALE1OS sys_insn(1, 0, 8, 5, 5)
630 #define OP_TLBI_RVAALE1OS sys_insn(1, 0, 8, 5, 7)
633 #define OP_TLBI_RVALE1 sys_insn(1, 0, 8, 6, 5)
637 #define OP_TLBI_ASIDE1 sys_insn(1, 0, 8, 7, 2)
639 #define OP_TLBI_VALE1 sys_insn(1, 0, 8, 7, 5)
643 #define OP_TLBI_ASIDE1OSNXS sys_insn(1, 0, 9, 1, 2)
645 #define OP_TLBI_VALE1OSNXS sys_insn(1, 0, 9, 1, 5)
647 #define OP_TLBI_RVAE1ISNXS sys_insn(1, 0, 9, 2, 1)
648 #define OP_TLBI_RVAAE1ISNXS sys_insn(1, 0, 9, 2, 3)
649 #define OP_TLBI_RVALE1ISNXS sys_insn(1, 0, 9, 2, 5)
650 #define OP_TLBI_RVAALE1ISNXS sys_insn(1, 0, 9, 2, 7)
653 #define OP_TLBI_ASIDE1ISNXS sys_insn(1, 0, 9, 3, 2)
655 #define OP_TLBI_VALE1ISNXS sys_insn(1, 0, 9, 3, 5)
657 #define OP_TLBI_RVAE1OSNXS sys_insn(1, 0, 9, 5, 1)
658 #define OP_TLBI_RVAAE1OSNXS sys_insn(1, 0, 9, 5, 3)
659 #define OP_TLBI_RVALE1OSNXS sys_insn(1, 0, 9, 5, 5)
660 #define OP_TLBI_RVAALE1OSNXS sys_insn(1, 0, 9, 5, 7)
663 #define OP_TLBI_RVALE1NXS sys_insn(1, 0, 9, 6, 5)
667 #define OP_TLBI_ASIDE1NXS sys_insn(1, 0, 9, 7, 2)
669 #define OP_TLBI_VALE1NXS sys_insn(1, 0, 9, 7, 5)
672 #define OP_TLBI_RIPAS2E1IS sys_insn(1, 4, 8, 0, 2)
673 #define OP_TLBI_IPAS2LE1IS sys_insn(1, 4, 8, 0, 5)
678 #define OP_TLBI_VALE2OS sys_insn(1, 4, 8, 1, 5)
680 #define OP_TLBI_RVAE2IS sys_insn(1, 4, 8, 2, 1)
681 #define OP_TLBI_RVALE2IS sys_insn(1, 4, 8, 2, 5)
685 #define OP_TLBI_VALE2IS sys_insn(1, 4, 8, 3, 5)
689 #define OP_TLBI_RIPAS2E1 sys_insn(1, 4, 8, 4, 2)
692 #define OP_TLBI_IPAS2LE1 sys_insn(1, 4, 8, 4, 5)
695 #define OP_TLBI_RVAE2OS sys_insn(1, 4, 8, 5, 1)
696 #define OP_TLBI_RVALE2OS sys_insn(1, 4, 8, 5, 5)
698 #define OP_TLBI_RVALE2 sys_insn(1, 4, 8, 6, 5)
702 #define OP_TLBI_VALE2 sys_insn(1, 4, 8, 7, 5)
705 #define OP_TLBI_RIPAS2E1ISNXS sys_insn(1, 4, 9, 0, 2)
706 #define OP_TLBI_IPAS2LE1ISNXS sys_insn(1, 4, 9, 0, 5)
711 #define OP_TLBI_VALE2OSNXS sys_insn(1, 4, 9, 1, 5)
713 #define OP_TLBI_RVAE2ISNXS sys_insn(1, 4, 9, 2, 1)
714 #define OP_TLBI_RVALE2ISNXS sys_insn(1, 4, 9, 2, 5)
718 #define OP_TLBI_VALE2ISNXS sys_insn(1, 4, 9, 3, 5)
722 #define OP_TLBI_RIPAS2E1NXS sys_insn(1, 4, 9, 4, 2)
725 #define OP_TLBI_IPAS2LE1NXS sys_insn(1, 4, 9, 4, 5)
728 #define OP_TLBI_RVAE2OSNXS sys_insn(1, 4, 9, 5, 1)
729 #define OP_TLBI_RVALE2OSNXS sys_insn(1, 4, 9, 5, 5)
731 #define OP_TLBI_RVALE2NXS sys_insn(1, 4, 9, 6, 5)
735 #define OP_TLBI_VALE2NXS sys_insn(1, 4, 9, 7, 5)
739 #define OP_BRB_IALL sys_insn(1, 1, 7, 2, 4)
740 #define OP_BRB_INJ sys_insn(1, 1, 7, 2, 5)
742 #define OP_DVP_RCTX sys_insn(1, 3, 7, 3, 5)
768 #define SCTLR_ELx_C (BIT(2))
773 #define SCTLR_EL2_RES1 ((BIT(4)) | (BIT(5)) | (BIT(11)) | (BIT(16)) | \
881 * only uses tags in the range 0xF0-0xFF, which we map to MTE tags 0x0-0xF.
907 #define TRFCR_ELx_TS_SHIFT 5
922 #define ICH_LR_VIRTUAL_ID_MASK ((1ULL << 32) - 1)
947 #define ICH_VMCR_ACK_CTL_SHIFT 2
1090 * set mask are set. Other bits are left as-is.