Lines Matching +full:io +full:- +full:channel +full:- +full:mux
1 // SPDX-License-Identifier: GPL-2.0+
5 * (C) Copyright 2017 - 2022, Xilinx, Inc.
6 * (C) Copyright 2022 - 2023, Advanced Micro Devices, Inc.
11 /dts-v1/;
14 #include "zynqmp-clk-ccf.dtsi"
15 #include <dt-bindings/input/input.h>
16 #include <dt-bindings/gpio/gpio.h>
17 #include <dt-bindings/pinctrl/pinctrl-zynqmp.h>
18 #include <dt-bindings/phy/phy.h>
22 compatible = "xlnx,zynqmp-zcu111-revA", "xlnx,zynqmp-zcu111", "xlnx,zynqmp";
39 stdout-path = "serial0:115200n8";
48 gpio-keys {
49 compatible = "gpio-keys";
51 switch-19 {
55 wakeup-source;
61 compatible = "gpio-leds";
62 heartbeat-led {
65 linux,default-trigger = "heartbeat";
69 ina226-u67 {
70 compatible = "iio-hwmon";
71 io-channels = <&u67 0>, <&u67 1>, <&u67 2>, <&u67 3>;
73 ina226-u59 {
74 compatible = "iio-hwmon";
75 io-channels = <&u59 0>, <&u59 1>, <&u59 2>, <&u59 3>;
77 ina226-u61 {
78 compatible = "iio-hwmon";
79 io-channels = <&u61 0>, <&u61 1>, <&u61 2>, <&u61 3>;
81 ina226-u60 {
82 compatible = "iio-hwmon";
83 io-channels = <&u60 0>, <&u60 1>, <&u60 2>, <&u60 3>;
85 ina226-u64 {
86 compatible = "iio-hwmon";
87 io-channels = <&u64 0>, <&u64 1>, <&u64 2>, <&u64 3>;
89 ina226-u69 {
90 compatible = "iio-hwmon";
91 io-channels = <&u69 0>, <&u69 1>, <&u69 2>, <&u69 3>;
93 ina226-u66 {
94 compatible = "iio-hwmon";
95 io-channels = <&u66 0>, <&u66 1>, <&u66 2>, <&u66 3>;
97 ina226-u65 {
98 compatible = "iio-hwmon";
99 io-channels = <&u65 0>, <&u65 1>, <&u65 2>, <&u65 3>;
101 ina226-u63 {
102 compatible = "iio-hwmon";
103 io-channels = <&u63 0>, <&u63 1>, <&u63 2>, <&u63 3>;
105 ina226-u3 {
106 compatible = "iio-hwmon";
107 io-channels = <&u3 0>, <&u3 1>, <&u3 2>, <&u3 3>;
109 ina226-u71 {
110 compatible = "iio-hwmon";
111 io-channels = <&u71 0>, <&u71 1>, <&u71 2>, <&u71 3>;
113 ina226-u77 {
114 compatible = "iio-hwmon";
115 io-channels = <&u77 0>, <&u77 1>, <&u77 2>, <&u77 3>;
117 ina226-u73 {
118 compatible = "iio-hwmon";
119 io-channels = <&u73 0>, <&u73 1>, <&u73 2>, <&u73 3>;
121 ina226-u79 {
122 compatible = "iio-hwmon";
123 io-channels = <&u79 0>, <&u79 1>, <&u79 2>, <&u79 3>;
128 compatible = "fixed-clock";
129 #clock-cells = <0>;
130 clock-frequency = <48000000>;
172 phy-handle = <&phy0>;
173 phy-mode = "rgmii-id";
174 pinctrl-names = "default";
175 pinctrl-0 = <&pinctrl_gem3_default>;
177 #address-cells = <1>;
178 #size-cells = <0>;
179 phy0: ethernet-phy@c {
180 #phy-cells = <1>;
181 compatible = "ethernet-phy-id2000.a231";
183 ti,rx-internal-delay = <0x8>;
184 ti,tx-internal-delay = <0xa>;
185 ti,fifo-depth = <0x1>;
186 ti,dp83867-rxctrl-strap-quirk;
187 reset-gpios = <&tca6416_u22 6 GPIO_ACTIVE_LOW>;
194 pinctrl-names = "default";
195 pinctrl-0 = <&pinctrl_gpio_default>;
204 clock-frequency = <400000>;
205 pinctrl-names = "default", "gpio";
206 pinctrl-0 = <&pinctrl_i2c0_default>;
207 pinctrl-1 = <&pinctrl_i2c0_gpio>;
208 scl-gpios = <&gpio 14 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
209 sda-gpios = <&gpio 15 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
214 gpio-controller; /* interrupt not connected */
215 #gpio-cells = <2>;
219 * 0 - MAX6643_OT_B
220 * 1 - MAX6643_FANFAIL_B
221 * 2 - MIO26_PMU_INPUT_LS
222 * 4 - SFP_SI5382_INT_ALM
223 * 5 - IIC_MUX_RESET_B
224 * 6 - GEM3_EXP_RESET_B
225 * 10 - FMCP_HSPC_PRSNT_M2C_B
226 * 11 - CLK_SPI_MUX_SEL0
227 * 12 - CLK_SPI_MUX_SEL1
228 * 16 - IRPS5401_ALERT_B
229 * 17 - INA226_PMBUS_ALERT
230 * 3, 7, 13-15 - not connected
234 i2c-mux@75 { /* u23 */
236 #address-cells = <1>;
237 #size-cells = <0>;
240 #address-cells = <1>;
241 #size-cells = <0>;
247 #io-channel-cells = <1>;
248 label = "ina226-u67";
250 shunt-resistor = <2000>;
254 #io-channel-cells = <1>;
255 label = "ina226-u59";
257 shunt-resistor = <5000>;
261 #io-channel-cells = <1>;
262 label = "ina226-u61";
264 shunt-resistor = <5000>;
268 #io-channel-cells = <1>;
269 label = "ina226-u60";
271 shunt-resistor = <5000>;
275 #io-channel-cells = <1>;
276 label = "ina226-u64";
278 shunt-resistor = <5000>;
282 #io-channel-cells = <1>;
283 label = "ina226-u69";
285 shunt-resistor = <2000>;
289 #io-channel-cells = <1>;
290 label = "ina226-u66";
292 shunt-resistor = <5000>;
296 #io-channel-cells = <1>;
297 label = "ina226-u65";
299 shunt-resistor = <5000>;
303 #io-channel-cells = <1>;
304 label = "ina226-u63";
306 shunt-resistor = <5000>;
310 #io-channel-cells = <1>;
311 label = "ina226-u3";
313 shunt-resistor = <5000>;
317 #io-channel-cells = <1>;
318 label = "ina226-u71";
320 shunt-resistor = <5000>;
324 #io-channel-cells = <1>;
325 label = "ina226-u77";
327 shunt-resistor = <5000>;
331 #io-channel-cells = <1>;
332 label = "ina226-u73";
334 shunt-resistor = <5000>;
338 #io-channel-cells = <1>;
339 label = "ina226-u79";
341 shunt-resistor = <5000>;
345 #address-cells = <1>;
346 #size-cells = <0>;
351 #address-cells = <1>;
352 #size-cells = <0>;
354 irps5401_43: irps5401@43 { /* IRPS5401 - u53 check these */
358 irps5401_44: irps5401@44 { /* IRPS5401 - u55 */
362 irps5401_45: irps5401@45 { /* IRPS5401 - u57 */
374 #address-cells = <1>;
375 #size-cells = <0>;
384 clock-frequency = <400000>;
385 pinctrl-names = "default", "gpio";
386 pinctrl-0 = <&pinctrl_i2c1_default>;
387 pinctrl-1 = <&pinctrl_i2c1_gpio>;
388 scl-gpios = <&gpio 16 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
389 sda-gpios = <&gpio 17 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
391 i2c-mux@74 { /* u26 */
393 #address-cells = <1>;
394 #size-cells = <0>;
397 #address-cells = <1>;
398 #size-cells = <0>;
403 * 0 - 256B address 0x54
404 * 256B - 512B address 0x55
405 * 512B - 768B address 0x56
406 * 768B - 1024B address 0x57
414 #address-cells = <1>;
415 #size-cells = <0>;
417 si5341: clock-generator@36 { /* SI5341 - u46 */
420 #clock-cells = <2>;
421 #address-cells = <1>;
422 #size-cells = <0>;
424 clock-names = "xtal";
425 clock-output-names = "si5341";
428 /* refclk0 for PS-GT, used for DP */
430 always-on;
433 /* refclk2 for PS-GT, used for USB3 */
435 always-on;
438 /* refclk3 for PS-GT, used for SATA */
440 always-on;
445 always-on;
450 always-on;
455 always-on;
460 #address-cells = <1>;
461 #size-cells = <0>;
463 si570_1: clock-generator@5d { /* USER SI570 - u47 */
464 #clock-cells = <0>;
467 temperature-stability = <50>;
468 factory-fout = <300000000>;
469 clock-frequency = <300000000>;
470 clock-output-names = "si570_user";
474 #address-cells = <1>;
475 #size-cells = <0>;
477 si570_2: clock-generator@5d { /* USER MGT SI570 - u49 */
478 #clock-cells = <0>;
481 temperature-stability = <50>;
482 factory-fout = <156250000>;
483 clock-frequency = <156250000>;
484 clock-output-names = "si570_mgt";
488 #address-cells = <1>;
489 #size-cells = <0>;
491 /* SI5382 - u48 */
494 #address-cells = <1>;
495 #size-cells = <0>;
497 sc18is603@2f { /* sc18is602 - u93 */
503 * LMK04208 - u90 or
504 * LMX2594 - u102 or
505 * LMX2594 - u103 or
506 * LMX2594 - u104
511 #address-cells = <1>;
512 #size-cells = <0>;
519 i2c-mux@75 {
521 #address-cells = <1>;
522 #size-cells = <0>;
526 #address-cells = <1>;
527 #size-cells = <0>;
532 #address-cells = <1>;
533 #size-cells = <0>;
538 #address-cells = <1>;
539 #size-cells = <0>;
544 #address-cells = <1>;
545 #size-cells = <0>;
550 #address-cells = <1>;
551 #size-cells = <0>;
556 #address-cells = <1>;
557 #size-cells = <0>;
562 #address-cells = <1>;
563 #size-cells = <0>;
568 #address-cells = <1>;
569 #size-cells = <0>;
578 pinctrl_i2c0_default: i2c0-default {
579 mux {
586 bias-pull-up;
587 slew-rate = <SLEW_RATE_SLOW>;
588 power-source = <IO_STANDARD_LVCMOS18>;
592 pinctrl_i2c0_gpio: i2c0-gpio {
593 mux {
600 slew-rate = <SLEW_RATE_SLOW>;
601 power-source = <IO_STANDARD_LVCMOS18>;
605 pinctrl_i2c1_default: i2c1-default {
606 mux {
613 bias-pull-up;
614 slew-rate = <SLEW_RATE_SLOW>;
615 power-source = <IO_STANDARD_LVCMOS18>;
619 pinctrl_i2c1_gpio: i2c1-gpio {
620 mux {
627 slew-rate = <SLEW_RATE_SLOW>;
628 power-source = <IO_STANDARD_LVCMOS18>;
632 pinctrl_uart0_default: uart0-default {
633 mux {
640 slew-rate = <SLEW_RATE_SLOW>;
641 power-source = <IO_STANDARD_LVCMOS18>;
644 conf-rx {
646 bias-high-impedance;
649 conf-tx {
651 bias-disable;
655 pinctrl_usb0_default: usb0-default {
656 mux {
663 power-source = <IO_STANDARD_LVCMOS18>;
666 conf-rx {
668 bias-high-impedance;
669 drive-strength = <12>;
670 slew-rate = <SLEW_RATE_FAST>;
673 conf-tx {
676 bias-disable;
677 drive-strength = <4>;
678 slew-rate = <SLEW_RATE_SLOW>;
682 pinctrl_gem3_default: gem3-default {
683 mux {
690 slew-rate = <SLEW_RATE_SLOW>;
691 power-source = <IO_STANDARD_LVCMOS18>;
694 conf-rx {
697 bias-high-impedance;
698 low-power-disable;
701 conf-tx {
704 bias-disable;
705 low-power-enable;
708 mux-mdio {
713 conf-mdio {
715 slew-rate = <SLEW_RATE_SLOW>;
716 power-source = <IO_STANDARD_LVCMOS18>;
717 bias-disable;
721 pinctrl_sdhci1_default: sdhci1-default {
722 mux {
729 slew-rate = <SLEW_RATE_SLOW>;
730 power-source = <IO_STANDARD_LVCMOS18>;
731 bias-disable;
734 mux-cd {
739 conf-cd {
741 bias-high-impedance;
742 bias-pull-up;
743 slew-rate = <SLEW_RATE_SLOW>;
744 power-source = <IO_STANDARD_LVCMOS18>;
748 pinctrl_gpio_default: gpio-default {
749 mux {
756 slew-rate = <SLEW_RATE_SLOW>;
757 power-source = <IO_STANDARD_LVCMOS18>;
760 mux-msp {
765 conf-msp {
767 slew-rate = <SLEW_RATE_SLOW>;
768 power-source = <IO_STANDARD_LVCMOS18>;
771 conf-pull-up {
773 bias-pull-up;
776 conf-pull-none {
778 bias-disable;
787 clock-names = "ref1", "ref2", "ref3";
793 compatible = "m25p80", "jedec,spi-nor"; /* 16MB + 16MB */
794 #address-cells = <1>;
795 #size-cells = <1>;
797 spi-tx-bus-width = <4>;
798 spi-rx-bus-width = <4>; /* FIXME also DUAL configuration possible */
799 spi-max-frequency = <108000000>; /* Based on DC1 spec */
810 ceva,p0-cominit-params = /bits/ 8 <0x18 0x40 0x18 0x28>;
811 ceva,p0-comwake-params = /bits/ 8 <0x06 0x14 0x08 0x0E>;
812 ceva,p0-burst-params = /bits/ 8 <0x13 0x08 0x4A 0x06>;
813 ceva,p0-retry-params = /bits/ 16 <0x96A4 0x3FFC>;
814 ceva,p1-cominit-params = /bits/ 8 <0x18 0x40 0x18 0x28>;
815 ceva,p1-comwake-params = /bits/ 8 <0x06 0x14 0x08 0x0E>;
816 ceva,p1-burst-params = /bits/ 8 <0x13 0x08 0x4A 0x06>;
817 ceva,p1-retry-params = /bits/ 16 <0x96A4 0x3FFC>;
818 phy-names = "sata-phy";
825 pinctrl-names = "default";
826 pinctrl-0 = <&pinctrl_sdhci1_default>;
827 disable-wp;
831 no-1-8-v;
832 xlnx,mio-bank = <1>;
837 pinctrl-names = "default";
838 pinctrl-0 = <&pinctrl_uart0_default>;
844 pinctrl-names = "default";
845 pinctrl-0 = <&pinctrl_usb0_default>;
846 phy-names = "usb3-phy";
854 maximum-speed = "super-speed";
863 phy-names = "dp-phy0", "dp-phy1";