Lines Matching +full:0 +full:x02a8
43 pinctrl-0 = <&can_tc1_pins_default>;
44 #phy-cells = <0>;
52 pinctrl-0 = <&can_tc2_pins_default>;
53 #phy-cells = <0>;
62 pinctrl-0 = <&gpio_keys_pins_default>;
80 pinctrl-0 = <&leds_pins_default>, <&user_leds_pins_default>;
111 AM64X_IOPAD(0x0084, PIN_OUTPUT, 7) /* (P16) GPMC0_ADVn_ALE.GPIO0_32 */
117 AM64X_IOPAD(0x0090, PIN_OUTPUT, 7) /* (P17) GPMC0_BE0n_CLE.GPIO0_35 */
123 AM64X_IOPAD(0x0044, PIN_INPUT, 7) /* (T18) GPMC0_AD2.GPIO0_17 */
124 AM64X_IOPAD(0x0054, PIN_INPUT, 7) /* (V20) GPMC0_AD6.GPIO0_21 */
130 AM64X_IOPAD(0x0268, PIN_INPUT, 0) /* (C18) I2C1_SCL */
131 AM64X_IOPAD(0x026c, PIN_INPUT, 0) /* (B19) I2C1_SDA */
137 AM64X_IOPAD(0x0250, PIN_OUTPUT, 0) /* (A17) MCAN0_TX */
138 AM64X_IOPAD(0x0254, PIN_INPUT, 0) /* (B17) MCAN0_RX */
144 AM64X_IOPAD(0x0258, PIN_OUTPUT, 0) /* (C17) MCAN1_TX */
145 AM64X_IOPAD(0x025c, PIN_INPUT, 0) /* (D17) MCAN1_RX */
151 AM64X_IOPAD(0x027c, PIN_INPUT_PULLUP, 0) /* (K18) MMC1_DAT3 */
152 AM64X_IOPAD(0x0280, PIN_INPUT_PULLUP, 0) /* (K19) MMC1_DAT2 */
153 AM64X_IOPAD(0x0284, PIN_INPUT_PULLUP, 0) /* (L21) MMC1_DAT1 */
154 AM64X_IOPAD(0x0288, PIN_INPUT_PULLUP, 0) /* (K21) MMC1_DAT0 */
155 AM64X_IOPAD(0x028c, PIN_INPUT_PULLDOWN, 0) /* (L20) MMC1_CLK */
156 AM64X_IOPAD(0x0290, PIN_INPUT, 0) /* MMC1_CLKLB */
157 AM64X_IOPAD(0x0294, PIN_INPUT_PULLUP, 0) /* (J19) MMC1_CMD */
158 AM64X_IOPAD(0x0298, PIN_INPUT_PULLUP, 0) /* (D19) MMC1_SDCD */
164 AM64X_IOPAD(0x0230, PIN_INPUT, 0) /* (D15) UART0_RXD */
165 AM64X_IOPAD(0x0234, PIN_OUTPUT, 0) /* (C16) UART0_TXD */
171 AM64X_IOPAD(0x0248, PIN_INPUT, 0) /* (D16) UART1_CTSn */
172 AM64X_IOPAD(0x024C, PIN_OUTPUT, 0) /* (E16) UART1_RTSn */
173 AM64X_IOPAD(0x0240, PIN_INPUT, 0) /* (E15) UART1_RXD */
174 AM64X_IOPAD(0x0244, PIN_OUTPUT, 0) /* (E14) UART1_TXD */
180 AM64X_IOPAD(0x02a8, PIN_OUTPUT, 0) /* (E19) USB0_DRVVBUS */
186 AM64X_IOPAD(0x017c, PIN_OUTPUT, 7) /* (T1) PRG0_PRU0_GPO7.GPIO1_7 */
192 AM64X_IOPAD(0x0098, PIN_OUTPUT, 7) /* (W19) GPMC0_WAIT0.GPIO0_37 */
198 AM64X_IOPAD(0x003c, PIN_OUTPUT, 7) /* (T20) GPMC0_AD0.GPIO0_15 */
199 AM64X_IOPAD(0x0040, PIN_OUTPUT, 7) /* (U21) GPMC0_AD1.GPIO0_16 */
207 pinctrl-0 = <&main_i2c1_pins_default>;
213 reg = <0x51>;
218 reg = <0x62>;
240 pinctrl-0 = <&main_mcan0_pins_default>;
247 pinctrl-0 = <&main_mcan1_pins_default>;
254 pinctrl-0 = <&main_uart0_pins_default>;
261 pinctrl-0 = <&main_uart1_pins_default>;
269 pinctrl-0 = <&main_mmc1_pins_default>;
277 serdes0_pcie_usb_link: phy@0 {
278 reg = <0>;
280 #phy-cells = <0>;
296 pinctrl-0 = <&main_usb0_pins_default>;