Lines Matching +full:sci +full:- +full:intr
1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2020-2021 Texas Instruments Incorporated - https://www.ti.com/
8 #include <dt-bindings/phy/phy-cadence.h>
9 #include <dt-bindings/phy/phy-ti.h>
12 serdes_refclk: clock-cmnrefclk {
13 #clock-cells = <0>;
14 compatible = "fixed-clock";
15 clock-frequency = <0>;
21 compatible = "mmio-sram";
23 #address-cells = <1>;
24 #size-cells = <1>;
27 tfa-sram@1c0000 {
31 dmsc-sram@1e0000 {
35 sproxy-sram@1fc000 {
41 compatible = "ti,j721e-system-controller", "syscon", "simple-mfd";
43 #address-cells = <1>;
44 #size-cells = <1>;
48 compatible = "ti,am654-chipid";
52 serdes_ln_ctrl: mux-controller {
53 compatible = "mmio-mux";
54 #mux-control-cells = <1>;
55 mux-reg-masks = <0x4080 0x3>; /* SERDES0 lane0 select */
59 compatible = "ti,am654-phy-gmii-sel";
61 #phy-cells = <1>;
64 epwm_tbclk: clock-controller@4140 {
65 compatible = "ti,am64-epwm-tbclk";
67 #clock-cells = <1>;
71 gic500: interrupt-controller@1800000 {
72 compatible = "arm,gic-v3";
73 #address-cells = <2>;
74 #size-cells = <2>;
76 #interrupt-cells = <3>;
77 interrupt-controller;
89 gic_its: msi-controller@1820000 {
90 compatible = "arm,gic-v3-its";
92 socionext,synquacer-pre-its = <0x1000000 0x400000>;
93 msi-controller;
94 #msi-cells = <1>;
99 compatible = "simple-mfd";
100 #address-cells = <2>;
101 #size-cells = <2>;
102 dma-ranges;
105 ti,sci-dev-id = <25>;
108 compatible = "ti,am654-secure-proxy";
109 #mbox-cells = <1>;
110 reg-names = "target_data", "rt", "scfg";
114 interrupt-names = "rx_012";
118 inta_main_dmss: interrupt-controller@48000000 {
119 compatible = "ti,sci-inta";
121 #interrupt-cells = <0>;
122 interrupt-controller;
123 interrupt-parent = <&gic500>;
124 msi-controller;
125 ti,sci = <&dmsc>;
126 ti,sci-dev-id = <28>;
127 ti,interrupt-ranges = <4 68 36>;
128 ti,unmapped-event-sources = <&main_bcdma>, <&main_pktdma>;
131 main_bcdma: dma-controller@485c0100 {
132 compatible = "ti,am64-dmss-bcdma";
138 reg-names = "gcfg", "bchanrt", "rchanrt", "tchanrt", "ringrt";
139 msi-parent = <&inta_main_dmss>;
140 #dma-cells = <3>;
142 ti,sci = <&dmsc>;
143 ti,sci-dev-id = <26>;
144 ti,sci-rm-range-bchan = <0x20>; /* BLOCK_COPY_CHAN */
145 ti,sci-rm-range-rchan = <0x21>; /* SPLIT_TR_RX_CHAN */
146 ti,sci-rm-range-tchan = <0x22>; /* SPLIT_TR_TX_CHAN */
149 main_pktdma: dma-controller@485c0000 {
150 compatible = "ti,am64-dmss-pktdma";
155 reg-names = "gcfg", "rchanrt", "tchanrt", "ringrt";
156 msi-parent = <&inta_main_dmss>;
157 #dma-cells = <2>;
159 ti,sci = <&dmsc>;
160 ti,sci-dev-id = <30>;
161 ti,sci-rm-range-tchan = <0x23>, /* UNMAPPED_TX_CHAN */
167 ti,sci-rm-range-tflow = <0x10>, /* RING_UNMAPPED_TX_CHAN */
173 ti,sci-rm-range-rchan = <0x29>, /* UNMAPPED_RX_CHAN */
181 ti,sci-rm-range-rflow = <0x2a>, /* FLOW_UNMAPPED_RX_CHAN */
190 dmsc: system-controller@44043000 {
191 compatible = "ti,k2g-sci";
192 ti,host-id = <12>;
193 mbox-names = "rx", "tx";
196 reg-names = "debug_messages";
199 k3_pds: power-controller {
200 compatible = "ti,sci-pm-domain";
201 #power-domain-cells = <2>;
204 k3_clks: clock-controller {
205 compatible = "ti,k2g-sci-clk";
206 #clock-cells = <2>;
209 k3_reset: reset-controller {
210 compatible = "ti,sci-reset";
211 #reset-cells = <2>;
216 compatible = "pinctrl-single";
218 #pinctrl-cells = <1>;
219 pinctrl-single,register-width = <32>;
220 pinctrl-single,function-mask = <0xffffffff>;
224 compatible = "ti,am654-timer";
228 clock-names = "fck";
229 assigned-clocks = <&k3_clks 36 1>;
230 assigned-clock-parents = <&k3_clks 36 2>;
231 power-domains = <&k3_pds 36 TI_SCI_PD_EXCLUSIVE>;
232 ti,timer-pwm;
236 compatible = "ti,am654-timer";
240 clock-names = "fck";
241 assigned-clocks = <&k3_clks 37 1>;
242 assigned-clock-parents = <&k3_clks 37 2>;
243 power-domains = <&k3_pds 37 TI_SCI_PD_EXCLUSIVE>;
244 ti,timer-pwm;
248 compatible = "ti,am654-timer";
252 clock-names = "fck";
253 assigned-clocks = <&k3_clks 38 1>;
254 assigned-clock-parents = <&k3_clks 38 2>;
255 power-domains = <&k3_pds 38 TI_SCI_PD_EXCLUSIVE>;
256 ti,timer-pwm;
260 compatible = "ti,am654-timer";
264 clock-names = "fck";
265 assigned-clocks = <&k3_clks 39 1>;
266 assigned-clock-parents = <&k3_clks 39 2>;
267 power-domains = <&k3_pds 39 TI_SCI_PD_EXCLUSIVE>;
268 ti,timer-pwm;
272 compatible = "ti,am654-timer";
276 clock-names = "fck";
277 assigned-clocks = <&k3_clks 40 1>;
278 assigned-clock-parents = <&k3_clks 40 2>;
279 power-domains = <&k3_pds 40 TI_SCI_PD_EXCLUSIVE>;
280 ti,timer-pwm;
284 compatible = "ti,am654-timer";
288 clock-names = "fck";
289 assigned-clocks = <&k3_clks 41 1>;
290 assigned-clock-parents = <&k3_clks 41 2>;
291 power-domains = <&k3_pds 41 TI_SCI_PD_EXCLUSIVE>;
292 ti,timer-pwm;
296 compatible = "ti,am654-timer";
300 clock-names = "fck";
301 assigned-clocks = <&k3_clks 42 1>;
302 assigned-clock-parents = <&k3_clks 42 2>;
303 power-domains = <&k3_pds 42 TI_SCI_PD_EXCLUSIVE>;
304 ti,timer-pwm;
308 compatible = "ti,am654-timer";
312 clock-names = "fck";
313 assigned-clocks = <&k3_clks 43 1>;
314 assigned-clock-parents = <&k3_clks 43 2>;
315 power-domains = <&k3_pds 43 TI_SCI_PD_EXCLUSIVE>;
316 ti,timer-pwm;
320 compatible = "ti,am654-timer";
324 clock-names = "fck";
325 assigned-clocks = <&k3_clks 44 1>;
326 assigned-clock-parents = <&k3_clks 44 2>;
327 power-domains = <&k3_pds 44 TI_SCI_PD_EXCLUSIVE>;
328 ti,timer-pwm;
332 compatible = "ti,am654-timer";
336 clock-names = "fck";
337 assigned-clocks = <&k3_clks 45 1>;
338 assigned-clock-parents = <&k3_clks 45 2>;
339 power-domains = <&k3_pds 45 TI_SCI_PD_EXCLUSIVE>;
340 ti,timer-pwm;
344 compatible = "ti,am654-timer";
348 clock-names = "fck";
349 assigned-clocks = <&k3_clks 46 1>;
350 assigned-clock-parents = <&k3_clks 46 2>;
351 power-domains = <&k3_pds 46 TI_SCI_PD_EXCLUSIVE>;
352 ti,timer-pwm;
356 compatible = "ti,am654-timer";
360 clock-names = "fck";
361 assigned-clocks = <&k3_clks 47 1>;
362 assigned-clock-parents = <&k3_clks 47 2>;
363 power-domains = <&k3_pds 47 TI_SCI_PD_EXCLUSIVE>;
364 ti,timer-pwm;
368 compatible = "ti,j721e-esm";
370 ti,esm-pins = <160>, <161>;
374 compatible = "ti,am64-uart", "ti,am654-uart";
377 clock-frequency = <48000000>;
378 power-domains = <&k3_pds 146 TI_SCI_PD_EXCLUSIVE>;
380 clock-names = "fclk";
385 compatible = "ti,am64-uart", "ti,am654-uart";
388 clock-frequency = <48000000>;
389 power-domains = <&k3_pds 152 TI_SCI_PD_EXCLUSIVE>;
391 clock-names = "fclk";
396 compatible = "ti,am64-uart", "ti,am654-uart";
399 clock-frequency = <48000000>;
400 power-domains = <&k3_pds 153 TI_SCI_PD_EXCLUSIVE>;
402 clock-names = "fclk";
407 compatible = "ti,am64-uart", "ti,am654-uart";
410 clock-frequency = <48000000>;
411 power-domains = <&k3_pds 154 TI_SCI_PD_EXCLUSIVE>;
413 clock-names = "fclk";
418 compatible = "ti,am64-uart", "ti,am654-uart";
421 clock-frequency = <48000000>;
422 power-domains = <&k3_pds 155 TI_SCI_PD_EXCLUSIVE>;
424 clock-names = "fclk";
429 compatible = "ti,am64-uart", "ti,am654-uart";
432 clock-frequency = <48000000>;
433 power-domains = <&k3_pds 156 TI_SCI_PD_EXCLUSIVE>;
435 clock-names = "fclk";
440 compatible = "ti,am64-uart", "ti,am654-uart";
443 clock-frequency = <48000000>;
444 power-domains = <&k3_pds 158 TI_SCI_PD_EXCLUSIVE>;
446 clock-names = "fclk";
451 compatible = "ti,am64-i2c", "ti,omap4-i2c";
454 #address-cells = <1>;
455 #size-cells = <0>;
456 power-domains = <&k3_pds 102 TI_SCI_PD_EXCLUSIVE>;
458 clock-names = "fck";
463 compatible = "ti,am64-i2c", "ti,omap4-i2c";
466 #address-cells = <1>;
467 #size-cells = <0>;
468 power-domains = <&k3_pds 103 TI_SCI_PD_EXCLUSIVE>;
470 clock-names = "fck";
475 compatible = "ti,am64-i2c", "ti,omap4-i2c";
478 #address-cells = <1>;
479 #size-cells = <0>;
480 power-domains = <&k3_pds 104 TI_SCI_PD_EXCLUSIVE>;
482 clock-names = "fck";
487 compatible = "ti,am64-i2c", "ti,omap4-i2c";
490 #address-cells = <1>;
491 #size-cells = <0>;
492 power-domains = <&k3_pds 105 TI_SCI_PD_EXCLUSIVE>;
494 clock-names = "fck";
499 compatible = "ti,am654-mcspi", "ti,omap4-mcspi";
502 #address-cells = <1>;
503 #size-cells = <0>;
504 power-domains = <&k3_pds 141 TI_SCI_PD_EXCLUSIVE>;
507 dma-names = "tx0", "rx0";
512 compatible = "ti,am654-mcspi","ti,omap4-mcspi";
515 #address-cells = <1>;
516 #size-cells = <0>;
517 power-domains = <&k3_pds 142 TI_SCI_PD_EXCLUSIVE>;
523 compatible = "ti,am654-mcspi","ti,omap4-mcspi";
526 #address-cells = <1>;
527 #size-cells = <0>;
528 power-domains = <&k3_pds 143 TI_SCI_PD_EXCLUSIVE>;
534 compatible = "ti,am654-mcspi","ti,omap4-mcspi";
537 #address-cells = <1>;
538 #size-cells = <0>;
539 power-domains = <&k3_pds 144 TI_SCI_PD_EXCLUSIVE>;
545 compatible = "ti,am654-mcspi","ti,omap4-mcspi";
548 #address-cells = <1>;
549 #size-cells = <0>;
550 power-domains = <&k3_pds 145 TI_SCI_PD_EXCLUSIVE>;
555 main_gpio_intr: interrupt-controller@a00000 {
556 compatible = "ti,sci-intr";
558 ti,intr-trigger-type = <1>;
559 interrupt-controller;
560 interrupt-parent = <&gic500>;
561 #interrupt-cells = <1>;
562 ti,sci = <&dmsc>;
563 ti,sci-dev-id = <3>;
564 ti,interrupt-ranges = <0 32 16>;
568 compatible = "ti,am64-gpio", "ti,keystone-gpio";
570 gpio-controller;
571 #gpio-cells = <2>;
572 interrupt-parent = <&main_gpio_intr>;
575 interrupt-controller;
576 #interrupt-cells = <2>;
578 ti,davinci-gpio-unbanked = <0>;
579 power-domains = <&k3_pds 77 TI_SCI_PD_EXCLUSIVE>;
581 clock-names = "gpio";
585 compatible = "ti,am64-gpio", "ti,keystone-gpio";
587 gpio-controller;
588 #gpio-cells = <2>;
589 interrupt-parent = <&main_gpio_intr>;
592 interrupt-controller;
593 #interrupt-cells = <2>;
595 ti,davinci-gpio-unbanked = <0>;
596 power-domains = <&k3_pds 78 TI_SCI_PD_EXCLUSIVE>;
598 clock-names = "gpio";
602 compatible = "ti,am64-sdhci-8bit";
605 power-domains = <&k3_pds 57 TI_SCI_PD_EXCLUSIVE>;
607 clock-names = "clk_ahb", "clk_xin";
608 mmc-ddr-1_8v;
609 mmc-hs200-1_8v;
610 ti,trm-icp = <0x2>;
611 ti,otap-del-sel-legacy = <0x0>;
612 ti,otap-del-sel-mmc-hs = <0x0>;
613 ti,otap-del-sel-ddr52 = <0x6>;
614 ti,otap-del-sel-hs200 = <0x7>;
618 compatible = "ti,am64-sdhci-4bit";
621 power-domains = <&k3_pds 58 TI_SCI_PD_EXCLUSIVE>;
623 clock-names = "clk_ahb", "clk_xin";
624 ti,trm-icp = <0x2>;
625 ti,otap-del-sel-legacy = <0x0>;
626 ti,otap-del-sel-sd-hs = <0xf>;
627 ti,otap-del-sel-sdr12 = <0xf>;
628 ti,otap-del-sel-sdr25 = <0xf>;
629 ti,otap-del-sel-sdr50 = <0xc>;
630 ti,otap-del-sel-sdr104 = <0x6>;
631 ti,otap-del-sel-ddr50 = <0x9>;
632 ti,clkbuf-sel = <0x7>;
636 compatible = "ti,am642-cpsw-nuss";
637 #address-cells = <2>;
638 #size-cells = <2>;
640 reg-names = "cpsw_nuss";
643 assigned-clocks = <&k3_clks 13 1>;
644 assigned-clock-parents = <&k3_clks 13 9>;
645 clock-names = "fck";
646 power-domains = <&k3_pds 13 TI_SCI_PD_EXCLUSIVE>;
657 dma-names = "tx0", "tx1", "tx2", "tx3", "tx4", "tx5", "tx6",
660 ethernet-ports {
661 #address-cells = <1>;
662 #size-cells = <0>;
666 ti,mac-only;
669 mac-address = [00 00 00 00 00 00];
670 ti,syscon-efuse = <&main_conf 0x200>;
675 ti,mac-only;
678 mac-address = [00 00 00 00 00 00];
683 compatible = "ti,cpsw-mdio","ti,davinci_mdio";
685 #address-cells = <1>;
686 #size-cells = <0>;
688 clock-names = "fck";
694 compatible = "ti,j721e-cpts";
697 clock-names = "cpts";
698 interrupts-extended = <&gic500 GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>;
699 interrupt-names = "cpts";
700 ti,cpts-ext-ts-inputs = <4>;
701 ti,cpts-periodic-outputs = <2>;
706 compatible = "ti,j721e-cpts";
708 reg-names = "cpts";
709 power-domains = <&k3_pds 84 TI_SCI_PD_EXCLUSIVE>;
711 clock-names = "cpts";
712 assigned-clocks = <&k3_clks 84 0>;
713 assigned-clock-parents = <&k3_clks 84 8>;
715 interrupt-names = "cpts";
716 ti,cpts-periodic-outputs = <6>;
717 ti,cpts-ext-ts-inputs = <8>;
721 compatible = "pinctrl-single";
723 #pinctrl-cells = <1>;
724 pinctrl-single,register-width = <32>;
725 pinctrl-single,function-mask = <0x000107ff>;
728 usbss0: cdns-usb@f900000 {
729 compatible = "ti,am64-usb";
731 power-domains = <&k3_pds 161 TI_SCI_PD_EXCLUSIVE>;
733 clock-names = "ref", "lpm";
734 assigned-clocks = <&k3_clks 161 9>; /* USB2_REFCLK */
735 assigned-clock-parents = <&k3_clks 161 10>; /* HF0SC0 */
736 #address-cells = <2>;
737 #size-cells = <2>;
744 reg-names = "otg",
750 interrupt-names = "host",
753 maximum-speed = "super-speed";
759 compatible = "ti,am654-tscadc", "ti,am3359-tscadc";
762 power-domains = <&k3_pds 0 TI_SCI_PD_EXCLUSIVE>;
764 assigned-clocks = <&k3_clks 0 0>;
765 assigned-clock-parents = <&k3_clks 0 3>;
766 assigned-clock-rates = <60000000>;
767 clock-names = "fck";
771 #io-channel-cells = <1>;
772 compatible = "ti,am654-adc", "ti,am3359-adc";
777 compatible = "simple-bus";
779 #address-cells = <2>;
780 #size-cells = <2>;
784 compatible = "ti,am654-ospi", "cdns,qspi-nor";
788 cdns,fifo-depth = <256>;
789 cdns,fifo-width = <4>;
790 cdns,trigger-address = <0x0>;
791 #address-cells = <0x1>;
792 #size-cells = <0x0>;
794 assigned-clocks = <&k3_clks 75 6>;
795 assigned-clock-parents = <&k3_clks 75 7>;
796 assigned-clock-rates = <166666666>;
797 power-domains = <&k3_pds 75 TI_SCI_PD_EXCLUSIVE>;
803 compatible = "ti,am64-hwspinlock";
805 #hwlock-cells = <1>;
809 compatible = "ti,am64-mailbox";
813 #mbox-cells = <1>;
814 ti,mbox-num-users = <4>;
815 ti,mbox-num-fifos = <16>;
820 compatible = "ti,am64-mailbox";
824 #mbox-cells = <1>;
825 ti,mbox-num-users = <4>;
826 ti,mbox-num-fifos = <16>;
831 compatible = "ti,am64-mailbox";
835 #mbox-cells = <1>;
836 ti,mbox-num-users = <4>;
837 ti,mbox-num-fifos = <16>;
842 compatible = "ti,am64-mailbox";
846 #mbox-cells = <1>;
847 ti,mbox-num-users = <4>;
848 ti,mbox-num-fifos = <16>;
853 compatible = "ti,am64-mailbox";
856 #mbox-cells = <1>;
857 ti,mbox-num-users = <4>;
858 ti,mbox-num-fifos = <16>;
863 compatible = "ti,am64-mailbox";
866 #mbox-cells = <1>;
867 ti,mbox-num-users = <4>;
868 ti,mbox-num-fifos = <16>;
873 compatible = "ti,am64-r5fss";
874 ti,cluster-mode = <0>;
875 #address-cells = <1>;
876 #size-cells = <1>;
881 power-domains = <&k3_pds 119 TI_SCI_PD_EXCLUSIVE>;
884 compatible = "ti,am64-r5f";
887 reg-names = "atcm", "btcm";
888 ti,sci = <&dmsc>;
889 ti,sci-dev-id = <121>;
890 ti,sci-proc-ids = <0x01 0xff>;
892 firmware-name = "am64-main-r5f0_0-fw";
893 ti,atcm-enable = <1>;
894 ti,btcm-enable = <1>;
899 compatible = "ti,am64-r5f";
902 reg-names = "atcm", "btcm";
903 ti,sci = <&dmsc>;
904 ti,sci-dev-id = <122>;
905 ti,sci-proc-ids = <0x02 0xff>;
907 firmware-name = "am64-main-r5f0_1-fw";
908 ti,atcm-enable = <1>;
909 ti,btcm-enable = <1>;
915 compatible = "ti,am64-r5fss";
916 ti,cluster-mode = <0>;
917 #address-cells = <1>;
918 #size-cells = <1>;
923 power-domains = <&k3_pds 120 TI_SCI_PD_EXCLUSIVE>;
926 compatible = "ti,am64-r5f";
929 reg-names = "atcm", "btcm";
930 ti,sci = <&dmsc>;
931 ti,sci-dev-id = <123>;
932 ti,sci-proc-ids = <0x06 0xff>;
934 firmware-name = "am64-main-r5f1_0-fw";
935 ti,atcm-enable = <1>;
936 ti,btcm-enable = <1>;
941 compatible = "ti,am64-r5f";
944 reg-names = "atcm", "btcm";
945 ti,sci = <&dmsc>;
946 ti,sci-dev-id = <124>;
947 ti,sci-proc-ids = <0x07 0xff>;
949 firmware-name = "am64-main-r5f1_1-fw";
950 ti,atcm-enable = <1>;
951 ti,btcm-enable = <1>;
957 compatible = "ti,am64-wiz-10g";
958 #address-cells = <1>;
959 #size-cells = <1>;
960 power-domains = <&k3_pds 162 TI_SCI_PD_EXCLUSIVE>;
962 clock-names = "fck", "core_ref_clk", "ext_ref_clk";
963 num-lanes = <1>;
964 #reset-cells = <1>;
965 #clock-cells = <1>;
968 assigned-clocks = <&k3_clks 162 1>;
969 assigned-clock-parents = <&k3_clks 162 5>;
972 compatible = "ti,j721e-serdes-10g";
974 reg-names = "torrent_phy";
976 reset-names = "torrent_reset";
979 clock-names = "refclk", "phy_en_refclk";
980 assigned-clocks = <&serdes_wiz0 TI_WIZ_PLL0_REFCLK>,
983 assigned-clock-parents = <&k3_clks 162 1>,
986 #address-cells = <1>;
987 #size-cells = <0>;
988 #clock-cells = <1>;
993 compatible = "ti,am64-pcie-host", "ti,j721e-pcie-host";
998 reg-names = "intd_cfg", "user_cfg", "reg", "cfg";
999 interrupt-names = "link_state";
1002 ti,syscon-pcie-ctrl = <&main_conf 0x4070>;
1003 max-link-speed = <2>;
1004 num-lanes = <1>;
1005 power-domains = <&k3_pds 114 TI_SCI_PD_EXCLUSIVE>;
1007 clock-names = "fck", "pcie_refclk";
1008 #address-cells = <3>;
1009 #size-cells = <2>;
1010 bus-range = <0x0 0xff>;
1011 cdns,no-bar-match-nbits = <64>;
1012 vendor-id = <0x104c>;
1013 device-id = <0xb010>;
1014 msi-map = <0x0 &gic_its 0x0 0x10000>;
1017 dma-ranges = <0x02000000 0x0 0x0 0x0 0x0 0x00000010 0x0>;
1021 pcie0_ep: pcie-ep@f102000 {
1022 compatible = "ti,am64-pcie-ep", "ti,j721e-pcie-ep";
1027 reg-names = "intd_cfg", "user_cfg", "reg", "mem";
1028 interrupt-names = "link_state";
1030 ti,syscon-pcie-ctrl = <&main_conf 0x4070>;
1031 max-link-speed = <2>;
1032 num-lanes = <1>;
1033 power-domains = <&k3_pds 114 TI_SCI_PD_EXCLUSIVE>;
1035 clock-names = "fck";
1036 max-functions = /bits/ 8 <1>;
1041 compatible = "ti,am64-epwm", "ti,am3352-ehrpwm";
1042 #pwm-cells = <3>;
1044 power-domains = <&k3_pds 86 TI_SCI_PD_EXCLUSIVE>;
1046 clock-names = "tbclk", "fck";
1051 compatible = "ti,am64-epwm", "ti,am3352-ehrpwm";
1052 #pwm-cells = <3>;
1054 power-domains = <&k3_pds 87 TI_SCI_PD_EXCLUSIVE>;
1056 clock-names = "tbclk", "fck";
1061 compatible = "ti,am64-epwm", "ti,am3352-ehrpwm";
1062 #pwm-cells = <3>;
1064 power-domains = <&k3_pds 88 TI_SCI_PD_EXCLUSIVE>;
1066 clock-names = "tbclk", "fck";
1071 compatible = "ti,am64-epwm", "ti,am3352-ehrpwm";
1072 #pwm-cells = <3>;
1074 power-domains = <&k3_pds 89 TI_SCI_PD_EXCLUSIVE>;
1076 clock-names = "tbclk", "fck";
1081 compatible = "ti,am64-epwm", "ti,am3352-ehrpwm";
1082 #pwm-cells = <3>;
1084 power-domains = <&k3_pds 90 TI_SCI_PD_EXCLUSIVE>;
1086 clock-names = "tbclk", "fck";
1091 compatible = "ti,am64-epwm", "ti,am3352-ehrpwm";
1092 #pwm-cells = <3>;
1094 power-domains = <&k3_pds 91 TI_SCI_PD_EXCLUSIVE>;
1096 clock-names = "tbclk", "fck";
1101 compatible = "ti,am64-epwm", "ti,am3352-ehrpwm";
1102 #pwm-cells = <3>;
1104 power-domains = <&k3_pds 92 TI_SCI_PD_EXCLUSIVE>;
1106 clock-names = "tbclk", "fck";
1111 compatible = "ti,am64-epwm", "ti,am3352-ehrpwm";
1112 #pwm-cells = <3>;
1114 power-domains = <&k3_pds 93 TI_SCI_PD_EXCLUSIVE>;
1116 clock-names = "tbclk", "fck";
1121 compatible = "ti,am64-epwm", "ti,am3352-ehrpwm";
1122 #pwm-cells = <3>;
1124 power-domains = <&k3_pds 94 TI_SCI_PD_EXCLUSIVE>;
1126 clock-names = "tbclk", "fck";
1131 compatible = "ti,am64-ecap", "ti,am3352-ecap";
1132 #pwm-cells = <3>;
1134 power-domains = <&k3_pds 51 TI_SCI_PD_EXCLUSIVE>;
1136 clock-names = "fck";
1141 compatible = "ti,am64-ecap", "ti,am3352-ecap";
1142 #pwm-cells = <3>;
1144 power-domains = <&k3_pds 52 TI_SCI_PD_EXCLUSIVE>;
1146 clock-names = "fck";
1151 compatible = "ti,am64-ecap", "ti,am3352-ecap";
1152 #pwm-cells = <3>;
1154 power-domains = <&k3_pds 53 TI_SCI_PD_EXCLUSIVE>;
1156 clock-names = "fck";
1161 compatible = "ti,j7-rti-wdt";
1164 power-domains = <&k3_pds 125 TI_SCI_PD_EXCLUSIVE>;
1165 assigned-clocks = <&k3_clks 125 0>;
1166 assigned-clock-parents = <&k3_clks 125 2>;
1170 compatible = "ti,j7-rti-wdt";
1173 power-domains = <&k3_pds 126 TI_SCI_PD_EXCLUSIVE>;
1174 assigned-clocks = <&k3_clks 126 0>;
1175 assigned-clock-parents = <&k3_clks 126 2>;
1179 compatible = "ti,am642-icssg";
1181 power-domains = <&k3_pds 81 TI_SCI_PD_EXCLUSIVE>;
1182 #address-cells = <1>;
1183 #size-cells = <1>;
1190 reg-names = "dram0", "dram1", "shrdram2";
1194 compatible = "ti,pruss-cfg", "syscon";
1196 #address-cells = <1>;
1197 #size-cells = <1>;
1201 #address-cells = <1>;
1202 #size-cells = <0>;
1204 icssg0_coreclk_mux: coreclk-mux@3c {
1206 #clock-cells = <0>;
1209 assigned-clocks = <&icssg0_coreclk_mux>;
1210 assigned-clock-parents = <&k3_clks 81 20>;
1213 icssg0_iepclk_mux: iepclk-mux@30 {
1215 #clock-cells = <0>;
1218 assigned-clocks = <&icssg0_iepclk_mux>;
1219 assigned-clock-parents = <&icssg0_coreclk_mux>;
1224 icssg0_mii_rt: mii-rt@32000 {
1225 compatible = "ti,pruss-mii", "syscon";
1229 icssg0_mii_g_rt: mii-g-rt@33000 {
1230 compatible = "ti,pruss-mii-g", "syscon";
1234 icssg0_intc: interrupt-controller@20000 {
1235 compatible = "ti,icssg-intc";
1237 interrupt-controller;
1238 #interrupt-cells = <3>;
1247 interrupt-names = "host_intr0", "host_intr1",
1254 compatible = "ti,am642-pru";
1258 reg-names = "iram", "control", "debug";
1259 firmware-name = "am64x-pru0_0-fw";
1263 compatible = "ti,am642-rtu";
1267 reg-names = "iram", "control", "debug";
1268 firmware-name = "am64x-rtu0_0-fw";
1272 compatible = "ti,am642-tx-pru";
1276 reg-names = "iram", "control", "debug";
1277 firmware-name = "am64x-txpru0_0-fw";
1281 compatible = "ti,am642-pru";
1285 reg-names = "iram", "control", "debug";
1286 firmware-name = "am64x-pru0_1-fw";
1290 compatible = "ti,am642-rtu";
1294 reg-names = "iram", "control", "debug";
1295 firmware-name = "am64x-rtu0_1-fw";
1299 compatible = "ti,am642-tx-pru";
1303 reg-names = "iram", "control", "debug";
1304 firmware-name = "am64x-txpru0_1-fw";
1311 clock-names = "fck";
1312 #address-cells = <1>;
1313 #size-cells = <0>;
1320 compatible = "ti,am642-icssg";
1322 power-domains = <&k3_pds 82 TI_SCI_PD_EXCLUSIVE>;
1323 #address-cells = <1>;
1324 #size-cells = <1>;
1331 reg-names = "dram0", "dram1", "shrdram2";
1335 compatible = "ti,pruss-cfg", "syscon";
1337 #address-cells = <1>;
1338 #size-cells = <1>;
1342 #address-cells = <1>;
1343 #size-cells = <0>;
1345 icssg1_coreclk_mux: coreclk-mux@3c {
1347 #clock-cells = <0>;
1350 assigned-clocks = <&icssg1_coreclk_mux>;
1351 assigned-clock-parents = <&k3_clks 82 20>;
1354 icssg1_iepclk_mux: iepclk-mux@30 {
1356 #clock-cells = <0>;
1359 assigned-clocks = <&icssg1_iepclk_mux>;
1360 assigned-clock-parents = <&icssg1_coreclk_mux>;
1365 icssg1_mii_rt: mii-rt@32000 {
1366 compatible = "ti,pruss-mii", "syscon";
1370 icssg1_mii_g_rt: mii-g-rt@33000 {
1371 compatible = "ti,pruss-mii-g", "syscon";
1375 icssg1_intc: interrupt-controller@20000 {
1376 compatible = "ti,icssg-intc";
1378 interrupt-controller;
1379 #interrupt-cells = <3>;
1388 interrupt-names = "host_intr0", "host_intr1",
1395 compatible = "ti,am642-pru";
1399 reg-names = "iram", "control", "debug";
1400 firmware-name = "am64x-pru1_0-fw";
1404 compatible = "ti,am642-rtu";
1408 reg-names = "iram", "control", "debug";
1409 firmware-name = "am64x-rtu1_0-fw";
1413 compatible = "ti,am642-tx-pru";
1417 reg-names = "iram", "control", "debug";
1418 firmware-name = "am64x-txpru1_0-fw";
1422 compatible = "ti,am642-pru";
1426 reg-names = "iram", "control", "debug";
1427 firmware-name = "am64x-pru1_1-fw";
1431 compatible = "ti,am642-rtu";
1435 reg-names = "iram", "control", "debug";
1436 firmware-name = "am64x-rtu1_1-fw";
1440 compatible = "ti,am642-tx-pru";
1444 reg-names = "iram", "control", "debug";
1445 firmware-name = "am64x-txpru1_1-fw";
1451 #address-cells = <1>;
1452 #size-cells = <0>;
1454 clock-names = "fck";
1464 reg-names = "m_can", "message_ram";
1465 power-domains = <&k3_pds 98 TI_SCI_PD_EXCLUSIVE>;
1467 clock-names = "hclk", "cclk";
1470 interrupt-names = "int0", "int1";
1471 bosch,mram-cfg = <0x0 128 64 64 64 64 32 32>;
1479 reg-names = "m_can", "message_ram";
1480 power-domains = <&k3_pds 99 TI_SCI_PD_EXCLUSIVE>;
1482 clock-names = "hclk", "cclk";
1485 interrupt-names = "int0", "int1";
1486 bosch,mram-cfg = <0x0 128 64 64 64 64 32 32>;
1491 compatible = "ti,am64-sa2ul";
1493 power-domains = <&k3_pds 133 TI_SCI_PD_SHARED>;
1494 #address-cells = <2>;
1495 #size-cells = <2>;
1499 dma-names = "tx", "rx1", "rx2";
1502 compatible = "inside-secure,safexcel-eip76";
1505 status = "disabled"; /* Used by OP-TEE */
1509 gpmc0: memory-controller@3b000000 {
1510 compatible = "ti,am64-gpmc";
1511 power-domains = <&k3_pds 80 TI_SCI_PD_EXCLUSIVE>;
1513 clock-names = "fck";
1516 reg-names = "cfg", "data";
1518 gpmc,num-cs = <3>;
1519 gpmc,num-waitpins = <2>;
1520 #address-cells = <2>;
1521 #size-cells = <1>;
1522 interrupt-controller;
1523 #interrupt-cells = <2>;
1524 gpio-controller;
1525 #gpio-cells = <2>;
1530 compatible = "ti,am64-elm";
1533 power-domains = <&k3_pds 54 TI_SCI_PD_EXCLUSIVE>;
1535 clock-names = "fck";
1539 main_vtm0: temperature-sensor@b00000 {
1540 compatible = "ti,j7200-vtm";
1543 power-domains = <&k3_pds 95 TI_SCI_PD_EXCLUSIVE>;
1544 #thermal-sensor-cells = <1>;