Lines Matching refs:mmcc
9 #include <dt-bindings/clock/qcom,mmcc-sdm660.h>
711 <&mmcc AHB_CLK_SRC>;
1450 mmcc: clock-controller@c8c0000 { label
1451 compatible = "qcom,mmcc-sdm630";
1484 power-domains = <&mmcc MDSS_GDSC>;
1486 clocks = <&mmcc MDSS_AHB_CLK>,
1487 <&mmcc MDSS_AXI_CLK>,
1488 <&mmcc MDSS_VSYNC_CLK>,
1489 <&mmcc MDSS_MDP_CLK>;
1513 assigned-clocks = <&mmcc MDSS_MDP_CLK>,
1514 <&mmcc MDSS_VSYNC_CLK>;
1517 clocks = <&mmcc MDSS_AHB_CLK>,
1518 <&mmcc MDSS_AXI_CLK>,
1519 <&mmcc MDSS_MDP_CLK>,
1520 <&mmcc MDSS_VSYNC_CLK>;
1591 assigned-clocks = <&mmcc BYTE0_CLK_SRC>,
1592 <&mmcc PCLK0_CLK_SRC>;
1596 clocks = <&mmcc MDSS_MDP_CLK>,
1597 <&mmcc MDSS_BYTE0_CLK>,
1598 <&mmcc MDSS_BYTE0_INTF_CLK>,
1599 <&mmcc MNOC_AHB_CLK>,
1600 <&mmcc MDSS_AHB_CLK>,
1601 <&mmcc MDSS_AXI_CLK>,
1602 <&mmcc MISC_AHB_CLK>,
1603 <&mmcc MDSS_PCLK0_CLK>,
1604 <&mmcc MDSS_ESC0_CLK>;
1650 clocks = <&mmcc MDSS_AHB_CLK>, <&xo_board>;
1951 clocks = <&mmcc CAMSS_AHB_CLK>,
1952 <&mmcc CAMSS_CPHY_CSID0_CLK>,
1953 <&mmcc CAMSS_CPHY_CSID1_CLK>,
1954 <&mmcc CAMSS_CPHY_CSID2_CLK>,
1955 <&mmcc CAMSS_CPHY_CSID3_CLK>,
1956 <&mmcc CAMSS_CSI0_AHB_CLK>,
1957 <&mmcc CAMSS_CSI0_CLK>,
1958 <&mmcc CAMSS_CPHY_CSID0_CLK>,
1959 <&mmcc CAMSS_CSI0PIX_CLK>,
1960 <&mmcc CAMSS_CSI0RDI_CLK>,
1961 <&mmcc CAMSS_CSI1_AHB_CLK>,
1962 <&mmcc CAMSS_CSI1_CLK>,
1963 <&mmcc CAMSS_CPHY_CSID1_CLK>,
1964 <&mmcc CAMSS_CSI1PIX_CLK>,
1965 <&mmcc CAMSS_CSI1RDI_CLK>,
1966 <&mmcc CAMSS_CSI2_AHB_CLK>,
1967 <&mmcc CAMSS_CSI2_CLK>,
1968 <&mmcc CAMSS_CPHY_CSID2_CLK>,
1969 <&mmcc CAMSS_CSI2PIX_CLK>,
1970 <&mmcc CAMSS_CSI2RDI_CLK>,
1971 <&mmcc CAMSS_CSI3_AHB_CLK>,
1972 <&mmcc CAMSS_CSI3_CLK>,
1973 <&mmcc CAMSS_CPHY_CSID3_CLK>,
1974 <&mmcc CAMSS_CSI3PIX_CLK>,
1975 <&mmcc CAMSS_CSI3RDI_CLK>,
1976 <&mmcc CAMSS_CSI0PHYTIMER_CLK>,
1977 <&mmcc CAMSS_CSI1PHYTIMER_CLK>,
1978 <&mmcc CAMSS_CSI2PHYTIMER_CLK>,
1979 <&mmcc CSIPHY_AHB2CRIF_CLK>,
1980 <&mmcc CAMSS_CSI_VFE0_CLK>,
1981 <&mmcc CAMSS_CSI_VFE1_CLK>,
1982 <&mmcc CAMSS_ISPIF_AHB_CLK>,
1983 <&mmcc THROTTLE_CAMSS_AXI_CLK>,
1984 <&mmcc CAMSS_TOP_AHB_CLK>,
1985 <&mmcc CAMSS_VFE0_AHB_CLK>,
1986 <&mmcc CAMSS_VFE0_CLK>,
1987 <&mmcc CAMSS_VFE0_STREAM_CLK>,
1988 <&mmcc CAMSS_VFE1_AHB_CLK>,
1989 <&mmcc CAMSS_VFE1_CLK>,
1990 <&mmcc CAMSS_VFE1_STREAM_CLK>,
1991 <&mmcc CAMSS_VFE_VBIF_AHB_CLK>,
1992 <&mmcc CAMSS_VFE_VBIF_AXI_CLK>;
2041 power-domains = <&mmcc CAMSS_VFE0_GDSC>,
2042 <&mmcc CAMSS_VFE1_GDSC>;
2058 assigned-clocks = <&mmcc CAMSS_CCI_AHB_CLK>,
2059 <&mmcc CAMSS_CCI_CLK>;
2061 clocks = <&mmcc CAMSS_TOP_AHB_CLK>,
2062 <&mmcc CAMSS_CCI_AHB_CLK>,
2063 <&mmcc CAMSS_CCI_CLK>,
2064 <&mmcc CAMSS_AHB_CLK>;
2072 power-domains = <&mmcc CAMSS_TOP_GDSC>;
2093 clocks = <&mmcc VIDEO_CORE_CLK>,
2094 <&mmcc VIDEO_AHB_CLK>,
2095 <&mmcc VIDEO_AXI_CLK>,
2096 <&mmcc THROTTLE_VIDEO_AXI_CLK>;
2123 power-domains = <&mmcc VENUS_GDSC>;
2128 clocks = <&mmcc VIDEO_SUBCORE0_CLK>;
2130 power-domains = <&mmcc VENUS_CORE0_GDSC>;
2135 clocks = <&mmcc VIDEO_SUBCORE0_CLK>;
2137 power-domains = <&mmcc VENUS_CORE0_GDSC>;
2145 clocks = <&mmcc MNOC_AHB_CLK>,
2146 <&mmcc BIMC_SMMU_AHB_CLK>,
2148 <&mmcc BIMC_SMMU_AXI_CLK>;