Lines Matching +full:cpu +full:- +full:crit
1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
8 #include <dt-bindings/clock/qcom,gcc-qcm2290.h>
9 #include <dt-bindings/clock/qcom,rpmcc.h>
10 #include <dt-bindings/dma/qcom-gpi.h>
11 #include <dt-bindings/firmware/qcom,scm.h>
12 #include <dt-bindings/gpio/gpio.h>
13 #include <dt-bindings/interrupt-controller/arm-gic.h>
14 #include <dt-bindings/power/qcom-rpmpd.h>
17 interrupt-parent = <&intc>;
19 #address-cells = <2>;
20 #size-cells = <2>;
25 xo_board: xo-board {
26 compatible = "fixed-clock";
27 #clock-cells = <0>;
30 sleep_clk: sleep-clk {
31 compatible = "fixed-clock";
32 clock-frequency = <32764>;
33 #clock-cells = <0>;
38 #address-cells = <2>;
39 #size-cells = <0>;
41 CPU0: cpu@0 {
42 device_type = "cpu";
43 compatible = "arm,cortex-a53";
46 capacity-dmips-mhz = <1024>;
47 dynamic-power-coefficient = <100>;
48 enable-method = "psci";
49 next-level-cache = <&L2_0>;
50 qcom,freq-domain = <&cpufreq_hw 0>;
51 power-domains = <&CPU_PD0>;
52 power-domain-names = "psci";
53 L2_0: l2-cache {
55 cache-level = <2>;
56 cache-unified;
60 CPU1: cpu@1 {
61 device_type = "cpu";
62 compatible = "arm,cortex-a53";
65 capacity-dmips-mhz = <1024>;
66 dynamic-power-coefficient = <100>;
67 enable-method = "psci";
68 next-level-cache = <&L2_0>;
69 qcom,freq-domain = <&cpufreq_hw 0>;
70 power-domains = <&CPU_PD1>;
71 power-domain-names = "psci";
74 CPU2: cpu@2 {
75 device_type = "cpu";
76 compatible = "arm,cortex-a53";
79 capacity-dmips-mhz = <1024>;
80 dynamic-power-coefficient = <100>;
81 enable-method = "psci";
82 next-level-cache = <&L2_0>;
83 qcom,freq-domain = <&cpufreq_hw 0>;
84 power-domains = <&CPU_PD2>;
85 power-domain-names = "psci";
88 CPU3: cpu@3 {
89 device_type = "cpu";
90 compatible = "arm,cortex-a53";
93 capacity-dmips-mhz = <1024>;
94 dynamic-power-coefficient = <100>;
95 enable-method = "psci";
96 next-level-cache = <&L2_0>;
97 qcom,freq-domain = <&cpufreq_hw 0>;
98 power-domains = <&CPU_PD3>;
99 power-domain-names = "psci";
102 cpu-map {
105 cpu = <&CPU0>;
109 cpu = <&CPU1>;
113 cpu = <&CPU2>;
117 cpu = <&CPU3>;
122 domain-idle-states {
123 CLUSTER_SLEEP: cluster-sleep-0 {
124 compatible = "domain-idle-state";
125 arm,psci-suspend-param = <0x41000043>;
126 entry-latency-us = <800>;
127 exit-latency-us = <2118>;
128 min-residency-us = <7376>;
132 idle-states {
133 entry-method = "psci";
135 CPU_SLEEP: cpu-sleep-0 {
136 compatible = "arm,idle-state";
137 idle-state-name = "power-collapse";
138 arm,psci-suspend-param = <0x40000003>;
139 entry-latency-us = <290>;
140 exit-latency-us = <376>;
141 min-residency-us = <1182>;
142 local-timer-stop;
149 compatible = "qcom,scm-qcm2290", "qcom,scm";
151 clock-names = "core";
152 #reset-cells = <1>;
163 compatible = "arm,armv8-pmuv3";
168 compatible = "arm,psci-1.0";
171 CPU_PD0: power-domain-cpu0 {
172 #power-domain-cells = <0>;
173 power-domains = <&CLUSTER_PD>;
174 domain-idle-states = <&CPU_SLEEP>;
177 CPU_PD1: power-domain-cpu1 {
178 #power-domain-cells = <0>;
179 power-domains = <&CLUSTER_PD>;
180 domain-idle-states = <&CPU_SLEEP>;
183 CPU_PD2: power-domain-cpu2 {
184 #power-domain-cells = <0>;
185 power-domains = <&CLUSTER_PD>;
186 domain-idle-states = <&CPU_SLEEP>;
189 CPU_PD3: power-domain-cpu3 {
190 #power-domain-cells = <0>;
191 power-domains = <&CLUSTER_PD>;
192 domain-idle-states = <&CPU_SLEEP>;
195 CLUSTER_PD: power-domain-cpu-cluster {
196 #power-domain-cells = <0>;
197 domain-idle-states = <&CLUSTER_SLEEP>;
202 compatible = "qcom,qcm2290-rpm-proc", "qcom,rpm-proc";
204 glink-edge {
205 compatible = "qcom,glink-rpm";
207 qcom,rpm-msg-ram = <&rpm_msg_ram>;
210 rpm_requests: rpm-requests {
211 compatible = "qcom,rpm-qcm2290";
212 qcom,glink-channels = "rpm_requests";
214 rpmcc: clock-controller {
215 compatible = "qcom,rpmcc-qcm2290", "qcom,rpmcc";
217 clock-names = "xo";
218 #clock-cells = <1>;
221 rpmpd: power-controller {
222 compatible = "qcom,qcm2290-rpmpd";
223 #power-domain-cells = <1>;
224 operating-points-v2 = <&rpmpd_opp_table>;
226 rpmpd_opp_table: opp-table {
227 compatible = "operating-points-v2";
230 opp-level = <RPM_SMD_LEVEL_MIN_SVS>;
234 opp-level = <RPM_SMD_LEVEL_LOW_SVS>;
238 opp-level = <RPM_SMD_LEVEL_SVS>;
242 opp-level = <RPM_SMD_LEVEL_SVS_PLUS>;
246 opp-level = <RPM_SMD_LEVEL_NOM>;
250 opp-level = <RPM_SMD_LEVEL_NOM_PLUS>;
254 opp-level = <RPM_SMD_LEVEL_TURBO>;
258 opp-level = <RPM_SMD_LEVEL_TURBO_NO_CPR>;
266 reserved_memory: reserved-memory {
267 #address-cells = <2>;
268 #size-cells = <2>;
273 no-map;
276 xbl_aop_mem: xbl-aop@45e00000 {
278 no-map;
281 sec_apps_mem: sec-apps@45fff000 {
283 no-map;
289 no-map;
292 qcom,rpm-msg-ram = <&rpm_msg_ram>;
297 no-map;
302 no-map;
305 wlan_msa_mem: wlan-msa@51900000 {
307 no-map;
312 no-map;
315 pil_ipa_fw_mem: ipa-fw@53600000 {
317 no-map;
320 pil_ipa_gsi_mem: ipa-gsi@53610000 {
322 no-map;
326 compatible = "shared-dma-pool";
328 no-map;
333 no-map;
336 dfps_data_memory: dpfs-data@5cf00000 {
338 no-map;
343 no-map;
347 compatible = "qcom,rmtfs-mem";
349 no-map;
351 qcom,client-id = <1>;
356 smp2p-adsp {
364 qcom,local-pid = <0>;
365 qcom,remote-pid = <2>;
367 adsp_smp2p_out: master-kernel {
368 qcom,entry-name = "master-kernel";
369 #qcom,smem-state-cells = <1>;
372 adsp_smp2p_in: slave-kernel {
373 qcom,entry-name = "slave-kernel";
374 interrupt-controller;
375 #interrupt-cells = <2>;
379 smp2p-mpss {
387 qcom,local-pid = <0>;
388 qcom,remote-pid = <1>;
390 modem_smp2p_out: master-kernel {
391 qcom,entry-name = "master-kernel";
392 #qcom,smem-state-cells = <1>;
395 modem_smp2p_in: slave-kernel {
396 qcom,entry-name = "slave-kernel";
397 interrupt-controller;
398 #interrupt-cells = <2>;
401 wlan_smp2p_in: wlan-wpss-to-ap {
402 qcom,entry-name = "wlan";
403 interrupt-controller;
404 #interrupt-cells = <2>;
409 compatible = "simple-bus";
410 #address-cells = <2>;
411 #size-cells = <2>;
413 dma-ranges = <0 0 0 0 0x10 0>;
416 compatible = "qcom,tcsr-mutex";
418 #hwlock-cells = <1>;
422 compatible = "qcom,qcm2290-tlmm";
425 gpio-controller;
426 gpio-ranges = <&tlmm 0 0 127>;
427 #gpio-cells = <2>;
428 interrupt-controller;
429 #interrupt-cells = <2>;
431 qup_i2c0_default: qup-i2c0-default-state {
434 drive-strength = <2>;
435 bias-pull-up;
438 qup_i2c1_default: qup-i2c1-default-state {
441 drive-strength = <2>;
442 bias-pull-up;
445 qup_i2c2_default: qup-i2c2-default-state {
448 drive-strength = <2>;
449 bias-pull-up;
452 qup_i2c3_default: qup-i2c3-default-state {
455 drive-strength = <2>;
456 bias-pull-up;
459 qup_i2c4_default: qup-i2c4-default-state {
462 drive-strength = <2>;
463 bias-pull-up;
466 qup_i2c5_default: qup-i2c5-default-state {
469 drive-strength = <2>;
470 bias-pull-up;
473 qup_spi0_default: qup-spi0-default-state {
476 drive-strength = <2>;
477 bias-pull-up;
480 qup_spi1_default: qup-spi1-default-state {
483 drive-strength = <2>;
484 bias-pull-up;
487 qup_spi2_default: qup-spi2-default-state {
490 drive-strength = <2>;
491 bias-pull-up;
494 qup_spi3_default: qup-spi3-default-state {
497 drive-strength = <2>;
498 bias-pull-up;
501 qup_spi4_default: qup-spi4-default-state {
504 drive-strength = <2>;
505 bias-pull-up;
508 qup_spi5_default: qup-spi5-default-state {
511 drive-strength = <2>;
512 bias-pull-up;
515 qup_uart0_default: qup-uart0-default-state {
518 drive-strength = <2>;
519 bias-disable;
522 qup_uart4_default: qup-uart4-default-state {
525 drive-strength = <2>;
526 bias-disable;
529 sdc1_state_on: sdc1-on-state {
530 clk-pins {
532 drive-strength = <16>;
533 bias-disable;
536 cmd-pins {
538 drive-strength = <10>;
539 bias-pull-up;
542 data-pins {
544 drive-strength = <10>;
545 bias-pull-up;
548 rclk-pins {
550 bias-pull-down;
554 sdc1_state_off: sdc1-off-state {
555 clk-pins {
557 drive-strength = <2>;
558 bias-disable;
561 cmd-pins {
563 drive-strength = <2>;
564 bias-pull-up;
567 data-pins {
569 drive-strength = <2>;
570 bias-pull-up;
573 rclk-pins {
575 bias-pull-down;
579 sdc2_state_on: sdc2-on-state {
580 clk-pins {
582 drive-strength = <16>;
583 bias-disable;
586 cmd-pins {
588 drive-strength = <10>;
589 bias-pull-up;
592 data-pins {
594 drive-strength = <10>;
595 bias-pull-up;
599 sdc2_state_off: sdc2-off-state {
600 clk-pins {
602 drive-strength = <2>;
603 bias-disable;
606 cmd-pins {
608 drive-strength = <2>;
609 bias-pull-up;
612 data-pins {
614 drive-strength = <2>;
615 bias-pull-up;
620 gcc: clock-controller@1400000 {
621 compatible = "qcom,gcc-qcm2290";
624 clock-names = "bi_tcxo", "sleep_clk";
625 #clock-cells = <1>;
626 #reset-cells = <1>;
627 #power-domain-cells = <1>;
631 compatible = "qcom,qcm2290-qusb2-phy";
636 clock-names = "cfg_ahb", "ref";
639 nvmem-cells = <&qusb2_hstx_trim>;
640 #phy-cells = <0>;
646 compatible = "qcom,qcm2290-qmp-usb3-phy";
653 clock-names = "cfg_ahb",
660 reset-names = "phy",
663 #clock-cells = <0>;
664 clock-output-names = "usb3_phy_pipe_clk_src";
666 #phy-cells = <0>;
672 compatible = "qcom,qcm2290-qfprom", "qcom,qfprom";
674 #address-cells = <1>;
675 #size-cells = <1>;
677 qusb2_hstx_trim: hstx-trim@25b {
684 compatible = "qcom,spmi-pmic-arb";
690 reg-names = "core",
696 interrupt-names = "periph_irq";
699 #address-cells = <2>;
700 #size-cells = <0>;
701 interrupt-controller;
702 #interrupt-cells = <4>;
705 tsens0: thermal-sensor@4411000 {
706 compatible = "qcom,qcm2290-tsens", "qcom,tsens-v2";
712 interrupt-names = "uplow", "critical";
713 #thermal-sensor-cells = <1>;
717 compatible = "qcom,prng-ee";
720 clock-names = "core";
724 compatible = "qcom,rpm-msg-ram";
729 compatible = "qcom,rpm-stats";
734 compatible = "qcom,qcm2290-sdhci", "qcom,sdhci-msm-v5";
738 reg-names = "hc",
744 interrupt-names = "hc_irq", "pwr_irq";
750 clock-names = "iface",
757 power-domains = <&rpmpd QCM2290_VDDCX>;
760 qcom,dll-config = <0x000f642c>;
761 qcom,ddr-config = <0x80040868>;
762 bus-width = <8>;
768 compatible = "qcom,qcm2290-sdhci", "qcom,sdhci-msm-v5";
770 reg-names = "hc";
774 interrupt-names = "hc_irq", "pwr_irq";
779 clock-names = "iface",
785 power-domains = <&rpmpd QCM2290_VDDCX>;
786 operating-points-v2 = <&sdhc2_opp_table>;
789 qcom,dll-config = <0x0007642c>;
790 qcom,ddr-config = <0x80040868>;
791 bus-width = <4>;
795 sdhc2_opp_table: opp-table {
796 compatible = "operating-points-v2";
798 opp-100000000 {
799 opp-hz = /bits/ 64 <100000000>;
800 required-opps = <&rpmpd_opp_low_svs>;
803 opp-202000000 {
804 opp-hz = /bits/ 64 <202000000>;
805 required-opps = <&rpmpd_opp_svs_plus>;
810 gpi_dma0: dma-controller@4a00000 {
811 compatible = "qcom,qcm2290-gpi-dma", "qcom,sm6350-gpi-dma";
823 dma-channels = <10>;
824 dma-channel-mask = <0x1f>;
826 #dma-cells = <3>;
831 compatible = "qcom,geni-se-qup";
835 clock-names = "m-ahb", "s-ahb";
837 #address-cells = <2>;
838 #size-cells = <2>;
843 compatible = "qcom,geni-i2c";
847 clock-names = "se";
848 pinctrl-0 = <&qup_i2c0_default>;
849 pinctrl-names = "default";
852 dma-names = "tx", "rx";
853 #address-cells = <1>;
854 #size-cells = <0>;
859 compatible = "qcom,geni-spi";
863 clock-names = "se";
864 pinctrl-0 = <&qup_spi0_default>;
865 pinctrl-names = "default";
868 dma-names = "tx", "rx";
869 #address-cells = <1>;
870 #size-cells = <0>;
875 compatible = "qcom,geni-uart";
879 clock-names = "se";
880 pinctrl-0 = <&qup_uart0_default>;
881 pinctrl-names = "default";
886 compatible = "qcom,geni-i2c";
890 clock-names = "se";
891 pinctrl-0 = <&qup_i2c1_default>;
892 pinctrl-names = "default";
895 dma-names = "tx", "rx";
896 #address-cells = <1>;
897 #size-cells = <0>;
902 compatible = "qcom,geni-spi";
906 clock-names = "se";
907 pinctrl-0 = <&qup_spi1_default>;
908 pinctrl-names = "default";
911 dma-names = "tx", "rx";
912 #address-cells = <1>;
913 #size-cells = <0>;
918 compatible = "qcom,geni-i2c";
922 clock-names = "se";
923 pinctrl-0 = <&qup_i2c2_default>;
924 pinctrl-names = "default";
927 dma-names = "tx", "rx";
928 #address-cells = <1>;
929 #size-cells = <0>;
934 compatible = "qcom,geni-spi";
938 clock-names = "se";
939 pinctrl-0 = <&qup_spi2_default>;
940 pinctrl-names = "default";
943 dma-names = "tx", "rx";
944 #address-cells = <1>;
945 #size-cells = <0>;
950 compatible = "qcom,geni-i2c";
954 clock-names = "se";
955 pinctrl-0 = <&qup_i2c3_default>;
956 pinctrl-names = "default";
959 dma-names = "tx", "rx";
960 #address-cells = <1>;
961 #size-cells = <0>;
966 compatible = "qcom,geni-spi";
970 clock-names = "se";
971 pinctrl-0 = <&qup_spi3_default>;
972 pinctrl-names = "default";
975 dma-names = "tx", "rx";
976 #address-cells = <1>;
977 #size-cells = <0>;
982 compatible = "qcom,geni-i2c";
986 clock-names = "se";
987 pinctrl-0 = <&qup_i2c4_default>;
988 pinctrl-names = "default";
991 dma-names = "tx", "rx";
992 #address-cells = <1>;
993 #size-cells = <0>;
998 compatible = "qcom,geni-spi";
1001 clock-names = "se";
1003 pinctrl-names = "default";
1004 pinctrl-0 = <&qup_spi4_default>;
1007 dma-names = "tx", "rx";
1008 #address-cells = <1>;
1009 #size-cells = <0>;
1014 compatible = "qcom,geni-uart";
1018 clock-names = "se";
1019 pinctrl-0 = <&qup_uart4_default>;
1020 pinctrl-names = "default";
1025 compatible = "qcom,geni-i2c";
1029 clock-names = "se";
1030 pinctrl-0 = <&qup_i2c5_default>;
1031 pinctrl-names = "default";
1034 dma-names = "tx", "rx";
1035 #address-cells = <1>;
1036 #size-cells = <0>;
1041 compatible = "qcom,geni-spi";
1045 clock-names = "se";
1046 pinctrl-0 = <&qup_spi5_default>;
1047 pinctrl-names = "default";
1050 dma-names = "tx", "rx";
1051 #address-cells = <1>;
1052 #size-cells = <0>;
1058 compatible = "qcom,qcm2290-dwc3", "qcom,dwc3";
1062 interrupt-names = "hs_phy_irq", "ss_phy_irq";
1070 clock-names = "cfg_noc",
1077 assigned-clocks = <&gcc GCC_USB30_PRIM_MOCK_UTMI_CLK>,
1079 assigned-clock-rates = <19200000>, <133333333>;
1082 power-domains = <&gcc GCC_USB30_PRIM_GDSC>;
1083 wakeup-source;
1085 #address-cells = <2>;
1086 #size-cells = <2>;
1096 phy-names = "usb2-phy", "usb3-phy";
1100 snps,has-lpm-erratum;
1101 snps,hird-threshold = /bits/ 8 <0x10>;
1103 maximum-speed = "super-speed";
1109 compatible = "qcom,qcm2290-mpss-pas", "qcom,sm6115-mpss-pas";
1112 interrupts-extended = <&intc GIC_SPI 307 IRQ_TYPE_EDGE_RISING>,
1118 interrupt-names = "wdog",
1122 "stop-ack",
1123 "shutdown-ack";
1126 clock-names = "xo";
1128 power-domains = <&rpmpd QCM2290_VDDCX>;
1130 memory-region = <&pil_modem_mem>;
1132 qcom,smem-states = <&modem_smp2p_out 0>;
1133 qcom,smem-state-names = "stop";
1137 glink-edge {
1140 qcom,remote-pid = <1>;
1146 compatible = "qcom,qcm2290-adsp-pas", "qcom,sm6115-adsp-pas";
1149 interrupts-extended = <&intc GIC_SPI 282 IRQ_TYPE_EDGE_RISING>,
1154 interrupt-names = "wdog",
1158 "stop-ack";
1161 clock-names = "xo";
1163 power-domains = <&rpmpd QCM2290_VDD_LPI_CX>,
1166 memory-region = <&pil_adsp_mem>;
1168 qcom,smem-states = <&adsp_smp2p_out 0>;
1169 qcom,smem-state-names = "stop";
1173 glink-edge {
1176 qcom,remote-pid = <2>;
1182 compatible = "qcom,qcm2290-smmu-500", "qcom,smmu-500", "arm,mmu-500";
1184 #iommu-cells = <2>;
1185 #global-interrupts = <1>;
1255 compatible = "qcom,wcn3990-wifi";
1257 reg-names = "membase";
1258 memory-region = <&wlan_msa_mem>;
1272 qcom,msa-fixed-perm;
1277 compatible = "qcom,apss-wdt-qcm2290", "qcom,kpss-wdt";
1285 compatible = "qcom,qcm2290-apcs-hmss-global";
1287 #mbox-cells = <1>;
1291 compatible = "arm,armv7-timer-mem";
1293 #address-cells = <1>;
1294 #size-cells = <1>;
1302 frame-number = <0>;
1308 frame-number = <1>;
1315 frame-number = <2>;
1322 frame-number = <3>;
1329 frame-number = <4>;
1336 frame-number = <5>;
1343 frame-number = <6>;
1348 intc: interrupt-controller@f200000 {
1349 compatible = "arm,gic-v3";
1353 #interrupt-cells = <3>;
1354 interrupt-controller;
1355 interrupt-parent = <&intc>;
1356 #redistributor-regions = <1>;
1357 redistributor-stride = <0x0 0x20000>;
1361 compatible = "qcom,qcm2290-cpufreq-hw", "qcom,cpufreq-hw";
1363 reg-names = "freq-domain0";
1365 interrupt-names = "dcvsh-irq-0";
1367 clock-names = "xo", "alternate";
1369 #freq-domain-cells = <1>;
1370 #clock-cells = <1>;
1374 thermal-zones {
1375 mapss-thermal {
1376 polling-delay-passive = <0>;
1377 polling-delay = <0>;
1379 thermal-sensors = <&tsens0 0>;
1382 mapss_alert0: trip-point0 {
1388 mapss_alert1: trip-point1 {
1394 mapss_crit: mapss-crit {
1402 video-thermal {
1403 polling-delay-passive = <0>;
1404 polling-delay = <0>;
1406 thermal-sensors = <&tsens0 1>;
1409 video_alert0: trip-point0 {
1415 video_alert1: trip-point1 {
1421 video_crit: video-crit {
1429 wlan-thermal {
1430 polling-delay-passive = <0>;
1431 polling-delay = <0>;
1433 thermal-sensors = <&tsens0 2>;
1436 wlan_alert0: trip-point0 {
1442 wlan_alert1: trip-point1 {
1448 wlan_crit: wlan-crit {
1456 cpuss0-thermal {
1457 polling-delay-passive = <0>;
1458 polling-delay = <0>;
1460 thermal-sensors = <&tsens0 3>;
1463 cpuss0_alert0: trip-point0 {
1469 cpuss0_alert1: trip-point1 {
1475 cpuss0_crit: cpuss0-crit {
1483 cpuss1-thermal {
1484 polling-delay-passive = <0>;
1485 polling-delay = <0>;
1487 thermal-sensors = <&tsens0 4>;
1490 cpuss1_alert0: trip-point0 {
1496 cpuss1_alert1: trip-point1 {
1502 cpuss1_crit: cpuss1-crit {
1510 mdm0-thermal {
1511 polling-delay-passive = <0>;
1512 polling-delay = <0>;
1514 thermal-sensors = <&tsens0 5>;
1517 mdm0_alert0: trip-point0 {
1523 mdm0_alert1: trip-point1 {
1529 mdm0_crit: mdm0-crit {
1537 mdm1-thermal {
1538 polling-delay-passive = <0>;
1539 polling-delay = <0>;
1541 thermal-sensors = <&tsens0 6>;
1544 mdm1_alert0: trip-point0 {
1550 mdm1_alert1: trip-point1 {
1556 mdm1_crit: mdm1-crit {
1564 gpu-thermal {
1565 polling-delay-passive = <0>;
1566 polling-delay = <0>;
1568 thermal-sensors = <&tsens0 7>;
1571 gpu_alert0: trip-point0 {
1577 gpu_alert1: trip-point1 {
1583 gpu_crit: gpu-crit {
1591 hm-center-thermal {
1592 polling-delay-passive = <0>;
1593 polling-delay = <0>;
1595 thermal-sensors = <&tsens0 8>;
1598 hm_center_alert0: trip-point0 {
1604 hm_center_alert1: trip-point1 {
1610 hm_center_crit: hm-center-crit {
1618 camera-thermal {
1619 polling-delay-passive = <0>;
1620 polling-delay = <0>;
1622 thermal-sensors = <&tsens0 9>;
1625 camera_alert0: trip-point0 {
1631 camera_alert1: trip-point1 {
1637 camera_crit: camera-crit {
1647 compatible = "arm,armv8-timer";