Lines Matching +full:0 +full:x15230000
51 #size-cells = <0>;
53 cpu0: cpu@0 {
56 reg = <0x000>;
58 performance-domains = <&performance 0>;
75 reg = <0x100>;
77 performance-domains = <&performance 0>;
94 reg = <0x200>;
96 performance-domains = <&performance 0>;
113 reg = <0x300>;
115 performance-domains = <&performance 0>;
132 reg = <0x400>;
151 reg = <0x500>;
170 reg = <0x600>;
189 reg = <0x700>;
246 arm,psci-suspend-param = <0x00010001>;
255 arm,psci-suspend-param = <0x00010001>;
264 arm,psci-suspend-param = <0x01010002>;
273 arm,psci-suspend-param = <0x01010002>;
313 interrupts = <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH 0>;
332 #clock-cells = <0>;
341 #clock-cells = <0>;
348 #clock-cells = <0>;
355 reg = <0 0x0011bc10 0 0x120>, <0 0x0011bd30 0 0x120>;
449 interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_HIGH 0>,
450 <GIC_PPI 14 IRQ_TYPE_LEVEL_HIGH 0>,
451 <GIC_PPI 11 IRQ_TYPE_LEVEL_HIGH 0>,
452 <GIC_PPI 10 IRQ_TYPE_LEVEL_HIGH 0>;
460 dma-ranges = <0x0 0x0 0x0 0x0 0x4 0x0>;
468 reg = <0 0x0c000000 0 0x40000>,
469 <0 0x0c040000 0 0x200000>;
470 interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH 0>;
473 ppi_cluster0: interrupt-partition-0 {
485 reg = <0 0x10000000 0 0x1000>;
491 reg = <0 0x10001000 0 0x1000>;
498 reg = <0 0x10003000 0 0x1000>;
504 reg = <0 0x10005000 0 0x1000>,
505 <0 0x11d10000 0 0x1000>,
506 <0 0x11d30000 0 0x1000>,
507 <0 0x11d40000 0 0x1000>,
508 <0 0x11e20000 0 0x1000>,
509 <0 0x11eb0000 0 0x1000>,
510 <0 0x11f40000 0 0x1000>,
511 <0 0x1000b000 0 0x1000>;
517 gpio-ranges = <&pio 0 0 144>;
519 interrupts = <GIC_SPI 235 IRQ_TYPE_LEVEL_HIGH 0>;
525 reg = <0 0x10006000 0 0x1000>;
531 #size-cells = <0>;
538 #size-cells = <0>;
548 #size-cells = <0>;
553 #power-domain-cells = <0>;
558 #power-domain-cells = <0>;
563 #power-domain-cells = <0>;
568 #power-domain-cells = <0>;
573 #power-domain-cells = <0>;
609 "vppsys0-0", "vppsys0-1", "vppsys0-2", "vppsys0-3",
617 #size-cells = <0>;
623 clock-names = "vdec1-0";
625 #power-domain-cells = <0>;
631 #power-domain-cells = <0>;
643 clock-names = "vdosys0", "vdosys0-0", "vdosys0-1",
648 #size-cells = <0>;
656 clock-names = "vppsys1", "vppsys1-0",
659 #power-domain-cells = <0>;
668 clock-names = "wepsys-0", "wepsys-1", "wepsys-2",
671 #power-domain-cells = <0>;
677 clock-names = "vdec0-0";
679 #power-domain-cells = <0>;
685 clock-names = "vdec2-0";
687 #power-domain-cells = <0>;
693 #power-domain-cells = <0>;
702 clock-names = "vdosys1", "vdosys1-0",
706 #size-cells = <0>;
712 #power-domain-cells = <0>;
718 #power-domain-cells = <0>;
725 #power-domain-cells = <0>;
733 clock-names = "img-0", "img-1";
736 #size-cells = <0>;
741 #power-domain-cells = <0>;
749 clock-names = "ipe", "ipe-0", "ipe-1";
751 #power-domain-cells = <0>;
762 clock-names = "cam-0", "cam-1", "cam-2", "cam-3",
766 #size-cells = <0>;
771 #power-domain-cells = <0>;
776 #power-domain-cells = <0>;
781 #power-domain-cells = <0>;
790 #power-domain-cells = <0>;
796 #power-domain-cells = <0>;
801 #power-domain-cells = <0>;
806 #power-domain-cells = <0>;
814 #power-domain-cells = <0>;
821 #power-domain-cells = <0>;
830 #size-cells = <0>;
843 #power-domain-cells = <0>;
852 reg = <0 0x10007000 0 0x100>;
858 reg = <0 0x1000c000 0 0x1000>;
865 reg = <0 0x10017000 0 0x1000>;
866 interrupts = <GIC_SPI 265 IRQ_TYPE_LEVEL_HIGH 0>;
872 reg = <0 0x10024000 0 0x1000>;
874 interrupts = <GIC_SPI 243 IRQ_TYPE_LEVEL_HIGH 0>;
884 reg = <0 0x10027000 0 0x000e00>,
885 <0 0x10029000 0 0x000100>;
899 reg = <0 0x10315000 0 0x5000>;
900 interrupts = <GIC_SPI 795 IRQ_TYPE_LEVEL_HIGH 0>,
901 <GIC_SPI 796 IRQ_TYPE_LEVEL_HIGH 0>,
902 <GIC_SPI 797 IRQ_TYPE_LEVEL_HIGH 0>,
903 <GIC_SPI 798 IRQ_TYPE_LEVEL_HIGH 0>,
904 <GIC_SPI 799 IRQ_TYPE_LEVEL_HIGH 0>;
910 reg = <0 0x10320000 0 0x4000>;
911 interrupts = <GIC_SPI 226 IRQ_TYPE_LEVEL_HIGH 0>;
918 reg = <0 0x10330000 0 0x4000>;
919 interrupts = <GIC_SPI 228 IRQ_TYPE_LEVEL_HIGH 0>;
926 reg = <0 0x10500000 0 0x100000>,
927 <0 0x10720000 0 0xe0000>,
928 <0 0x10700000 0 0x8000>;
930 interrupts = <GIC_SPI 462 IRQ_TYPE_LEVEL_HIGH 0>;
936 reg = <0 0x10720000 0 0x1000>;
942 reg = <0 0x10803000 0 0x1000>,
943 <0 0x10840000 0 0x40000>;
965 #mbox-cells = <0>;
966 reg = <0 0x10816000 0 0x1000>;
967 interrupts = <GIC_SPI 702 IRQ_TYPE_LEVEL_HIGH 0>;
972 #mbox-cells = <0>;
973 reg = <0 0x10817000 0 0x1000>;
974 interrupts = <GIC_SPI 703 IRQ_TYPE_LEVEL_HIGH 0>;
979 reg = <0 0x10890000 0 0x10000>;
982 interrupts = <GIC_SPI 822 IRQ_TYPE_LEVEL_HIGH 0>;
1029 reg = <0 0x11001100 0 0x100>;
1030 interrupts = <GIC_SPI 141 IRQ_TYPE_LEVEL_HIGH 0>;
1039 reg = <0 0x11001200 0 0x100>;
1040 interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH 0>;
1049 reg = <0 0x11001300 0 0x100>;
1050 interrupts = <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH 0>;
1059 reg = <0 0x11001400 0 0x100>;
1060 interrupts = <GIC_SPI 723 IRQ_TYPE_LEVEL_HIGH 0>;
1069 reg = <0 0x11001500 0 0x100>;
1070 interrupts = <GIC_SPI 724 IRQ_TYPE_LEVEL_HIGH 0>;
1079 reg = <0 0x11001600 0 0x100>;
1080 interrupts = <GIC_SPI 725 IRQ_TYPE_LEVEL_HIGH 0>;
1089 reg = <0 0x11002000 0 0x1000>;
1098 reg = <0 0x11003000 0 0x1000>;
1106 #size-cells = <0>;
1107 reg = <0 0x1100a000 0 0x1000>;
1108 interrupts = <GIC_SPI 191 IRQ_TYPE_LEVEL_HIGH 0>;
1118 reg = <0 0x1100b000 0 0x1000>;
1119 interrupts = <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH 0>;
1129 reg = <0 0x1100e000 0 0x1000>;
1130 interrupts = <GIC_SPI 203 IRQ_TYPE_LEVEL_LOW 0>;
1141 reg = <0 0x1100f000 0 0x1000>;
1142 interrupts = <GIC_SPI 793 IRQ_TYPE_LEVEL_HIGH 0>;
1154 #size-cells = <0>;
1155 reg = <0 0x11010000 0 0x1000>;
1156 interrupts = <GIC_SPI 192 IRQ_TYPE_LEVEL_HIGH 0>;
1168 #size-cells = <0>;
1169 reg = <0 0x11012000 0 0x1000>;
1170 interrupts = <GIC_SPI 193 IRQ_TYPE_LEVEL_HIGH 0>;
1182 #size-cells = <0>;
1183 reg = <0 0x11013000 0 0x1000>;
1184 interrupts = <GIC_SPI 194 IRQ_TYPE_LEVEL_HIGH 0>;
1196 #size-cells = <0>;
1197 reg = <0 0x11018000 0 0x1000>;
1198 interrupts = <GIC_SPI 195 IRQ_TYPE_LEVEL_HIGH 0>;
1210 #size-cells = <0>;
1211 reg = <0 0x11019000 0 0x1000>;
1212 interrupts = <GIC_SPI 196 IRQ_TYPE_LEVEL_HIGH 0>;
1222 reg = <0 0x1101d000 0 0x1000>;
1223 interrupts = <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH 0>;
1233 reg = <0 0x1101e000 0 0x1000>;
1234 interrupts = <GIC_SPI 198 IRQ_TYPE_LEVEL_HIGH 0>;
1244 reg = <0 0x11021000 0 0x4000>;
1245 interrupts = <GIC_SPI 716 IRQ_TYPE_LEVEL_HIGH 0>;
1272 snps,clk-csr = <0>;
1278 #size-cells = <0>;
1282 snps,wr_osr_lmt = <0x7>;
1283 snps,rd_osr_lmt = <0x7>;
1284 snps,blen = <0 0 0 0 16 8 4>;
1292 snps,map-to-dma-channel = <0x0>;
1296 snps,map-to-dma-channel = <0x0>;
1300 snps,map-to-dma-channel = <0x0>;
1304 snps,map-to-dma-channel = <0x0>;
1312 snps,weight = <0x10>;
1314 snps,priority = <0x0>;
1317 snps,weight = <0x11>;
1319 snps,priority = <0x1>;
1322 snps,weight = <0x12>;
1324 snps,priority = <0x2>;
1327 snps,weight = <0x13>;
1329 snps,priority = <0x3>;
1337 reg = <0 0x11200000 0 0x1000>,
1338 <0 0x11203e00 0 0x0100>;
1340 interrupts = <GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH 0>;
1354 mediatek,syscon-wakeup = <&pericfg 0x400 103>;
1362 reg = <0 0x11230000 0 0x10000>,
1363 <0 0x11f50000 0 0x1000>;
1364 interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH 0>;
1375 reg = <0 0x11240000 0 0x1000>,
1376 <0 0x11c70000 0 0x1000>;
1377 interrupts = <GIC_SPI 135 IRQ_TYPE_LEVEL_HIGH 0>;
1390 reg = <0 0x11250000 0 0x1000>,
1391 <0 0x11e60000 0 0x1000>;
1392 interrupts = <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH 0>;
1404 reg = <0 0x11278000 0 0x1000>;
1405 interrupts = <GIC_SPI 170 IRQ_TYPE_LEVEL_HIGH 0>;
1416 reg = <0 0x11290000 0 0x1000>,
1417 <0 0x11293e00 0 0x0100>;
1419 interrupts = <GIC_SPI 530 IRQ_TYPE_LEVEL_HIGH 0>;
1432 mediatek,syscon-wakeup = <&pericfg 0x400 104>;
1440 reg = <0 0x112a0000 0 0x1000>,
1441 <0 0x112a3e00 0 0x0100>;
1443 interrupts = <GIC_SPI 533 IRQ_TYPE_LEVEL_HIGH 0>;
1456 mediatek,syscon-wakeup = <&pericfg 0x400 105>;
1464 reg = <0 0x112b0000 0 0x1000>,
1465 <0 0x112b3e00 0 0x0100>;
1467 interrupts = <GIC_SPI 536 IRQ_TYPE_LEVEL_HIGH 0>;
1480 mediatek,syscon-wakeup = <&pericfg 0x400 106>;
1491 reg = <0 0x112f0000 0 0x4000>;
1493 interrupts = <GIC_SPI 791 IRQ_TYPE_LEVEL_HIGH 0>;
1494 bus-range = <0x00 0xff>;
1495 ranges = <0x81000000 0 0x20000000
1496 0x0 0x20000000 0 0x200000>,
1497 <0x82000000 0 0x20200000
1498 0x0 0x20200000 0 0x3e00000>;
1500 iommu-map = <0 &iommu_infra IOMMU_PORT_INFRA_PCIE0 0x2>;
1501 iommu-map-mask = <0x0>;
1523 interrupt-map-mask = <0 0 0 7>;
1524 interrupt-map = <0 0 0 1 &pcie_intc0 0>,
1525 <0 0 0 2 &pcie_intc0 1>,
1526 <0 0 0 3 &pcie_intc0 2>,
1527 <0 0 0 4 &pcie_intc0 3>;
1532 #address-cells = <0>;
1543 reg = <0 0x112f8000 0 0x4000>;
1545 interrupts = <GIC_SPI 792 IRQ_TYPE_LEVEL_HIGH 0>;
1546 bus-range = <0x00 0xff>;
1547 ranges = <0x81000000 0 0x24000000
1548 0x0 0x24000000 0 0x200000>,
1549 <0x82000000 0 0x24200000
1550 0x0 0x24200000 0 0x3e00000>;
1552 iommu-map = <0 &iommu_infra IOMMU_PORT_INFRA_PCIE1 0x2>;
1553 iommu-map-mask = <0x0>;
1575 interrupt-map-mask = <0 0 0 7>;
1576 interrupt-map = <0 0 0 1 &pcie_intc1 0>,
1577 <0 0 0 2 &pcie_intc1 1>,
1578 <0 0 0 3 &pcie_intc1 2>,
1579 <0 0 0 4 &pcie_intc1 3>;
1584 #address-cells = <0>;
1592 reg = <0 0x1132c000 0 0x1000>;
1593 interrupts = <GIC_SPI 825 IRQ_TYPE_LEVEL_HIGH 0>;
1599 #size-cells = <0>;
1605 reg = <0 0x11c10000 0 0x1000>;
1609 reg = <0x184 0x1>;
1610 bits = <0 5>;
1613 reg = <0x184 0x2>;
1617 reg = <0x185 0x1>;
1621 reg = <0x186 0x1>;
1622 bits = <0 5>;
1625 reg = <0x186 0x2>;
1629 reg = <0x187 0x1>;
1633 reg = <0x188 0x1>;
1634 bits = <0 5>;
1637 reg = <0x188 0x2>;
1641 reg = <0x189 0x1>;
1645 reg = <0x189 0x2>;
1649 reg = <0x190 0x1>;
1650 bits = <0 4>;
1653 reg = <0x190 0x1>;
1657 reg = <0x191 0x1>;
1658 bits = <0 4>;
1661 reg = <0x191 0x1>;
1665 reg = <0x192 0x1>;
1666 bits = <0 4>;
1669 reg = <0x192 0x1>;
1673 reg = <0x193 0x1>;
1674 bits = <0 4>;
1677 reg = <0x1ac 0x10>;
1680 reg = <0x1bc 0x14>;
1683 reg = <0x1d0 0x38>;
1691 ranges = <0 0 0x11c40000 0x700>;
1694 u2port2: usb-phy@0 {
1695 reg = <0x0 0x700>;
1706 ranges = <0 0 0x11c50000 0x700>;
1709 u2port3: usb-phy@0 {
1710 reg = <0x0 0x700>;
1720 reg = <0 0x11d00000 0 0x1000>,
1721 <0 0x10220580 0 0x80>;
1722 interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH 0>;
1728 #size-cells = <0>;
1735 reg = <0 0x11d01000 0 0x1000>,
1736 <0 0x10220600 0 0x80>;
1737 interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH 0>;
1743 #size-cells = <0>;
1750 reg = <0 0x11d02000 0 0x1000>,
1751 <0 0x10220680 0 0x80>;
1752 interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH 0>;
1758 #size-cells = <0>;
1764 reg = <0 0x11d03000 0 0x1000>;
1771 reg = <0 0x11e00000 0 0x1000>,
1772 <0 0x10220080 0 0x80>;
1773 interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH 0>;
1779 #size-cells = <0>;
1786 reg = <0 0x11e01000 0 0x1000>,
1787 <0 0x10220200 0 0x80>;
1788 interrupts = <GIC_SPI 147 IRQ_TYPE_LEVEL_HIGH 0>;
1794 #size-cells = <0>;
1801 reg = <0 0x11e02000 0 0x1000>,
1802 <0 0x10220380 0 0x80>;
1803 interrupts = <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH 0>;
1809 #size-cells = <0>;
1816 reg = <0 0x11e03000 0 0x1000>,
1817 <0 0x10220480 0 0x80>;
1818 interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH 0>;
1824 #size-cells = <0>;
1831 reg = <0 0x11e04000 0 0x1000>,
1832 <0 0x10220500 0 0x80>;
1833 interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH 0>;
1839 #size-cells = <0>;
1845 reg = <0 0x11e05000 0 0x1000>;
1853 ranges = <0 0 0x11e30000 0xe00>;
1857 u2port1: usb-phy@0 {
1858 reg = <0x0 0x700>;
1866 reg = <0x700 0x700>;
1882 ranges = <0 0 0x11e40000 0xe00>;
1885 u2port0: usb-phy@0 {
1886 reg = <0x0 0x700>;
1894 reg = <0x700 0x700>;
1908 reg = <0 0x11e80000 0 0x10000>;
1919 #phy-cells = <0>;
1925 reg = <0 0x11fa0000 0 0xc000>;
1928 #phy-cells = <0>;
1935 reg = <0 0x13000000 0 0x4000>;
1938 interrupts = <GIC_SPI 397 IRQ_TYPE_LEVEL_HIGH 0>,
1939 <GIC_SPI 396 IRQ_TYPE_LEVEL_HIGH 0>,
1940 <GIC_SPI 395 IRQ_TYPE_LEVEL_HIGH 0>;
1954 reg = <0 0x13fbf000 0 0x1000>;
1960 reg = <0 0x14000000 0 0x1000>;
1966 reg = <0 0x1400f000 0 0x1000>;
1967 interrupts = <GIC_SPI 592 IRQ_TYPE_LEVEL_HIGH 0>;
1968 mediatek,gce-client-reg = <&gce1 SUBSYS_1400XXXX 0xf000 0x1000>;
1975 reg = <0 0x14010000 0 0x1000>;
1986 reg = <0 0x14011000 0 0x1000>;
1997 reg = <0 0x14012000 0 0x1000>;
2008 reg = <0 0x14013000 0 0x1000>;
2019 reg = <0 0x14018000 0 0x1000>;
2024 interrupts = <GIC_SPI 594 IRQ_TYPE_LEVEL_HIGH 0>;
2033 reg = <0 0x14e00000 0 0x1000>;
2039 reg = <0 0x14e02000 0 0x1000>;
2045 reg = <0 0x14e03000 0 0x1000>;
2051 reg = <0 0x14e04000 0 0x1000>;
2062 reg = <0 0x14e05000 0 0x1000>;
2074 reg = <0 0x14f00000 0 0x1000>;
2080 reg = <0 0x14f01000 0 0x1000>;
2081 interrupts = <GIC_SPI 635 IRQ_TYPE_LEVEL_HIGH 0>;
2082 mediatek,gce-client-reg = <&gce1 SUBSYS_14f0XXXX 0x1000 0x1000>;
2089 reg = <0 0x14f02000 0 0x1000>;
2101 reg = <0 0x14f03000 0 0x1000>;
2113 reg = <0 0x15000000 0 0x1000>;
2119 reg = <0 0x15001000 0 0x1000>;
2131 reg = <0 0x15002000 0 0x1000>;
2142 reg = <0 0x15003000 0 0x1000>;
2153 reg = <0 0x15110000 0 0x1000>;
2159 reg = <0 0x15120000 0 0x1000>;
2170 reg = <0 0x15130000 0 0x1000>;
2176 reg = <0 0x15220000 0 0x1000>;
2182 reg = <0 0x15230000 0 0x1000>;
2193 reg = <0 0x15330000 0 0x1000>;
2199 reg = <0 0x15340000 0 0x1000>;
2210 reg = <0 0x16000000 0 0x1000>;
2216 reg = <0 0x16001000 0 0x1000>;
2228 reg = <0 0x16002000 0 0x1000>;
2239 reg = <0 0x16004000 0 0x1000>;
2250 reg = <0 0x16005000 0 0x1000>;
2261 reg = <0 0x16012000 0 0x1000>;
2272 reg = <0 0x16013000 0 0x1000>;
2283 reg = <0 0x16014000 0 0x1000>;
2294 reg = <0 0x16015000 0 0x1000>;
2305 reg = <0 0x1604f000 0 0x1000>;
2311 reg = <0 0x1606f000 0 0x1000>;
2317 reg = <0 0x1608f000 0 0x1000>;
2323 reg = <0 0x160af000 0 0x1000>;
2329 reg = <0 0x16140000 0 0x1000>;
2335 reg = <0 0x16141000 0 0x1000>;
2347 reg = <0 0x16142000 0 0x1000>;
2359 reg = <0 0x17200000 0 0x1000>;
2365 reg = <0 0x17201000 0 0x1000>;
2380 reg = <0 0x18000000 0 0x1000>,
2381 <0 0x18004000 0 0x1000>;
2382 ranges = <0 0 0 0x18000000 0 0x26000>;
2386 reg = <0 0x2000 0 0x800>;
2401 reg = <0 0x10000 0 0x800>;
2402 interrupts = <GIC_SPI 708 IRQ_TYPE_LEVEL_HIGH 0>;
2421 reg = <0 0x25000 0 0x1000>; /* VDEC_CORE_MISC */
2422 interrupts = <GIC_SPI 707 IRQ_TYPE_LEVEL_HIGH 0>;
2446 reg = <0 0x1800d000 0 0x1000>;
2457 reg = <0 0x1800e000 0 0x1000>;
2468 reg = <0 0x1800f000 0 0x1000>;
2474 reg = <0 0x1802e000 0 0x1000>;
2485 reg = <0 0x1802f000 0 0x1000>;
2491 reg = <0 0x1803e000 0 0x1000>;
2502 reg = <0 0x1803f000 0 0x1000>;
2508 reg = <0 0x190f3000 0 0x1000>;
2514 reg = <0 0x1a000000 0 0x1000>;
2520 reg = <0 0x1a010000 0 0x1000>;
2531 reg = <0 0x1a020000 0 0x10000>;
2541 interrupts = <GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH 0>;
2567 reg = <0 0x1a040000 0 0x10000>;/* JPGDEC_C0 */
2574 interrupts = <GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH 0>;
2582 reg = <0 0x1a050000 0 0x10000>;/* JPGDEC_C1 */
2589 interrupts = <GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH 0>;
2597 reg = <0 0x1b040000 0 0x10000>;/* JPGDEC_C2 */
2604 interrupts = <GIC_SPI 348 IRQ_TYPE_LEVEL_HIGH 0>;
2613 reg = <0 0x1b000000 0 0x1000>;
2619 reg = <0 0x1c01a000 0 0x1000>;
2620 mboxes = <&gce0 0 CMDQ_THR_PRIO_4>;
2638 reg = <0 0x1a030000 0 0x10000>;
2643 interrupts = <GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH 0>;
2651 reg = <0 0x1b030000 0 0x10000>;
2656 interrupts = <GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH 0>;
2665 reg = <0 0x1b010000 0 0x1000>;
2677 reg = <0 0x1c000000 0 0x1000>;
2678 interrupts = <GIC_SPI 636 IRQ_TYPE_LEVEL_HIGH 0>;
2682 mediatek,gce-client-reg = <&gce0 SUBSYS_1c00XXXX 0x0000 0x1000>;
2687 reg = <0 0x1c002000 0 0x1000>;
2688 interrupts = <GIC_SPI 638 IRQ_TYPE_LEVEL_HIGH 0>;
2692 mediatek,gce-client-reg = <&gce0 SUBSYS_1c00XXXX 0x2000 0x1000>;
2697 reg = <0 0x1c003000 0 0x1000>;
2698 interrupts = <GIC_SPI 639 IRQ_TYPE_LEVEL_HIGH 0>;
2701 mediatek,gce-client-reg = <&gce0 SUBSYS_1c00XXXX 0x3000 0x1000>;
2706 reg = <0 0x1c004000 0 0x1000>;
2707 interrupts = <GIC_SPI 640 IRQ_TYPE_LEVEL_HIGH 0>;
2710 mediatek,gce-client-reg = <&gce0 SUBSYS_1c00XXXX 0x4000 0x1000>;
2715 reg = <0 0x1c005000 0 0x1000>;
2716 interrupts = <GIC_SPI 641 IRQ_TYPE_LEVEL_HIGH 0>;
2719 mediatek,gce-client-reg = <&gce0 SUBSYS_1c00XXXX 0x5000 0x1000>;
2724 reg = <0 0x1c006000 0 0x1000>;
2725 interrupts = <GIC_SPI 642 IRQ_TYPE_LEVEL_HIGH 0>;
2728 mediatek,gce-client-reg = <&gce0 SUBSYS_1c00XXXX 0x6000 0x1000>;
2733 reg = <0 0x1c007000 0 0x1000>;
2734 interrupts = <GIC_SPI 643 IRQ_TYPE_LEVEL_HIGH 0>;
2737 mediatek,gce-client-reg = <&gce0 SUBSYS_1c00XXXX 0x7000 0x1000>;
2742 reg = <0 0x1c009000 0 0x1000>;
2743 interrupts = <GIC_SPI 645 IRQ_TYPE_LEVEL_HIGH 0>;
2746 mediatek,gce-client-reg = <&gce0 SUBSYS_1c00XXXX 0x9000 0x1000>;
2751 reg = <0 0x1c014000 0 0x1000>;
2752 interrupts = <GIC_SPI 656 IRQ_TYPE_LEVEL_HIGH 0>;
2755 mediatek,gce-client-reg = <&gce0 SUBSYS_1c01XXXX 0x4000 0x1000>;
2760 reg = <0 0x1c015000 0 0x1000>;
2761 interrupts = <GIC_SPI 657 IRQ_TYPE_LEVEL_HIGH 0>;
2771 reg = <0 0x1c016000 0 0x1000>;
2772 interrupts = <GIC_SPI 658 IRQ_TYPE_LEVEL_HIGH 0>;
2780 reg = <0 0x1c018000 0 0x1000>;
2781 mediatek,larb-id = <0>;
2792 reg = <0 0x1c019000 0 0x1000>;
2804 reg = <0 0x1c100000 0 0x1000>;
2806 mediatek,gce-client-reg = <&gce0 SUBSYS_1c10XXXX 0x0000 0x1000>;
2813 reg = <0 0x1c01b000 0 0x1000>;
2825 reg = <0 0x1c01f000 0 0x1000>;
2830 interrupts = <GIC_SPI 669 IRQ_TYPE_LEVEL_HIGH 0>;
2839 reg = <0 0x1c101000 0 0x1000>;
2841 interrupts = <GIC_SPI 494 IRQ_TYPE_LEVEL_HIGH 0>;
2850 reg = <0 0x1c102000 0 0x1000>;
2862 reg = <0 0x1c103000 0 0x1000>;
2874 reg = <0 0x1c104000 0 0x1000>;
2875 interrupts = <GIC_SPI 495 IRQ_TYPE_LEVEL_HIGH 0>;
2879 mediatek,gce-client-reg = <&gce0 SUBSYS_1c10XXXX 0x4000 0x1000>;
2884 reg = <0 0x1c105000 0 0x1000>;
2885 interrupts = <GIC_SPI 496 IRQ_TYPE_LEVEL_HIGH 0>;
2889 mediatek,gce-client-reg = <&gce0 SUBSYS_1c10XXXX 0x5000 0x1000>;
2894 reg = <0 0x1c106000 0 0x1000>;
2895 interrupts = <GIC_SPI 497 IRQ_TYPE_LEVEL_HIGH 0>;
2899 mediatek,gce-client-reg = <&gce0 SUBSYS_1c10XXXX 0x6000 0x1000>;
2904 reg = <0 0x1c107000 0 0x1000>;
2905 interrupts = <GIC_SPI 498 IRQ_TYPE_LEVEL_HIGH 0>;
2909 mediatek,gce-client-reg = <&gce0 SUBSYS_1c10XXXX 0x7000 0x1000>;
2914 reg = <0 0x1c108000 0 0x1000>;
2915 interrupts = <GIC_SPI 499 IRQ_TYPE_LEVEL_HIGH 0>;
2919 mediatek,gce-client-reg = <&gce0 SUBSYS_1c10XXXX 0x8000 0x1000>;
2924 reg = <0 0x1c109000 0 0x1000>;
2925 interrupts = <GIC_SPI 500 IRQ_TYPE_LEVEL_HIGH 0>;
2929 mediatek,gce-client-reg = <&gce0 SUBSYS_1c10XXXX 0x9000 0x1000>;
2934 reg = <0 0x1c10a000 0 0x1000>;
2935 interrupts = <GIC_SPI 501 IRQ_TYPE_LEVEL_HIGH 0>;
2939 mediatek,gce-client-reg = <&gce0 SUBSYS_1c10XXXX 0xa000 0x1000>;
2944 reg = <0 0x1c10b000 0 0x1000>;
2945 interrupts = <GIC_SPI 502 IRQ_TYPE_LEVEL_HIGH 0>;
2949 mediatek,gce-client-reg = <&gce0 SUBSYS_1c10XXXX 0xb000 0x1000>;
2954 reg = <0 0x1c10c000 0 0x1000>;
2955 interrupts = <GIC_SPI 503 IRQ_TYPE_LEVEL_HIGH 0>;
2960 mediatek,gce-client-reg = <&gce0 SUBSYS_1c10XXXX 0xc000 0x1000>;
2967 reg = <0 0x1c10d000 0 0x1000>;
2968 interrupts = <GIC_SPI 504 IRQ_TYPE_LEVEL_HIGH 0>;
2973 mediatek,gce-client-reg = <&gce0 SUBSYS_1c10XXXX 0xd000 0x1000>;
2980 reg = <0 0x1c10e000 0 0x1000>;
2981 interrupts = <GIC_SPI 505 IRQ_TYPE_LEVEL_HIGH 0>;
2986 mediatek,gce-client-reg = <&gce0 SUBSYS_1c10XXXX 0xe000 0x1000>;
2993 reg = <0 0x1c10f000 0 0x1000>;
2994 interrupts = <GIC_SPI 506 IRQ_TYPE_LEVEL_HIGH 0>;
2999 mediatek,gce-client-reg = <&gce0 SUBSYS_1c10XXXX 0xf000 0x1000>;
3006 reg = <0 0x1c110000 0 0x1000>;
3007 interrupts = <GIC_SPI 507 IRQ_TYPE_LEVEL_HIGH 0>;
3012 mediatek,gce-client-reg = <&gce0 SUBSYS_1c11XXXX 0x0000 0x1000>;
3019 reg = <0 0x1c113000 0 0x1000>;
3020 interrupts = <GIC_SPI 513 IRQ_TYPE_LEVEL_HIGH 0>;
3031 reg = <0 0x1c114000 0 0x1000>,
3032 <0 0x1c115000 0 0x1000>,
3033 <0 0x1c117000 0 0x1000>,
3034 <0 0x1c119000 0 0x1000>,
3035 <0 0x1c11a000 0 0x1000>,
3036 <0 0x1c11b000 0 0x1000>,
3037 <0 0x1c11c000 0 0x1000>;
3040 mediatek,gce-client-reg = <&gce0 SUBSYS_1c11XXXX 0x4000 0x1000>,
3041 <&gce0 SUBSYS_1c11XXXX 0x5000 0x1000>,
3042 <&gce0 SUBSYS_1c11XXXX 0x7000 0x1000>,
3043 <&gce0 SUBSYS_1c11XXXX 0x9000 0x1000>,
3044 <&gce0 SUBSYS_1c11XXXX 0xa000 0x1000>,
3045 <&gce0 SUBSYS_1c11XXXX 0xb000 0x1000>,
3046 <&gce0 SUBSYS_1c11XXXX 0xc000 0x1000>;
3067 interrupts = <GIC_SPI 517 IRQ_TYPE_LEVEL_HIGH 0>; /* disp mixer */
3079 reg = <0 0x1c500000 0 0x8000>;
3083 interrupts = <GIC_SPI 676 IRQ_TYPE_LEVEL_HIGH 0>;
3090 reg = <0 0x1c600000 0 0x8000>;
3094 interrupts = <GIC_SPI 458 IRQ_TYPE_LEVEL_HIGH 0>;