Lines Matching +full:hs400 +full:- +full:ds +full:- +full:delay
1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
6 /dts-v1/;
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/spmi/spmi.h>
25 stdout-path = "serial0:115200n8";
33 backlight_lcd0: backlight-lcd0 {
34 compatible = "pwm-backlight";
36 power-supply = <&ppvar_sys>;
37 enable-gpios = <&pio 152 0>;
38 brightness-levels = <0 1023>;
39 num-interpolated-steps = <1023>;
40 default-brightness-level = <576>;
43 dmic_codec: dmic-codec {
44 compatible = "dmic-codec";
45 num-channels = <2>;
46 wakeup-delay-ms = <50>;
49 pp1000_dpbrdg: regulator-1v0-dpbrdg {
50 compatible = "regulator-fixed";
51 regulator-name = "pp1000_dpbrdg";
52 pinctrl-names = "default";
53 pinctrl-0 = <&pp1000_dpbrdg_en_pins>;
54 regulator-min-microvolt = <1000000>;
55 regulator-max-microvolt = <1000000>;
56 enable-active-high;
57 regulator-boot-on;
59 vin-supply = <&mt6359_vs2_buck_reg>;
62 pp1000_mipibrdg: regulator-1v0-mipibrdg {
63 compatible = "regulator-fixed";
64 regulator-name = "pp1000_mipibrdg";
65 pinctrl-names = "default";
66 pinctrl-0 = <&pp1000_mipibrdg_en_pins>;
67 regulator-min-microvolt = <1000000>;
68 regulator-max-microvolt = <1000000>;
69 enable-active-high;
70 regulator-boot-on;
72 vin-supply = <&mt6359_vs2_buck_reg>;
75 pp1800_dpbrdg: regulator-1v8-dpbrdg {
76 compatible = "regulator-fixed";
77 regulator-name = "pp1800_dpbrdg";
78 pinctrl-names = "default";
79 pinctrl-0 = <&pp1800_dpbrdg_en_pins>;
80 enable-active-high;
81 regulator-boot-on;
83 vin-supply = <&mt6359_vio18_ldo_reg>;
87 pp1800_ldo_g: regulator-1v8-g {
88 compatible = "regulator-fixed";
89 regulator-name = "pp1800_ldo_g";
90 regulator-always-on;
91 regulator-boot-on;
92 regulator-min-microvolt = <1800000>;
93 regulator-max-microvolt = <1800000>;
94 vin-supply = <&pp3300_g>;
97 pp1800_mipibrdg: regulator-1v8-mipibrdg {
98 compatible = "regulator-fixed";
99 regulator-name = "pp1800_mipibrdg";
100 pinctrl-names = "default";
101 pinctrl-0 = <&pp1800_mipibrdg_en_pins>;
102 enable-active-high;
103 regulator-boot-on;
105 vin-supply = <&mt6359_vio18_ldo_reg>;
108 pp3300_dpbrdg: regulator-3v3-dpbrdg {
109 compatible = "regulator-fixed";
110 regulator-name = "pp3300_dpbrdg";
111 pinctrl-names = "default";
112 pinctrl-0 = <&pp3300_dpbrdg_en_pins>;
113 enable-active-high;
114 regulator-boot-on;
116 vin-supply = <&pp3300_g>;
120 pp3300_g: regulator-3v3-g {
121 compatible = "regulator-fixed";
122 regulator-name = "pp3300_g";
123 regulator-always-on;
124 regulator-boot-on;
125 regulator-min-microvolt = <3300000>;
126 regulator-max-microvolt = <3300000>;
127 vin-supply = <&ppvar_sys>;
131 pp3300_ldo_z: regulator-3v3-z {
132 compatible = "regulator-fixed";
133 regulator-name = "pp3300_ldo_z";
134 regulator-always-on;
135 regulator-boot-on;
136 regulator-min-microvolt = <3300000>;
137 regulator-max-microvolt = <3300000>;
138 vin-supply = <&ppvar_sys>;
141 pp3300_mipibrdg: regulator-3v3-mipibrdg {
142 compatible = "regulator-fixed";
143 regulator-name = "pp3300_mipibrdg";
144 pinctrl-names = "default";
145 pinctrl-0 = <&pp3300_mipibrdg_en_pins>;
146 enable-active-high;
147 regulator-boot-on;
149 vin-supply = <&pp3300_g>;
153 pp3300_u: regulator-3v3-u {
154 compatible = "regulator-fixed";
155 regulator-name = "pp3300_u";
156 regulator-always-on;
157 regulator-boot-on;
158 regulator-min-microvolt = <3300000>;
159 regulator-max-microvolt = <3300000>;
161 vin-supply = <&pp3300_g>;
164 pp3300_wlan: regulator-3v3-wlan {
165 compatible = "regulator-fixed";
166 regulator-name = "pp3300_wlan";
167 regulator-always-on;
168 regulator-boot-on;
169 regulator-min-microvolt = <3300000>;
170 regulator-max-microvolt = <3300000>;
171 pinctrl-names = "default";
172 pinctrl-0 = <&pp3300_wlan_pins>;
173 enable-active-high;
178 pp5000_a: regulator-5v0-a {
179 compatible = "regulator-fixed";
180 regulator-name = "pp5000_a";
181 regulator-always-on;
182 regulator-boot-on;
183 regulator-min-microvolt = <5000000>;
184 regulator-max-microvolt = <5000000>;
185 vin-supply = <&ppvar_sys>;
188 /* system wide semi-regulated power rail from battery or USB */
189 ppvar_sys: regulator-var-sys {
190 compatible = "regulator-fixed";
191 regulator-name = "ppvar_sys";
192 regulator-always-on;
193 regulator-boot-on;
196 reserved_memory: reserved-memory {
197 #address-cells = <2>;
198 #size-cells = <2>;
202 compatible = "shared-dma-pool";
204 no-map;
208 compatible = "restricted-dma-pool";
215 pinctrl-names = "aud_clk_mosi_off",
241 pinctrl-0 = <&aud_clk_mosi_off_pins>;
242 pinctrl-1 = <&aud_clk_mosi_on_pins>;
243 pinctrl-2 = <&aud_dat_mosi_off_pins>;
244 pinctrl-3 = <&aud_dat_mosi_on_pins>;
245 pinctrl-4 = <&aud_dat_miso_off_pins>;
246 pinctrl-5 = <&aud_dat_miso_on_pins>;
247 pinctrl-6 = <&vow_dat_miso_off_pins>;
248 pinctrl-7 = <&vow_dat_miso_on_pins>;
249 pinctrl-8 = <&vow_clk_miso_off_pins>;
250 pinctrl-9 = <&vow_clk_miso_on_pins>;
251 pinctrl-10 = <&aud_nle_mosi_off_pins>;
252 pinctrl-11 = <&aud_nle_mosi_on_pins>;
253 pinctrl-12 = <&aud_dat_miso2_off_pins>;
254 pinctrl-13 = <&aud_dat_miso2_on_pins>;
255 pinctrl-14 = <&aud_gpio_i2s3_off_pins>;
256 pinctrl-15 = <&aud_gpio_i2s3_on_pins>;
257 pinctrl-16 = <&aud_gpio_i2s8_off_pins>;
258 pinctrl-17 = <&aud_gpio_i2s8_on_pins>;
259 pinctrl-18 = <&aud_gpio_i2s9_off_pins>;
260 pinctrl-19 = <&aud_gpio_i2s9_on_pins>;
261 pinctrl-20 = <&aud_dat_mosi_ch34_off_pins>;
262 pinctrl-21 = <&aud_dat_mosi_ch34_on_pins>;
263 pinctrl-22 = <&aud_dat_miso_ch34_off_pins>;
264 pinctrl-23 = <&aud_dat_miso_ch34_on_pins>;
265 pinctrl-24 = <&aud_gpio_tdm_off_pins>;
266 pinctrl-25 = <&aud_gpio_tdm_on_pins>;
275 remote-endpoint = <&anx7625_in>;
279 mediatek,broken-save-restore-fw;
283 mali-supply = <&mt6315_7_vbuck1>;
290 clock-frequency = <400000>;
291 pinctrl-names = "default";
292 pinctrl-0 = <&i2c0_pins>;
296 interrupts-extended = <&pio 21 IRQ_TYPE_LEVEL_LOW>;
297 pinctrl-names = "default";
298 pinctrl-0 = <&touchscreen_pins>;
305 clock-frequency = <400000>;
306 pinctrl-names = "default";
307 pinctrl-0 = <&i2c1_pins>;
313 clock-frequency = <400000>;
314 clock-stretch-ns = <12600>;
315 pinctrl-names = "default";
316 pinctrl-0 = <&i2c2_pins>;
321 interrupts-extended = <&pio 15 IRQ_TYPE_LEVEL_LOW>;
322 pinctrl-names = "default";
323 pinctrl-0 = <&trackpad_pins>;
324 vcc-supply = <&pp3300_u>;
325 wakeup-source;
332 clock-frequency = <400000>;
333 pinctrl-names = "default";
334 pinctrl-0 = <&i2c3_pins>;
339 pinctrl-names = "default";
340 pinctrl-0 = <&anx7625_pins>;
341 enable-gpios = <&pio 41 GPIO_ACTIVE_HIGH>;
342 reset-gpios = <&pio 42 GPIO_ACTIVE_HIGH>;
343 vdd10-supply = <&pp1000_mipibrdg>;
344 vdd18-supply = <&pp1800_mipibrdg>;
345 vdd33-supply = <&pp3300_mipibrdg>;
348 #address-cells = <1>;
349 #size-cells = <0>;
355 remote-endpoint = <&dsi_out>;
363 remote-endpoint = <&panel_in>;
368 aux-bus {
370 compatible = "edp-panel";
371 power-supply = <&pp3300_mipibrdg>;
376 remote-endpoint = <&anx7625_out>;
387 clock-frequency = <400000>;
388 pinctrl-names = "default";
389 pinctrl-0 = <&i2c7_pins>;
393 domain-supply = <&mt6315_7_vbuck1>;
397 domain-supply = <&mt6359_vsram_others_ldo_reg>;
407 pinctrl-names = "default", "state_uhs";
408 pinctrl-0 = <&mmc0_default_pins>;
409 pinctrl-1 = <&mmc0_uhs_pins>;
410 bus-width = <8>;
411 max-frequency = <200000000>;
412 vmmc-supply = <&mt6359_vemc_1_ldo_reg>;
413 vqmmc-supply = <&mt6359_vufs_ldo_reg>;
414 cap-mmc-highspeed;
415 mmc-hs200-1_8v;
416 mmc-hs400-1_8v;
417 supports-cqe;
418 cap-mmc-hw-reset;
419 mmc-hs400-enhanced-strobe;
420 hs400-ds-delay = <0x12814>;
421 no-sdio;
422 no-sd;
423 non-removable;
429 pinctrl-names = "default", "state_uhs";
430 pinctrl-0 = <&mmc1_default_pins>;
431 pinctrl-1 = <&mmc1_uhs_pins>;
432 bus-width = <4>;
433 max-frequency = <200000000>;
434 cd-gpios = <&pio 17 GPIO_ACTIVE_LOW>;
435 vmmc-supply = <&mt6360_ldo5_reg>;
436 vqmmc-supply = <&mt6360_ldo3_reg>;
437 cap-sd-highspeed;
438 sd-uhs-sdr50;
439 sd-uhs-sdr104;
440 no-sdio;
441 no-mmc;
446 regulator-always-on;
450 regulator-always-on;
451 regulator-min-microvolt = <575000>;
452 regulator-max-microvolt = <575000>;
456 regulator-always-on;
460 regulator-min-microvolt = <750000>;
461 regulator-max-microvolt = <800000>;
462 regulator-coupled-with = <&mt6315_7_vbuck1>;
463 regulator-coupled-max-spread = <10000>;
467 regulator-always-on;
471 mediatek,dmic-mode = <1>; /* one-wire */
472 mediatek,mic-type-0 = <2>; /* DMIC */
473 mediatek,mic-type-2 = <2>; /* DMIC */
479 pinctrl-names = "default";
480 pinctrl-0 = <&nor_flash_pins>;
481 assigned-clocks = <&topckgen CLK_TOP_SFLASH_SEL>;
482 assigned-clock-parents = <&topckgen CLK_TOP_UNIVPLL_D6_D8>;
485 compatible = "winbond,w25q64jwm", "jedec,spi-nor";
487 spi-max-frequency = <52000000>;
488 spi-rx-bus-width = <2>;
489 spi-tx-bus-width = <2>;
494 pinctrl-names = "default";
495 pinctrl-0 = <&pcie_pins>;
500 num-lanes = <1>;
501 bus-range = <0x1 0x1>;
503 #address-cells = <3>;
504 #size-cells = <2>;
510 memory-region = <&wifi_restricted_dma_region>;
517 gpio-line-names = "I2S_DP_LRCK",
742 anx7625_pins: anx7625-default-pins {
743 pins-out {
746 output-low;
749 pins-in {
751 input-enable;
752 bias-pull-up;
756 aud_clk_mosi_off_pins: aud-clk-mosi-off-pins {
757 pins-mosi-off {
763 aud_clk_mosi_on_pins: aud-clk-mosi-on-pins {
764 pins-mosi-on {
767 drive-strength = <10>;
771 aud_dat_miso_ch34_off_pins: aud-dat-miso-ch34-off-pins {
772 pins-miso-off {
777 aud_dat_miso_ch34_on_pins: aud-dat-miso-ch34-on-pins {
778 pins-miso-on {
783 aud_dat_miso_off_pins: aud-dat-miso-off-pins {
784 pins-miso-off {
790 aud_dat_miso_on_pins: aud-dat-miso-on-pins {
791 pins-miso-on {
794 drive-strength = <10>;
798 aud_dat_miso2_off_pins: aud-dat-miso2-off-pins {
799 pins-miso-off {
804 aud_dat_miso2_on_pins: aud-dat-miso2-on-pins {
805 pins-miso-on {
810 aud_dat_mosi_ch34_off_pins: aud-dat-mosi-ch34-off-pins {
811 pins-mosi-off {
816 aud_dat_mosi_ch34_on_pins: aud-dat-mosi-ch34-on-pins {
817 pins-mosi-on {
822 aud_dat_mosi_off_pins: aud-dat-mosi-off-pins {
823 pins-mosi-off {
829 aud_dat_mosi_on_pins: aud-dat-mosi-on-pins {
830 pins-mosi-on {
833 drive-strength = <10>;
837 aud_gpio_i2s3_off_pins: aud-gpio-i2s3-off-pins {
838 pins-i2s3-off {
845 aud_gpio_i2s3_on_pins: aud-gpio-i2s3-on-pins {
846 pins-i2s3-on {
853 aud_gpio_i2s8_off_pins: aud-gpio-i2s8-off-pins {
854 pins-i2s8-off {
862 aud_gpio_i2s8_on_pins: aud-gpio-i2s8-on-pins {
863 pins-i2s8-on {
871 aud_gpio_i2s9_off_pins: aud-gpio-i2s9-off-pins {
872 pins-i2s9-off {
877 aud_gpio_i2s9_on_pins: aud-gpio-i2s9-on-pins {
878 pins-i2s9-on {
883 aud_gpio_tdm_off_pins: aud-gpio-tdm-off-pins {
884 pins-tdm-off {
892 aud_gpio_tdm_on_pins: aud-gpio-tdm-on-pins {
893 pins-tdm-on {
901 aud_nle_mosi_off_pins: aud-nle-mosi-off-pins {
902 pins-nle-mosi-off {
908 aud_nle_mosi_on_pins: aud-nle-mosi-on-pins {
909 pins-nle-mosi-on {
915 cr50_int: cr50-irq-default-pins {
916 pins-gsc-ap-int-odl {
918 input-enable;
922 cros_ec_int: cros-ec-irq-default-pins {
923 pins-ec-ap-int-odl {
925 input-enable;
926 bias-pull-up;
930 i2c0_pins: i2c0-default-pins {
931 pins-bus {
934 bias-pull-up = <MTK_PULL_SET_RSEL_011>;
935 drive-strength-microamp = <1000>;
939 i2c1_pins: i2c1-default-pins {
940 pins-bus {
943 bias-pull-up = <MTK_PULL_SET_RSEL_011>;
944 drive-strength-microamp = <1000>;
948 i2c2_pins: i2c2-default-pins {
949 pins-bus {
952 bias-pull-up = <MTK_PULL_SET_RSEL_011>;
956 i2c3_pins: i2c3-default-pins {
957 pins-bus {
960 bias-disable;
961 drive-strength-microamp = <1000>;
965 i2c7_pins: i2c7-default-pins {
966 pins-bus {
969 bias-disable;
970 drive-strength-microamp = <1000>;
974 mmc0_default_pins: mmc0-default-pins {
975 pins-cmd-dat {
985 input-enable;
986 drive-strength = <8>;
987 bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
990 pins-clk {
992 drive-strength = <8>;
993 bias-pull-down = <MTK_PUPD_SET_R1R0_10>;
996 pins-rst {
998 drive-strength = <8>;
999 bias-pull-down = <MTK_PUPD_SET_R1R0_01>;
1003 mmc0_uhs_pins: mmc0-uhs-pins {
1004 pins-cmd-dat {
1014 input-enable;
1015 drive-strength = <10>;
1016 bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
1019 pins-clk {
1021 drive-strength = <10>;
1022 bias-pull-down = <MTK_PUPD_SET_R1R0_10>;
1025 pins-rst {
1027 drive-strength = <8>;
1028 bias-pull-down = <MTK_PUPD_SET_R1R0_01>;
1031 pins-ds {
1033 drive-strength = <10>;
1034 bias-pull-down = <MTK_PUPD_SET_R1R0_10>;
1038 mmc1_default_pins: mmc1-default-pins {
1039 pins-cmd-dat {
1045 input-enable;
1046 drive-strength = <8>;
1047 bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
1050 pins-clk {
1052 drive-strength = <8>;
1053 bias-pull-down = <MTK_PUPD_SET_R1R0_10>;
1056 pins-insert {
1058 input-enable;
1059 bias-pull-up;
1063 mmc1_uhs_pins: mmc1-uhs-pins {
1064 pins-cmd-dat {
1070 input-enable;
1071 drive-strength = <8>;
1072 bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
1075 pins-clk {
1077 input-enable;
1078 drive-strength = <8>;
1079 bias-pull-down = <MTK_PUPD_SET_R1R0_10>;
1083 nor_flash_pins: nor-flash-default-pins {
1084 pins-cs-io1 {
1087 input-enable;
1088 bias-pull-up;
1089 drive-strength = <10>;
1092 pins-io0 {
1094 bias-pull-up;
1095 drive-strength = <10>;
1098 pins-clk {
1100 input-enable;
1101 bias-pull-up;
1102 drive-strength = <10>;
1106 pcie_pins: pcie-default-pins {
1107 pins-pcie-wake {
1109 bias-pull-up;
1112 pins-pcie-pereset {
1116 pins-pcie-clkreq {
1118 bias-pull-up;
1121 pins-wifi-kill {
1123 output-high;
1127 pp1000_dpbrdg_en_pins: pp1000-dpbrdg-en-pins {
1128 pins-en {
1130 output-low;
1134 pp1000_mipibrdg_en_pins: pp1000-mipibrdg-en-pins {
1135 pins-en {
1137 output-low;
1141 pp1800_dpbrdg_en_pins: pp1800-dpbrdg-en-pins {
1142 pins-en {
1144 output-low;
1148 pp1800_mipibrdg_en_pins: pp1800-mipibrd-en-pins {
1149 pins-en {
1151 output-low;
1155 pp3300_dpbrdg_en_pins: pp3300-dpbrdg-en-pins {
1156 pins-en {
1158 output-low;
1162 pp3300_mipibrdg_en_pins: pp3300-mipibrdg-en-pins {
1163 pins-en {
1165 output-low;
1169 pp3300_wlan_pins: pp3300-wlan-pins {
1170 pins-pcie-en-pp3300-wlan {
1172 output-high;
1176 pwm0_pins: pwm0-default-pins {
1177 pins-pwm {
1181 pins-inhibit {
1183 output-high;
1187 scp_pins: scp-pins {
1188 pins-vreq-vao {
1193 spi1_pins: spi1-default-pins {
1194 pins-cs-mosi-clk {
1198 bias-disable;
1201 pins-miso {
1203 bias-pull-down;
1207 spi5_pins: spi5-default-pins {
1208 pins-bus {
1213 bias-disable;
1217 trackpad_pins: trackpad-default-pins {
1218 pins-int-n {
1220 input-enable;
1221 bias-pull-up = <MTK_PUPD_SET_R1R0_11>;
1225 touchscreen_pins: touchscreen-default-pins {
1226 pins-irq {
1228 input-enable;
1229 bias-pull-up;
1232 pins-reset {
1234 output-high;
1237 pins-report-sw {
1239 output-low;
1243 vow_clk_miso_off_pins: vow-clk-miso-off-pins {
1244 pins-miso-off {
1249 vow_clk_miso_on_pins: vow-clk-miso-on-pins {
1250 pins-miso-on {
1255 vow_dat_miso_off_pins: vow-dat-miso-off-pins {
1256 pins-miso-off {
1261 vow_dat_miso_on_pins: vow-dat-miso-on-pins {
1262 pins-miso-on {
1269 interrupts-extended = <&pio 214 IRQ_TYPE_LEVEL_HIGH>;
1275 pinctrl-names = "default";
1276 pinctrl-0 = <&pwm0_pins>;
1282 firmware-name = "mediatek/mt8192/scp.img";
1283 memory-region = <&scp_mem_reserved>;
1284 pinctrl-names = "default";
1285 pinctrl-0 = <&scp_pins>;
1287 cros-ec {
1288 compatible = "google,cros-ec-rpmsg";
1289 mediatek,rpmsg-name = "cros-ec-rpmsg";
1296 mediatek,pad-select = <0>;
1297 pinctrl-names = "default";
1298 pinctrl-0 = <&spi1_pins>;
1301 compatible = "google,cros-ec-spi";
1303 interrupts-extended = <&pio 5 IRQ_TYPE_LEVEL_LOW>;
1304 spi-max-frequency = <3000000>;
1305 pinctrl-names = "default";
1306 pinctrl-0 = <&cros_ec_int>;
1308 #address-cells = <1>;
1309 #size-cells = <0>;
1312 compatible = "google,cros-cbas";
1316 compatible = "google,cros-ec-pwm";
1317 #pwm-cells = <1>;
1322 i2c_tunnel: i2c-tunnel {
1323 compatible = "google,cros-ec-i2c-tunnel";
1324 google,remote-bus = <0>;
1325 #address-cells = <1>;
1326 #size-cells = <0>;
1330 compatible = "google,cros-ec-regulator";
1332 regulator-min-microvolt = <1800000>;
1333 regulator-max-microvolt = <3300000>;
1337 compatible = "google,cros-ec-regulator";
1339 regulator-min-microvolt = <3300000>;
1340 regulator-max-microvolt = <3300000>;
1344 compatible = "google,cros-ec-typec";
1345 #address-cells = <1>;
1346 #size-cells = <0>;
1349 compatible = "usb-c-connector";
1352 power-role = "dual";
1353 data-role = "host";
1354 try-power-role = "source";
1358 compatible = "usb-c-connector";
1361 power-role = "dual";
1362 data-role = "host";
1363 try-power-role = "source";
1372 cs-gpios = <&pio 37 GPIO_ACTIVE_LOW>;
1373 mediatek,pad-select = <0>;
1374 pinctrl-names = "default";
1375 pinctrl-0 = <&spi5_pins>;
1380 interrupts-extended = <&pio 171 IRQ_TYPE_EDGE_RISING>;
1381 spi-max-frequency = <1000000>;
1382 pinctrl-names = "default";
1383 pinctrl-0 = <&cr50_int>;
1388 #address-cells = <2>;
1389 #size-cells = <0>;
1392 compatible = "mediatek,mt6315-regulator";
1397 regulator-compatible = "vbuck1";
1398 regulator-name = "Vbcpu";
1399 regulator-min-microvolt = <300000>;
1400 regulator-max-microvolt = <1193750>;
1401 regulator-enable-ramp-delay = <256>;
1402 regulator-allowed-modes = <0 1 2>;
1403 regulator-always-on;
1407 regulator-compatible = "vbuck3";
1408 regulator-name = "Vlcpu";
1409 regulator-min-microvolt = <300000>;
1410 regulator-max-microvolt = <1193750>;
1411 regulator-enable-ramp-delay = <256>;
1412 regulator-allowed-modes = <0 1 2>;
1413 regulator-always-on;
1419 compatible = "mediatek,mt6315-regulator";
1424 regulator-compatible = "vbuck1";
1425 regulator-name = "Vgpu";
1426 regulator-min-microvolt = <606250>;
1427 regulator-max-microvolt = <800000>;
1428 regulator-enable-ramp-delay = <256>;
1429 regulator-allowed-modes = <0 1 2>;
1430 regulator-coupled-with = <&mt6359_vsram_others_ldo_reg>;
1431 regulator-coupled-max-spread = <10000>;
1444 wakeup-source;
1445 vusb33-supply = <&pp3300_g>;
1446 vbus-supply = <&pp5000_a>;
1449 #include <arm/cros-ec-keyboard.dtsi>
1450 #include <arm/cros-ec-sbs.dtsi>