Lines Matching +full:0 +full:x19
21 reg = <0x00000000 0x40000000 0 0x80000000>;
27 pinctrl-0 = <&pinctrl_gpio_keys>;
53 pinctrl-0 = <&pinctrl_reg_usbotg_vbus>;
61 reg_vref_0v9: regulator-vref-0v9 {
63 regulator-name = "vref-0v9";
103 pinctrl-0 = <&pinctrl_fec1>;
111 #size-cells = <0>;
133 pinctrl-0 = <&pinctrl_i2c1>;
139 pinctrl-0 = <&pinctrl_i2c1_pca9546>;
140 reg = <0x70>;
143 #size-cells = <0>;
145 i2c1a: i2c1@0 {
146 reg = <0>;
148 #size-cells = <0>;
153 pinctrl-0 = <&pinctrl_reg_arm_dram>;
154 reg = <0x60>;
165 #size-cells = <0>;
170 pinctrl-0 = <&pinctrl_reg_dram_1p1v>;
171 reg = <0x60>;
182 #size-cells = <0>;
187 pinctrl-0 = <&pinctrl_reg_soc_gpu_vpu>;
188 reg = <0x60>;
199 #size-cells = <0>;
204 pinctrl-0 = <&pinctrl_i2c1d_rv4162>;
205 reg = <0x68>;
216 pinctrl-0 = <&pinctrl_i2c4>;
221 reg = <0x70>;
223 #size-cells = <0>;
225 i2c4@0 {
226 reg = <0>;
228 #size-cells = <0>;
233 reg = <0x48> ;
234 reset-gpios = <&max7323 0 GPIO_ACTIVE_LOW>;
238 #size-cells = <0>;
240 port@0 {
241 reg = <0>;
263 #size-cells = <0>;
270 #size-cells = <0>;
276 pinctrl-0 = <&pinctrl_max7323>;
278 reg = <0x68>;
291 #size-cells = <0>;
307 pinctrl-0 = <&pinctrl_uart1>;
315 pinctrl-0 = <&pinctrl_uart2>;
324 pinctrl-0 = <&pinctrl_usb3_0>;
340 pinctrl-0 = <&pinctrl_usb3_1>;
349 pinctrl-0 = <&pinctrl_usdhc1>;
357 pinctrl-0 = <&pinctrl_wdog>;
364 pinctrl-0 = <&pinctrl_hog>;
369 MX8MQ_IOMUXC_SAI1_RXFS_GPIO4_IO0 0x19 /* Pin 19 */
370 MX8MQ_IOMUXC_SAI1_RXC_GPIO4_IO1 0x19 /* Pin 21 */
371 MX8MQ_IOMUXC_SAI1_RXD1_GPIO4_IO3 0x19 /* Pin 23 */
372 MX8MQ_IOMUXC_SAI1_RXD2_GPIO4_IO4 0x19 /* Pin 25 */
373 MX8MQ_IOMUXC_SAI1_RXD3_GPIO4_IO5 0x19 /* Pin 27 */
374 MX8MQ_IOMUXC_SAI1_RXD4_GPIO4_IO6 0x19 /* Pin 29 */
375 MX8MQ_IOMUXC_SAI1_RXD5_GPIO4_IO7 0x19 /* Pin 31 */
376 MX8MQ_IOMUXC_SAI1_RXD6_GPIO4_IO8 0x19 /* Pin 33 */
377 MX8MQ_IOMUXC_SAI1_RXD7_GPIO4_IO9 0x19 /* Pin 35 */
378 MX8MQ_IOMUXC_SAI1_TXD1_GPIO4_IO13 0x19 /* Pin 39 */
379 MX8MQ_IOMUXC_SAI1_TXD2_GPIO4_IO14 0x19 /* Pin 41 */
380 MX8MQ_IOMUXC_SAI1_TXD3_GPIO4_IO15 0x19 /* Pin 43 */
381 MX8MQ_IOMUXC_SAI1_TXD4_GPIO4_IO16 0x19 /* Pin 45 */
382 MX8MQ_IOMUXC_SAI1_TXD5_GPIO4_IO17 0x19 /* Pin 47 */
383 MX8MQ_IOMUXC_SAI1_TXD6_GPIO4_IO18 0x19 /* Pin 49 */
384 MX8MQ_IOMUXC_SAI1_TXD7_GPIO4_IO19 0x19 /* Pin 51 */
387 MX8MQ_IOMUXC_SAI3_RXFS_GPIO4_IO28 0x19 /* Pin 44 */
388 MX8MQ_IOMUXC_SAI3_RXC_GPIO4_IO29 0x19 /* Pin 48 */
389 MX8MQ_IOMUXC_GPIO1_IO10_GPIO1_IO10 0x19 /* Pin 50 */
390 MX8MQ_IOMUXC_GPIO1_IO03_GPIO1_IO3 0x19 /* Pin 54 */
391 MX8MQ_IOMUXC_GPIO1_IO05_GPIO1_IO5 0x19 /* Pin 56 */
394 MX8MQ_IOMUXC_NAND_CE3_B_GPIO3_IO4 0x19 /* Pin 41 */
395 MX8MQ_IOMUXC_NAND_CLE_GPIO3_IO5 0x19 /* Pin 43 */
396 MX8MQ_IOMUXC_NAND_READY_B_GPIO3_IO16 0x19 /* Pin 45 */
397 MX8MQ_IOMUXC_NAND_DATA05_GPIO3_IO11 0x19 /* Pin 47 */
398 MX8MQ_IOMUXC_NAND_WP_B_GPIO3_IO18 0x19 /* Pin 49 */
399 MX8MQ_IOMUXC_NAND_DQS_GPIO3_IO14 0x19 /* Pin 53 */
402 MX8MQ_IOMUXC_NAND_ALE_GPIO3_IO0 0x19 /* Pin 32 */
403 MX8MQ_IOMUXC_NAND_CE0_B_GPIO3_IO1 0x19 /* Pin 36 */
404 MX8MQ_IOMUXC_NAND_DATA00_GPIO3_IO6 0x19 /* Pin 38 */
405 MX8MQ_IOMUXC_NAND_DATA01_GPIO3_IO7 0x19 /* Pin 40 */
406 MX8MQ_IOMUXC_NAND_DATA02_GPIO3_IO8 0x19 /* Pin 42 */
407 MX8MQ_IOMUXC_NAND_DATA03_GPIO3_IO9 0x19 /* Pin 44 */
408 MX8MQ_IOMUXC_NAND_DATA04_GPIO3_IO10 0x19 /* Pin 46 */
411 MX8MQ_IOMUXC_SAI5_RXD2_GPIO3_IO23 0xd6
413 MX8MQ_IOMUXC_SAI5_RXD0_GPIO3_IO21 0xd6
415 MX8MQ_IOMUXC_SD2_CD_B_GPIO2_IO12 0x19
417 MX8MQ_IOMUXC_SAI5_RXD1_GPIO3_IO22 0xd6
419 MX8MQ_IOMUXC_SAI5_MCLK_GPIO3_IO25 0xd6
422 MX8MQ_IOMUXC_GPIO1_IO15_CCMSRCGPCMIX_CLKO2 0x07
424 MX8MQ_IOMUXC_GPIO1_IO04_GPIO1_IO4 0xc1 /* TP87 */
430 MX8MQ_IOMUXC_ENET_MDC_ENET1_MDC 0x3
431 MX8MQ_IOMUXC_ENET_MDIO_ENET1_MDIO 0x23
432 MX8MQ_IOMUXC_ENET_TX_CTL_ENET1_RGMII_TX_CTL 0x1f
433 MX8MQ_IOMUXC_ENET_TXC_ENET1_RGMII_TXC 0x1f
434 MX8MQ_IOMUXC_ENET_TD0_ENET1_RGMII_TD0 0x1f
435 MX8MQ_IOMUXC_ENET_TD1_ENET1_RGMII_TD1 0x1f
436 MX8MQ_IOMUXC_ENET_TD2_ENET1_RGMII_TD2 0x1f
437 MX8MQ_IOMUXC_ENET_TD3_ENET1_RGMII_TD3 0x1f
438 MX8MQ_IOMUXC_ENET_RX_CTL_ENET1_RGMII_RX_CTL 0x91
439 MX8MQ_IOMUXC_ENET_RXC_ENET1_RGMII_RXC 0x91
440 MX8MQ_IOMUXC_ENET_RD0_ENET1_RGMII_RD0 0x91
441 MX8MQ_IOMUXC_ENET_RD1_ENET1_RGMII_RD1 0x91
442 MX8MQ_IOMUXC_ENET_RD2_ENET1_RGMII_RD2 0x91
443 MX8MQ_IOMUXC_ENET_RD3_ENET1_RGMII_RD3 0x91
444 MX8MQ_IOMUXC_GPIO1_IO09_GPIO1_IO9 0x19
445 MX8MQ_IOMUXC_GPIO1_IO11_GPIO1_IO11 0x59
451 MX8MQ_IOMUXC_GPIO1_IO07_GPIO1_IO7 0x19
458 MX8MQ_IOMUXC_I2C1_SCL_I2C1_SCL 0x4000007f
459 MX8MQ_IOMUXC_I2C1_SDA_I2C1_SDA 0x4000007f
465 MX8MQ_IOMUXC_GPIO1_IO08_GPIO1_IO8 0x49
471 MX8MQ_IOMUXC_GPIO1_IO06_GPIO1_IO6 0x49
477 MX8MQ_IOMUXC_I2C4_SCL_I2C4_SCL 0x4000007f
478 MX8MQ_IOMUXC_I2C4_SDA_I2C4_SDA 0x4000007f
484 MX8MQ_IOMUXC_NAND_RE_B_GPIO3_IO15 0x19
490 MX8MQ_IOMUXC_SAI5_RXD3_GPIO3_IO24 0x16
496 MX8MQ_IOMUXC_SD1_STROBE_GPIO2_IO11 0x16
502 MX8MQ_IOMUXC_SD2_WP_GPIO2_IO20 0x16
508 MX8MQ_IOMUXC_GPIO1_IO12_GPIO1_IO12 0x16
514 MX8MQ_IOMUXC_UART1_RXD_UART1_DCE_RX 0x45
515 MX8MQ_IOMUXC_UART1_TXD_UART1_DCE_TX 0x45
521 MX8MQ_IOMUXC_UART2_RXD_UART2_DCE_RX 0x45
522 MX8MQ_IOMUXC_UART2_TXD_UART2_DCE_TX 0x45
526 pinctrl_usb3_0: usb3-0grp {
528 MX8MQ_IOMUXC_GPIO1_IO13_USB1_OTG_OC 0x16
534 MX8MQ_IOMUXC_GPIO1_IO14_GPIO1_IO14 0x16
540 MX8MQ_IOMUXC_SD1_CLK_USDHC1_CLK 0x83
541 MX8MQ_IOMUXC_SD1_CMD_USDHC1_CMD 0xc3
542 MX8MQ_IOMUXC_SD1_DATA0_USDHC1_DATA0 0xc3
543 MX8MQ_IOMUXC_SD1_DATA1_USDHC1_DATA1 0xc3
544 MX8MQ_IOMUXC_SD1_DATA2_USDHC1_DATA2 0xc3
545 MX8MQ_IOMUXC_SD1_DATA3_USDHC1_DATA3 0xc3
546 MX8MQ_IOMUXC_SD1_DATA4_USDHC1_DATA4 0xc3
547 MX8MQ_IOMUXC_SD1_DATA5_USDHC1_DATA5 0xc3
548 MX8MQ_IOMUXC_SD1_DATA6_USDHC1_DATA6 0xc3
549 MX8MQ_IOMUXC_SD1_DATA7_USDHC1_DATA7 0xc3
550 MX8MQ_IOMUXC_SD1_RESET_B_GPIO2_IO10 0x41
556 MX8MQ_IOMUXC_SD1_CLK_USDHC1_CLK 0x8d
557 MX8MQ_IOMUXC_SD1_CMD_USDHC1_CMD 0xcd
558 MX8MQ_IOMUXC_SD1_DATA0_USDHC1_DATA0 0xcd
559 MX8MQ_IOMUXC_SD1_DATA1_USDHC1_DATA1 0xcd
560 MX8MQ_IOMUXC_SD1_DATA2_USDHC1_DATA2 0xcd
561 MX8MQ_IOMUXC_SD1_DATA3_USDHC1_DATA3 0xcd
562 MX8MQ_IOMUXC_SD1_DATA4_USDHC1_DATA4 0xcd
563 MX8MQ_IOMUXC_SD1_DATA5_USDHC1_DATA5 0xcd
564 MX8MQ_IOMUXC_SD1_DATA6_USDHC1_DATA6 0xcd
565 MX8MQ_IOMUXC_SD1_DATA7_USDHC1_DATA7 0xcd
571 MX8MQ_IOMUXC_SD1_CLK_USDHC1_CLK 0x9f
572 MX8MQ_IOMUXC_SD1_CMD_USDHC1_CMD 0xdf
573 MX8MQ_IOMUXC_SD1_DATA0_USDHC1_DATA0 0xdf
574 MX8MQ_IOMUXC_SD1_DATA1_USDHC1_DATA1 0xdf
575 MX8MQ_IOMUXC_SD1_DATA2_USDHC1_DATA2 0xdf
576 MX8MQ_IOMUXC_SD1_DATA3_USDHC1_DATA3 0xdf
577 MX8MQ_IOMUXC_SD1_DATA4_USDHC1_DATA4 0xdf
578 MX8MQ_IOMUXC_SD1_DATA5_USDHC1_DATA5 0xdf
579 MX8MQ_IOMUXC_SD1_DATA6_USDHC1_DATA6 0xdf
580 MX8MQ_IOMUXC_SD1_DATA7_USDHC1_DATA7 0xdf
586 MX8MQ_IOMUXC_GPIO1_IO02_WDOG1_WDOG_B 0xc6