Lines Matching +full:0 +full:x94
27 pinctrl-0 = <&pinctrl_reg_usdhc2_vmmc>;
42 pinctrl-0 = <&pinctrl_usb1_connector>;
47 #size-cells = <0>;
49 port@0 {
50 reg = <0>;
62 reg = <0x27>;
67 pinctrl-0 = <&pinctrl_expander>;
119 pinctrl-0 = <&pinctrl_usbotg1>;
145 fsl,pins = <MX8MM_IOMUXC_ECSPI1_SCLK_ECSPI1_SCLK 0x00000006>,
146 <MX8MM_IOMUXC_ECSPI1_MOSI_ECSPI1_MOSI 0x00000006>,
147 <MX8MM_IOMUXC_ECSPI1_MISO_ECSPI1_MISO 0x00000006>,
148 <MX8MM_IOMUXC_ECSPI1_SS0_GPIO5_IO9 0x00000006>;
152 fsl,pins = <MX8MM_IOMUXC_ECSPI2_SCLK_ECSPI2_SCLK 0x00000006>,
153 <MX8MM_IOMUXC_ECSPI2_MOSI_ECSPI2_MOSI 0x00000006>,
154 <MX8MM_IOMUXC_ECSPI2_MISO_ECSPI2_MISO 0x00000006>,
155 <MX8MM_IOMUXC_ECSPI2_SS0_GPIO5_IO13 0x00000006>;
159 fsl,pins = <MX8MM_IOMUXC_GPIO1_IO09_GPIO1_IO9 0x94>;
163 fsl,pins = <MX8MM_IOMUXC_ENET_MDC_ENET1_MDC 0x40000002>,
164 <MX8MM_IOMUXC_ENET_MDIO_ENET1_MDIO 0x40000002>,
165 <MX8MM_IOMUXC_ENET_TD3_ENET1_RGMII_TD3 0x14>,
166 <MX8MM_IOMUXC_ENET_TD2_ENET1_RGMII_TD2 0x14>,
167 <MX8MM_IOMUXC_ENET_TD1_ENET1_RGMII_TD1 0x14>,
168 <MX8MM_IOMUXC_ENET_TD0_ENET1_RGMII_TD0 0x14>,
169 <MX8MM_IOMUXC_ENET_RD3_ENET1_RGMII_RD3 0x90>,
170 <MX8MM_IOMUXC_ENET_RD2_ENET1_RGMII_RD2 0x90>,
171 <MX8MM_IOMUXC_ENET_RD1_ENET1_RGMII_RD1 0x90>,
172 <MX8MM_IOMUXC_ENET_RD0_ENET1_RGMII_RD0 0x90>,
173 <MX8MM_IOMUXC_ENET_TXC_ENET1_RGMII_TXC 0x14>,
174 <MX8MM_IOMUXC_ENET_RXC_ENET1_RGMII_RXC 0x90>,
175 <MX8MM_IOMUXC_ENET_RX_CTL_ENET1_RGMII_RX_CTL 0x90>,
176 <MX8MM_IOMUXC_ENET_TX_CTL_ENET1_RGMII_TX_CTL 0x14>;
180 fsl,pins = <MX8MM_IOMUXC_GPIO1_IO05_GPIO1_IO5 0x84>,
181 <MX8MM_IOMUXC_GPIO1_IO07_GPIO1_IO7 0x84>,
182 <MX8MM_IOMUXC_SD1_CLK_GPIO2_IO0 0x84>;
186 fsl,pins = <MX8MM_IOMUXC_GPIO1_IO00_GPIO1_IO0 0x84>,
187 <MX8MM_IOMUXC_NAND_DQS_GPIO3_IO14 0x84>;
191 fsl,pins = <MX8MM_IOMUXC_I2C2_SCL_I2C2_SCL 0x40000004>,
192 <MX8MM_IOMUXC_I2C2_SDA_I2C2_SDA 0x40000004>;
196 fsl,pins = <MX8MM_IOMUXC_I2C2_SCL_GPIO5_IO16 0x40000004>,
197 <MX8MM_IOMUXC_I2C2_SDA_GPIO5_IO17 0x40000004>;
201 fsl,pins = <MX8MM_IOMUXC_I2C3_SCL_I2C3_SCL 0x40000004>,
202 <MX8MM_IOMUXC_I2C3_SDA_I2C3_SDA 0x40000004>;
206 fsl,pins = <MX8MM_IOMUXC_I2C3_SCL_GPIO5_IO18 0x40000004>,
207 <MX8MM_IOMUXC_I2C3_SDA_GPIO5_IO19 0x40000004>;
211 fsl,pins = <MX8MM_IOMUXC_GPIO1_IO14_PWM3_OUT 0x14>;
215 fsl,pins = <MX8MM_IOMUXC_GPIO1_IO15_PWM4_OUT 0x14>;
219 fsl,pins = <MX8MM_IOMUXC_SAI3_MCLK_SAI3_MCLK 0x94>,
220 <MX8MM_IOMUXC_SAI3_RXC_SAI3_RX_BCLK 0x94>,
221 <MX8MM_IOMUXC_SAI3_RXFS_SAI3_RX_SYNC 0x94>,
222 <MX8MM_IOMUXC_SAI3_RXD_SAI3_RX_DATA0 0x94>,
223 <MX8MM_IOMUXC_SAI3_TXFS_SAI3_TX_SYNC 0x94>,
224 <MX8MM_IOMUXC_SAI3_TXD_SAI3_TX_DATA0 0x94>,
225 <MX8MM_IOMUXC_SAI3_TXC_SAI3_TX_BCLK 0x94>;
229 fsl,pins = <MX8MM_IOMUXC_UART1_RXD_UART1_DCE_RX 0x16>,
230 <MX8MM_IOMUXC_UART1_TXD_UART1_DCE_TX 0x16>;
234 fsl,pins = <MX8MM_IOMUXC_UART2_RXD_UART2_DCE_RX 0x16>,
235 <MX8MM_IOMUXC_UART2_TXD_UART2_DCE_TX 0x16>;
239 fsl,pins = <MX8MM_IOMUXC_UART3_RXD_UART3_DCE_RX 0x16>,
240 <MX8MM_IOMUXC_UART3_TXD_UART3_DCE_TX 0x16>;
244 fsl,pins = <MX8MM_IOMUXC_UART4_RXD_UART4_DCE_RX 0x16>,
245 <MX8MM_IOMUXC_UART4_TXD_UART4_DCE_TX 0x16>;
249 fsl,pins = <MX8MM_IOMUXC_GPIO1_IO12_USB1_OTG_PWR 0x84>,
250 <MX8MM_IOMUXC_GPIO1_IO13_USB1_OTG_OC 0x84>;
254 fsl,pins = <MX8MM_IOMUXC_GPIO1_IO10_GPIO1_IO10 0x1c0>;
258 fsl,pins = <MX8MM_IOMUXC_SD2_CD_B_GPIO2_IO12 0x84>;
262 fsl,pins = <MX8MM_IOMUXC_SD2_CLK_USDHC2_CLK 0x1d4>,
263 <MX8MM_IOMUXC_SD2_CMD_USDHC2_CMD 0x1d4>,
264 <MX8MM_IOMUXC_SD2_DATA0_USDHC2_DATA0 0x1d4>,
265 <MX8MM_IOMUXC_SD2_DATA1_USDHC2_DATA1 0x1d4>,
266 <MX8MM_IOMUXC_SD2_DATA2_USDHC2_DATA2 0x1d4>,
267 <MX8MM_IOMUXC_SD2_DATA3_USDHC2_DATA3 0x1d4>,
268 <MX8MM_IOMUXC_GPIO1_IO04_USDHC2_VSELECT 0x84>;
272 fsl,pins = <MX8MM_IOMUXC_SD2_CLK_USDHC2_CLK 0x1d4>,
273 <MX8MM_IOMUXC_SD2_CMD_USDHC2_CMD 0x1d4>,
274 <MX8MM_IOMUXC_SD2_DATA0_USDHC2_DATA0 0x1d4>,
275 <MX8MM_IOMUXC_SD2_DATA1_USDHC2_DATA1 0x1d4>,
276 <MX8MM_IOMUXC_SD2_DATA2_USDHC2_DATA2 0x1d4>,
277 <MX8MM_IOMUXC_SD2_DATA3_USDHC2_DATA3 0x1d4>,
278 <MX8MM_IOMUXC_GPIO1_IO04_USDHC2_VSELECT 0x84>;
282 fsl,pins = <MX8MM_IOMUXC_SD2_CLK_USDHC2_CLK 0x1d4>,
283 <MX8MM_IOMUXC_SD2_CMD_USDHC2_CMD 0x1d4>,
284 <MX8MM_IOMUXC_SD2_DATA0_USDHC2_DATA0 0x1d4>,
285 <MX8MM_IOMUXC_SD2_DATA1_USDHC2_DATA1 0x1d4>,
286 <MX8MM_IOMUXC_SD2_DATA2_USDHC2_DATA2 0x1d4>,
287 <MX8MM_IOMUXC_SD2_DATA3_USDHC2_DATA3 0x1d4>,
288 <MX8MM_IOMUXC_GPIO1_IO04_USDHC2_VSELECT 0x84>;