Lines Matching +full:0 +full:x19
25 pinctrl-0 = <&pinctrl_beeper>;
26 gpios = <&gpio1 0 GPIO_ACTIVE_HIGH>;
32 pinctrl-0 = <&pinctrl_gpio_led>;
34 led-0 {
63 pinctrl-0 = <&pinctrl_otg_vbus_ctrl>;
74 pinctrl-0 = <&pinctrl_reg_usdhc2_vmmc>;
100 hsync-active = <0>;
101 vsync-active = <0>;
116 pinctrl-0 = <&pinctrl_ecspi1>;
123 pinctrl-0 = <&pinctrl_fec1>;
131 #size-cells = <0>;
133 ethphy0: ethernet-phy@0 {
134 reg = <0>;
143 pinctrl-0 = <&pinctrl_i2c2>;
148 reg = <0x2c>;
151 pinctrl-0 = <&pinctrl_dsi_bridge>;
155 #size-cells = <0>;
157 port@0 {
158 reg = <0>;
191 lane-polarities = <1 0 0 0 0>;
201 pinctrl-0 = <&pinctrl_uart2>;
229 pinctrl-0 = <&pinctrl_usdhc2>, <&pinctrl_usdhc2_gpio>;
246 MX8MM_IOMUXC_GPIO1_IO00_GPIO1_IO0 0x19
252 MX8MM_IOMUXC_SD1_DATA1_GPIO2_IO3 0x19
258 MX8MM_IOMUXC_ECSPI1_MISO_ECSPI1_MISO 0x82
259 MX8MM_IOMUXC_ECSPI1_MOSI_ECSPI1_MOSI 0x82
260 MX8MM_IOMUXC_ECSPI1_SCLK_ECSPI1_SCLK 0x82
261 MX8MM_IOMUXC_ECSPI1_SS0_GPIO5_IO9 0x19
267 MX8MM_IOMUXC_ENET_MDC_ENET1_MDC 0x40000002
268 MX8MM_IOMUXC_ENET_MDIO_ENET1_MDIO 0x40000002
269 MX8MM_IOMUXC_ENET_TD3_ENET1_RGMII_TD3 0x14
270 MX8MM_IOMUXC_ENET_TD2_ENET1_RGMII_TD2 0x14
271 MX8MM_IOMUXC_ENET_TD1_ENET1_RGMII_TD1 0x14
272 MX8MM_IOMUXC_ENET_TD0_ENET1_RGMII_TD0 0x14
273 MX8MM_IOMUXC_ENET_RD3_ENET1_RGMII_RD3 0x90
274 MX8MM_IOMUXC_ENET_RD2_ENET1_RGMII_RD2 0x90
275 MX8MM_IOMUXC_ENET_RD1_ENET1_RGMII_RD1 0x90
276 MX8MM_IOMUXC_ENET_RD0_ENET1_RGMII_RD0 0x90
277 MX8MM_IOMUXC_ENET_TXC_ENET1_RGMII_TXC 0x14
278 MX8MM_IOMUXC_ENET_RXC_ENET1_RGMII_RXC 0x90
279 MX8MM_IOMUXC_ENET_RX_CTL_ENET1_RGMII_RX_CTL 0x90
280 MX8MM_IOMUXC_ENET_TX_CTL_ENET1_RGMII_TX_CTL 0x14
281 MX8MM_IOMUXC_SAI2_RXC_GPIO4_IO22 0x10
287 MX8MM_IOMUXC_GPIO1_IO10_GPIO1_IO10 0x19
288 MX8MM_IOMUXC_GPIO1_IO03_GPIO1_IO3 0x19
289 MX8MM_IOMUXC_GPIO1_IO06_GPIO1_IO6 0x19
290 MX8MM_IOMUXC_GPIO1_IO07_GPIO1_IO7 0x19
291 MX8MM_IOMUXC_GPIO1_IO01_GPIO1_IO1 0x19
297 MX8MM_IOMUXC_I2C2_SCL_I2C2_SCL 0x400001c3
298 MX8MM_IOMUXC_I2C2_SDA_I2C2_SDA 0x400001c3
304 MX8MM_IOMUXC_SD1_DATA0_GPIO2_IO2 0x119
310 MX8MM_IOMUXC_UART2_RXD_UART2_DCE_RX 0x140
311 MX8MM_IOMUXC_UART2_TXD_UART2_DCE_TX 0x140
317 MX8MM_IOMUXC_SD2_CD_B_GPIO2_IO12 0x1c4
323 MX8MM_IOMUXC_SD2_CLK_USDHC2_CLK 0x190
324 MX8MM_IOMUXC_SD2_CMD_USDHC2_CMD 0x1d0
325 MX8MM_IOMUXC_SD2_DATA0_USDHC2_DATA0 0x1d0
326 MX8MM_IOMUXC_SD2_DATA1_USDHC2_DATA1 0x1d0
327 MX8MM_IOMUXC_SD2_DATA2_USDHC2_DATA2 0x1d0
328 MX8MM_IOMUXC_SD2_DATA3_USDHC2_DATA3 0x1d0
334 MX8MM_IOMUXC_SD2_CLK_USDHC2_CLK 0x194
335 MX8MM_IOMUXC_SD2_CMD_USDHC2_CMD 0x1d4
336 MX8MM_IOMUXC_SD2_DATA0_USDHC2_DATA0 0x1d4
337 MX8MM_IOMUXC_SD2_DATA1_USDHC2_DATA1 0x1d4
338 MX8MM_IOMUXC_SD2_DATA2_USDHC2_DATA2 0x1d4
339 MX8MM_IOMUXC_SD2_DATA3_USDHC2_DATA3 0x1d4
345 MX8MM_IOMUXC_SD2_CLK_USDHC2_CLK 0x196
346 MX8MM_IOMUXC_SD2_CMD_USDHC2_CMD 0x1d6
347 MX8MM_IOMUXC_SD2_DATA0_USDHC2_DATA0 0x1d6
348 MX8MM_IOMUXC_SD2_DATA1_USDHC2_DATA1 0x1d6
349 MX8MM_IOMUXC_SD2_DATA2_USDHC2_DATA2 0x1d6
350 MX8MM_IOMUXC_SD2_DATA3_USDHC2_DATA3 0x1d6