Lines Matching +full:0 +full:x19
21 #clock-cells = <0>;
29 pinctrl-0 = <&pinctrl_gpio_led>;
50 pwms = <&pwm2 0 5000 0>;
56 pinctrl-0 = <&pinctrl_usb_eth2>;
66 pinctrl-0 = <&pinctrl_reg_usb1_vbus>;
84 pinctrl-0 = <&pinctrl_ecspi2>;
88 can@0 {
90 reg = <0>;
92 pinctrl-0 = <&pinctrl_can>;
107 pinctrl-0 = <&pinctrl_ecspi3>;
111 eeram@0 {
113 reg = <0>;
120 pinctrl-0 = <&pinctrl_enet>;
127 #size-cells = <0>;
129 ethphy: ethernet-phy@0 {
130 reg = <0>;
140 pinctrl-0 = <&pinctrl_gpio1>;
149 pinctrl-0 = <&pinctrl_gpio5>;
159 pinctrl-0 = <&pinctrl_i2c4>;
165 pinctrl-0 = <&pinctrl_pwm2>;
171 pinctrl-0 = <&pinctrl_uart1>;
178 pinctrl-0 = <&pinctrl_uart2>;
195 #size-cells = <0>;
202 #size-cells = <0>;
214 pinctrl-0 = <&pinctrl_usdhc2>;
226 MX8MM_IOMUXC_SAI3_RXFS_GPIO4_IO28 0x19
232 MX8MM_IOMUXC_ECSPI2_MISO_ECSPI2_MISO 0x82
233 MX8MM_IOMUXC_ECSPI2_MOSI_ECSPI2_MOSI 0x82
234 MX8MM_IOMUXC_ECSPI2_SCLK_ECSPI2_SCLK 0x82
235 MX8MM_IOMUXC_ECSPI2_SS0_GPIO5_IO13 0x19
241 MX8MM_IOMUXC_UART2_RXD_ECSPI3_MISO 0x82
242 MX8MM_IOMUXC_UART1_TXD_ECSPI3_MOSI 0x82
243 MX8MM_IOMUXC_UART1_RXD_ECSPI3_SCLK 0x82
244 MX8MM_IOMUXC_UART2_TXD_GPIO5_IO25 0x19
250 MX8MM_IOMUXC_ENET_MDC_ENET1_MDC 0x3
251 MX8MM_IOMUXC_ENET_MDIO_ENET1_MDIO 0x3
252 MX8MM_IOMUXC_ENET_TD3_ENET1_RGMII_TD3 0x1f
253 MX8MM_IOMUXC_ENET_TD2_ENET1_RGMII_TD2 0x1f
254 MX8MM_IOMUXC_ENET_TD1_ENET1_RGMII_TD1 0x1f
255 MX8MM_IOMUXC_ENET_TD0_ENET1_RGMII_TD0 0x1f
256 MX8MM_IOMUXC_ENET_RD3_ENET1_RGMII_RD3 0x91
257 MX8MM_IOMUXC_ENET_RD2_ENET1_RGMII_RD2 0x91
258 MX8MM_IOMUXC_ENET_RD1_ENET1_RGMII_RD1 0x91
259 MX8MM_IOMUXC_ENET_RD0_ENET1_RGMII_RD0 0x91
260 MX8MM_IOMUXC_ENET_TXC_ENET1_RGMII_TXC 0x1f
261 MX8MM_IOMUXC_ENET_RXC_ENET1_RGMII_RXC 0x91
262 MX8MM_IOMUXC_ENET_RX_CTL_ENET1_RGMII_RX_CTL 0x91
263 MX8MM_IOMUXC_ENET_TX_CTL_ENET1_RGMII_TX_CTL 0x1f
264 MX8MM_IOMUXC_GPIO1_IO01_GPIO1_IO1 0x19 /* PHY RST */
265 MX8MM_IOMUXC_GPIO1_IO05_GPIO1_IO5 0x19 /* ETH IRQ */
271 MX8MM_IOMUXC_GPIO1_IO12_GPIO1_IO12 0x19
272 MX8MM_IOMUXC_GPIO1_IO13_GPIO1_IO13 0x19
273 MX8MM_IOMUXC_GPIO1_IO14_GPIO1_IO14 0x19
279 MX8MM_IOMUXC_GPIO1_IO03_GPIO1_IO3 0x19
280 MX8MM_IOMUXC_GPIO1_IO07_GPIO1_IO7 0x19
281 MX8MM_IOMUXC_GPIO1_IO09_GPIO1_IO9 0x19
282 MX8MM_IOMUXC_GPIO1_IO11_GPIO1_IO11 0x19
283 MX8MM_IOMUXC_GPIO1_IO06_GPIO1_IO6 0x19
284 MX8MM_IOMUXC_GPIO1_IO08_GPIO1_IO8 0x19
285 MX8MM_IOMUXC_GPIO1_IO10_GPIO1_IO10 0x19
291 MX8MM_IOMUXC_SAI3_MCLK_GPIO5_IO2 0x19
297 MX8MM_IOMUXC_I2C4_SCL_I2C4_SCL 0x400001c3
298 MX8MM_IOMUXC_I2C4_SDA_I2C4_SDA 0x400001c3
304 MX8MM_IOMUXC_SPDIF_RX_PWM2_OUT 0x19
310 MX8MM_IOMUXC_SAI5_MCLK_GPIO3_IO25 0x19
316 MX8MM_IOMUXC_SAI2_RXC_UART1_DCE_RX 0x140
317 MX8MM_IOMUXC_SAI2_RXFS_UART1_DCE_TX 0x140
318 MX8MM_IOMUXC_SAI2_RXD0_UART1_DCE_RTS_B 0x140
319 MX8MM_IOMUXC_SAI2_TXFS_UART1_DCE_CTS_B 0x140
325 MX8MM_IOMUXC_SAI3_TXFS_UART2_DCE_RX 0x140
326 MX8MM_IOMUXC_SAI3_TXC_UART2_DCE_TX 0x140
327 MX8MM_IOMUXC_SAI3_RXD_UART2_DCE_RTS_B 0x140
328 MX8MM_IOMUXC_SAI3_RXC_UART2_DCE_CTS_B 0x140
334 MX8MM_IOMUXC_NAND_CE1_B_GPIO3_IO2 0x19
340 MX8MM_IOMUXC_SD2_CLK_USDHC2_CLK 0x190
341 MX8MM_IOMUXC_SD2_CMD_USDHC2_CMD 0x1d0
342 MX8MM_IOMUXC_SD2_DATA0_USDHC2_DATA0 0x1d0
343 MX8MM_IOMUXC_SD2_DATA1_USDHC2_DATA1 0x1d0
344 MX8MM_IOMUXC_SD2_DATA2_USDHC2_DATA2 0x1d0
345 MX8MM_IOMUXC_SD2_DATA3_USDHC2_DATA3 0x1d0
346 MX8MM_IOMUXC_SD2_CD_B_GPIO2_IO12 0x019
347 MX8MM_IOMUXC_GPIO1_IO04_USDHC2_VSELECT 0x1d0
353 MX8MM_IOMUXC_SD2_CLK_USDHC2_CLK 0x194
354 MX8MM_IOMUXC_SD2_CMD_USDHC2_CMD 0x1d4
355 MX8MM_IOMUXC_SD2_DATA0_USDHC2_DATA0 0x1d4
356 MX8MM_IOMUXC_SD2_DATA1_USDHC2_DATA1 0x1d4
357 MX8MM_IOMUXC_SD2_DATA2_USDHC2_DATA2 0x1d4
358 MX8MM_IOMUXC_SD2_DATA3_USDHC2_DATA3 0x1d4
359 MX8MM_IOMUXC_SD2_CD_B_GPIO2_IO12 0x019
360 MX8MM_IOMUXC_GPIO1_IO04_USDHC2_VSELECT 0x1d0
366 MX8MM_IOMUXC_SD2_CLK_USDHC2_CLK 0x196
367 MX8MM_IOMUXC_SD2_CMD_USDHC2_CMD 0x1d6
368 MX8MM_IOMUXC_SD2_DATA0_USDHC2_DATA0 0x1d6
369 MX8MM_IOMUXC_SD2_DATA1_USDHC2_DATA1 0x1d6
370 MX8MM_IOMUXC_SD2_DATA2_USDHC2_DATA2 0x1d6
371 MX8MM_IOMUXC_SD2_DATA3_USDHC2_DATA3 0x1d6
372 MX8MM_IOMUXC_SD2_CD_B_GPIO2_IO12 0x019
373 MX8MM_IOMUXC_GPIO1_IO04_USDHC2_VSELECT 0x1d0