Lines Matching refs:clocks

30 		clocks = <&spi0_lpcg 0>,
33 		assigned-clocks = <&clk IMX_SC_R_SPI_0 IMX_SC_PM_CLK_PER>;
46 		clocks = <&spi1_lpcg 0>,
49 		assigned-clocks = <&clk IMX_SC_R_SPI_1 IMX_SC_PM_CLK_PER>;
62 		clocks = <&spi2_lpcg 0>,
65 		assigned-clocks = <&clk IMX_SC_R_SPI_2 IMX_SC_PM_CLK_PER>;
78 		clocks = <&spi3_lpcg 0>,
81 		assigned-clocks = <&clk IMX_SC_R_SPI_3 IMX_SC_PM_CLK_PER>;
90 		clocks = <&uart0_lpcg IMX_LPCG_CLK_4>,
93 		assigned-clocks = <&clk IMX_SC_R_UART_0 IMX_SC_PM_CLK_PER>;
102 		clocks = <&uart1_lpcg IMX_LPCG_CLK_4>,
105 		assigned-clocks = <&clk IMX_SC_R_UART_1 IMX_SC_PM_CLK_PER>;
114 		clocks = <&uart2_lpcg IMX_LPCG_CLK_4>,
117 		assigned-clocks = <&clk IMX_SC_R_UART_2 IMX_SC_PM_CLK_PER>;
126 		clocks = <&uart3_lpcg IMX_LPCG_CLK_4>,
129 		assigned-clocks = <&clk IMX_SC_R_UART_3 IMX_SC_PM_CLK_PER>;
139 		clocks = <&clk IMX_SC_R_SPI_0 IMX_SC_PM_CLK_PER>,
151 		clocks = <&clk IMX_SC_R_SPI_1 IMX_SC_PM_CLK_PER>,
163 		clocks = <&clk IMX_SC_R_SPI_2 IMX_SC_PM_CLK_PER>,
175 		clocks = <&clk IMX_SC_R_SPI_3 IMX_SC_PM_CLK_PER>,
187 		clocks = <&clk IMX_SC_R_UART_0 IMX_SC_PM_CLK_PER>,
199 		clocks = <&clk IMX_SC_R_UART_1 IMX_SC_PM_CLK_PER>,
211 		clocks = <&clk IMX_SC_R_UART_2 IMX_SC_PM_CLK_PER>,
223 		clocks = <&clk IMX_SC_R_UART_3 IMX_SC_PM_CLK_PER>,
234 		clocks = <&i2c0_lpcg IMX_LPCG_CLK_0>,
237 		assigned-clocks = <&clk IMX_SC_R_I2C_0 IMX_SC_PM_CLK_PER>;
246 		clocks = <&i2c1_lpcg IMX_LPCG_CLK_0>,
249 		assigned-clocks = <&clk IMX_SC_R_I2C_1 IMX_SC_PM_CLK_PER>;
258 		clocks = <&i2c2_lpcg IMX_LPCG_CLK_0>,
261 		assigned-clocks = <&clk IMX_SC_R_I2C_2 IMX_SC_PM_CLK_PER>;
270 		clocks = <&i2c3_lpcg IMX_LPCG_CLK_0>,
273 		assigned-clocks = <&clk IMX_SC_R_I2C_3 IMX_SC_PM_CLK_PER>;
285 		clocks = <&adc0_lpcg 0>,
288 		assigned-clocks = <&clk IMX_SC_R_ADC_0 IMX_SC_PM_CLK_PER>;
300 		clocks = <&adc1_lpcg 0>,
303 		assigned-clocks = <&clk IMX_SC_R_ADC_1 IMX_SC_PM_CLK_PER>;
314 		clocks = <&can0_lpcg 1>,
317 		assigned-clocks = <&clk IMX_SC_R_CAN_0 IMX_SC_PM_CLK_PER>;
335 		clocks = <&can0_lpcg 1>,
338 		assigned-clocks = <&clk IMX_SC_R_CAN_0 IMX_SC_PM_CLK_PER>;
356 		clocks = <&can0_lpcg 1>,
359 		assigned-clocks = <&clk IMX_SC_R_CAN_0 IMX_SC_PM_CLK_PER>;
372 		clocks = <&clk IMX_SC_R_I2C_0 IMX_SC_PM_CLK_PER>,
384 		clocks = <&clk IMX_SC_R_I2C_1 IMX_SC_PM_CLK_PER>,
396 		clocks = <&clk IMX_SC_R_I2C_2 IMX_SC_PM_CLK_PER>,
408 		clocks = <&clk IMX_SC_R_I2C_3 IMX_SC_PM_CLK_PER>,
420 		clocks = <&clk IMX_SC_R_ADC_0 IMX_SC_PM_CLK_PER>,
432 		clocks = <&clk IMX_SC_R_ADC_1 IMX_SC_PM_CLK_PER>,
444 		clocks = <&clk IMX_SC_R_CAN_0 IMX_SC_PM_CLK_PER>,