Lines Matching +full:min +full:- +full:residency +full:- +full:us
1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Device Tree Include file for Freescale Layerscape-2080A family SoC.
5 * Copyright 2014-2016 Freescale Semiconductor, Inc.
12 #include <dt-bindings/clock/fsl,qoriq-clockgen.h>
13 #include "fsl-ls208xa.dtsi"
18 compatible = "arm,cortex-a57";
21 cpu-idle-states = <&CPU_PW20>;
22 next-level-cache = <&cluster0_l2>;
23 #cooling-cells = <2>;
28 compatible = "arm,cortex-a57";
31 cpu-idle-states = <&CPU_PW20>;
32 next-level-cache = <&cluster0_l2>;
33 #cooling-cells = <2>;
38 compatible = "arm,cortex-a57";
41 cpu-idle-states = <&CPU_PW20>;
42 next-level-cache = <&cluster1_l2>;
43 #cooling-cells = <2>;
48 compatible = "arm,cortex-a57";
51 cpu-idle-states = <&CPU_PW20>;
52 next-level-cache = <&cluster1_l2>;
53 #cooling-cells = <2>;
58 compatible = "arm,cortex-a57";
61 cpu-idle-states = <&CPU_PW20>;
62 next-level-cache = <&cluster2_l2>;
63 #cooling-cells = <2>;
68 compatible = "arm,cortex-a57";
71 cpu-idle-states = <&CPU_PW20>;
72 next-level-cache = <&cluster2_l2>;
73 #cooling-cells = <2>;
78 compatible = "arm,cortex-a57";
81 next-level-cache = <&cluster3_l2>;
82 cpu-idle-states = <&CPU_PW20>;
83 #cooling-cells = <2>;
88 compatible = "arm,cortex-a57";
91 cpu-idle-states = <&CPU_PW20>;
92 next-level-cache = <&cluster3_l2>;
93 #cooling-cells = <2>;
96 cluster0_l2: l2-cache0 {
98 cache-level = <2>;
99 cache-unified;
102 cluster1_l2: l2-cache1 {
104 cache-level = <2>;
105 cache-unified;
108 cluster2_l2: l2-cache2 {
110 cache-level = <2>;
111 cache-unified;
114 cluster3_l2: l2-cache3 {
116 cache-level = <2>;
117 cache-unified;
120 CPU_PW20: cpu-pw20 {
121 compatible = "arm,idle-state";
122 idle-state-name = "PW20";
123 arm,psci-suspend-param = <0x00010000>;
124 entry-latency-us = <2000>;
125 exit-latency-us = <2000>;
126 min-residency-us = <6000>;
135 0x82000000 0x0 0x40000000 0x10 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
143 0x82000000 0x0 0x40000000 0x12 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
151 0x82000000 0x0 0x40000000 0x14 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
159 0x82000000 0x0 0x40000000 0x16 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
163 fsl,erratum-a008585;