Lines Matching +full:reg +full:- +full:names
1 // SPDX-License-Identifier: GPL-2.0
13 #include <dt-bindings/clock/exynos850.h>
14 #include <dt-bindings/interrupt-controller/arm-gic.h>
15 #include <dt-bindings/soc/samsung,exynos-usi.h>
20 #address-cells = <2>;
21 #size-cells = <1>;
23 interrupt-parent = <&gic>;
34 arm-pmu {
35 compatible = "arm,cortex-a55-pmu";
44 interrupt-affinity = <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>,
49 oscclk: clock-oscclk {
50 compatible = "fixed-clock";
51 clock-output-names = "oscclk";
52 #clock-cells = <0>;
56 #address-cells = <1>;
57 #size-cells = <0>;
59 cpu-map {
93 compatible = "arm,cortex-a55";
94 reg = <0x0>;
95 enable-method = "psci";
99 compatible = "arm,cortex-a55";
100 reg = <0x1>;
101 enable-method = "psci";
105 compatible = "arm,cortex-a55";
106 reg = <0x2>;
107 enable-method = "psci";
111 compatible = "arm,cortex-a55";
112 reg = <0x3>;
113 enable-method = "psci";
117 compatible = "arm,cortex-a55";
118 reg = <0x100>;
119 enable-method = "psci";
123 compatible = "arm,cortex-a55";
124 reg = <0x101>;
125 enable-method = "psci";
129 compatible = "arm,cortex-a55";
130 reg = <0x102>;
131 enable-method = "psci";
135 compatible = "arm,cortex-a55";
136 reg = <0x103>;
137 enable-method = "psci";
142 compatible = "arm,psci-1.0";
147 compatible = "arm,armv8-timer";
157 compatible = "simple-bus";
158 #address-cells = <1>;
159 #size-cells = <1>;
163 compatible = "samsung,exynos850-chipid";
164 reg = <0x10000000 0x100>;
168 compatible = "samsung,exynos850-mct",
169 "samsung,exynos4210-mct";
170 reg = <0x10040000 0x800>;
184 clock-names = "fin_pll", "mct";
187 gic: interrupt-controller@12a01000 {
188 compatible = "arm,gic-400";
189 #interrupt-cells = <3>;
190 #address-cells = <0>;
191 reg = <0x12a01000 0x1000>,
195 interrupt-controller;
200 pmu_system_controller: system-controller@11860000 {
201 compatible = "samsung,exynos850-pmu", "syscon";
202 reg = <0x11860000 0x10000>;
204 reboot: syscon-reboot {
205 compatible = "syscon-reboot";
214 compatible = "samsung,exynos850-wdt";
215 reg = <0x10050000 0x100>;
218 clock-names = "watchdog", "watchdog_src";
219 samsung,syscon-phandle = <&pmu_system_controller>;
220 samsung,cluster-index = <0>;
225 compatible = "samsung,exynos850-wdt";
226 reg = <0x10060000 0x100>;
229 clock-names = "watchdog", "watchdog_src";
230 samsung,syscon-phandle = <&pmu_system_controller>;
231 samsung,cluster-index = <1>;
235 cmu_peri: clock-controller@10030000 {
236 compatible = "samsung,exynos850-cmu-peri";
237 reg = <0x10030000 0x8000>;
238 #clock-cells = <1>;
243 clock-names = "oscclk", "dout_peri_bus",
247 cmu_g3d: clock-controller@11400000 {
248 compatible = "samsung,exynos850-cmu-g3d";
249 reg = <0x11400000 0x8000>;
250 #clock-cells = <1>;
253 clock-names = "oscclk", "dout_g3d_switch";
256 cmu_apm: clock-controller@11800000 {
257 compatible = "samsung,exynos850-cmu-apm";
258 reg = <0x11800000 0x8000>;
259 #clock-cells = <1>;
262 clock-names = "oscclk", "dout_clkcmu_apm_bus";
265 cmu_cmgp: clock-controller@11c00000 {
266 compatible = "samsung,exynos850-cmu-cmgp";
267 reg = <0x11c00000 0x8000>;
268 #clock-cells = <1>;
271 clock-names = "oscclk", "gout_clkcmu_cmgp_bus";
274 cmu_core: clock-controller@12000000 {
275 compatible = "samsung,exynos850-cmu-core";
276 reg = <0x12000000 0x8000>;
277 #clock-cells = <1>;
283 clock-names = "oscclk", "dout_core_bus",
288 cmu_top: clock-controller@120e0000 {
289 compatible = "samsung,exynos850-cmu-top";
290 reg = <0x120e0000 0x8000>;
291 #clock-cells = <1>;
294 clock-names = "oscclk";
297 cmu_mfcmscl: clock-controller@12c00000 {
298 compatible = "samsung,exynos850-cmu-mfcmscl";
299 reg = <0x12c00000 0x8000>;
300 #clock-cells = <1>;
307 clock-names = "oscclk", "dout_mfcmscl_mfc",
312 cmu_dpu: clock-controller@13000000 {
313 compatible = "samsung,exynos850-cmu-dpu";
314 reg = <0x13000000 0x8000>;
315 #clock-cells = <1>;
318 clock-names = "oscclk", "dout_dpu";
321 cmu_hsi: clock-controller@13400000 {
322 compatible = "samsung,exynos850-cmu-hsi";
323 reg = <0x13400000 0x8000>;
324 #clock-cells = <1>;
330 clock-names = "oscclk", "dout_hsi_bus",
334 cmu_is: clock-controller@14500000 {
335 compatible = "samsung,exynos850-cmu-is";
336 reg = <0x14500000 0x8000>;
337 #clock-cells = <1>;
344 clock-names = "oscclk", "dout_is_bus", "dout_is_itp",
348 cmu_aud: clock-controller@14a00000 {
349 compatible = "samsung,exynos850-cmu-aud";
350 reg = <0x14a00000 0x8000>;
351 #clock-cells = <1>;
354 clock-names = "oscclk", "dout_aud";
358 compatible = "samsung,exynos850-pinctrl";
359 reg = <0x11850000 0x1000>;
361 wakeup-interrupt-controller {
362 compatible = "samsung,exynos850-wakeup-eint";
367 compatible = "samsung,exynos850-pinctrl";
368 reg = <0x11c30000 0x1000>;
370 wakeup-interrupt-controller {
371 compatible = "samsung,exynos850-wakeup-eint";
376 compatible = "samsung,exynos850-pinctrl";
377 reg = <0x12070000 0x1000>;
382 compatible = "samsung,exynos850-pinctrl";
383 reg = <0x13430000 0x1000>;
388 compatible = "samsung,exynos850-pinctrl";
389 reg = <0x139b0000 0x1000>;
394 compatible = "samsung,exynos850-pinctrl";
395 reg = <0x14a60000 0x1000>;
399 compatible = "samsung,s3c6410-rtc";
400 reg = <0x11a30000 0x100>;
404 clock-names = "rtc";
409 compatible = "samsung,exynos7-dw-mshc-smu";
410 reg = <0x12100000 0x2000>;
412 #address-cells = <1>;
413 #size-cells = <0>;
416 clock-names = "biu", "ciu";
417 fifo-depth = <0x40>;
422 compatible = "samsung,s3c2440-i2c";
423 reg = <0x13830000 0x100>;
425 #address-cells = <1>;
426 #size-cells = <0>;
427 pinctrl-names = "default";
428 pinctrl-0 = <&i2c0_pins>;
430 clock-names = "i2c";
435 compatible = "samsung,s3c2440-i2c";
436 reg = <0x13840000 0x100>;
438 #address-cells = <1>;
439 #size-cells = <0>;
440 pinctrl-names = "default";
441 pinctrl-0 = <&i2c1_pins>;
443 clock-names = "i2c";
448 compatible = "samsung,s3c2440-i2c";
449 reg = <0x13850000 0x100>;
451 #address-cells = <1>;
452 #size-cells = <0>;
453 pinctrl-names = "default";
454 pinctrl-0 = <&i2c2_pins>;
456 clock-names = "i2c";
461 compatible = "samsung,s3c2440-i2c";
462 reg = <0x13860000 0x100>;
464 #address-cells = <1>;
465 #size-cells = <0>;
466 pinctrl-names = "default";
467 pinctrl-0 = <&i2c3_pins>;
469 clock-names = "i2c";
474 compatible = "samsung,s3c2440-i2c";
475 reg = <0x13870000 0x100>;
477 #address-cells = <1>;
478 #size-cells = <0>;
479 pinctrl-names = "default";
480 pinctrl-0 = <&i2c4_pins>;
482 clock-names = "i2c";
488 compatible = "samsung,s3c2440-i2c";
489 reg = <0x13880000 0x100>;
491 #address-cells = <1>;
492 #size-cells = <0>;
493 pinctrl-names = "default";
494 pinctrl-0 = <&i2c5_pins>;
496 clock-names = "i2c";
502 compatible = "samsung,s3c2440-i2c";
503 reg = <0x13890000 0x100>;
505 #address-cells = <1>;
506 #size-cells = <0>;
507 pinctrl-names = "default";
508 pinctrl-0 = <&i2c6_pins>;
510 clock-names = "i2c";
515 compatible = "samsung,exynos-sysmmu";
516 reg = <0x12c50000 0x9000>;
518 clock-names = "sysmmu";
520 #iommu-cells = <0>;
524 compatible = "samsung,exynos-sysmmu";
525 reg = <0x130c0000 0x9000>;
527 clock-names = "sysmmu";
529 #iommu-cells = <0>;
533 compatible = "samsung,exynos-sysmmu";
534 reg = <0x14550000 0x9000>;
536 clock-names = "sysmmu";
538 #iommu-cells = <0>;
542 compatible = "samsung,exynos-sysmmu";
543 reg = <0x14570000 0x9000>;
545 clock-names = "sysmmu";
547 #iommu-cells = <0>;
551 compatible = "samsung,exynos-sysmmu";
552 reg = <0x14850000 0x9000>;
554 clock-names = "sysmmu";
556 #iommu-cells = <0>;
560 compatible = "samsung,exynos850-peri-sysreg",
561 "samsung,exynos850-sysreg", "syscon";
562 reg = <0x10020000 0x10000>;
567 compatible = "samsung,exynos850-cmgp-sysreg",
568 "samsung,exynos850-sysreg", "syscon";
569 reg = <0x11c20000 0x10000>;
574 compatible = "samsung,exynos850-usi";
575 reg = <0x138200c0 0x20>;
578 #address-cells = <1>;
579 #size-cells = <1>;
583 clock-names = "pclk", "ipclk";
587 compatible = "samsung,exynos850-uart";
588 reg = <0x13820000 0xc0>;
590 pinctrl-names = "default";
591 pinctrl-0 = <&uart0_pins>;
594 clock-names = "uart", "clk_uart_baud0";
600 compatible = "samsung,exynos850-usi";
601 reg = <0x138a00c0 0x20>;
604 #address-cells = <1>;
605 #size-cells = <1>;
609 clock-names = "pclk", "ipclk";
613 compatible = "samsung,exynosautov9-hsi2c";
614 reg = <0x138a0000 0xc0>;
616 #address-cells = <1>;
617 #size-cells = <0>;
618 pinctrl-names = "default";
619 pinctrl-0 = <&hsi2c0_pins>;
622 clock-names = "hsi2c", "hsi2c_pclk";
628 compatible = "samsung,exynos850-usi";
629 reg = <0x138b00c0 0x20>;
632 #address-cells = <1>;
633 #size-cells = <1>;
637 clock-names = "pclk", "ipclk";
641 compatible = "samsung,exynosautov9-hsi2c";
642 reg = <0x138b0000 0xc0>;
644 #address-cells = <1>;
645 #size-cells = <0>;
646 pinctrl-names = "default";
647 pinctrl-0 = <&hsi2c1_pins>;
650 clock-names = "hsi2c", "hsi2c_pclk";
656 compatible = "samsung,exynos850-usi";
657 reg = <0x138c00c0 0x20>;
660 #address-cells = <1>;
661 #size-cells = <1>;
665 clock-names = "pclk", "ipclk";
669 compatible = "samsung,exynosautov9-hsi2c";
670 reg = <0x138c0000 0xc0>;
672 #address-cells = <1>;
673 #size-cells = <0>;
674 pinctrl-names = "default";
675 pinctrl-0 = <&hsi2c2_pins>;
678 clock-names = "hsi2c", "hsi2c_pclk";
684 compatible = "samsung,exynos850-usi";
685 reg = <0x139400c0 0x20>;
688 #address-cells = <1>;
689 #size-cells = <1>;
693 clock-names = "pclk", "ipclk";
698 compatible = "samsung,exynos850-usi";
699 reg = <0x11d000c0 0x20>;
702 #address-cells = <1>;
703 #size-cells = <1>;
707 clock-names = "pclk", "ipclk";
711 compatible = "samsung,exynosautov9-hsi2c";
712 reg = <0x11d00000 0xc0>;
714 #address-cells = <1>;
715 #size-cells = <0>;
716 pinctrl-names = "default";
717 pinctrl-0 = <&hsi2c3_pins>;
720 clock-names = "hsi2c", "hsi2c_pclk";
725 compatible = "samsung,exynos850-uart";
726 reg = <0x11d00000 0xc0>;
728 pinctrl-names = "default";
729 pinctrl-0 = <&uart1_single_pins>;
732 clock-names = "uart", "clk_uart_baud0";
738 compatible = "samsung,exynos850-usi";
739 reg = <0x11d200c0 0x20>;
742 #address-cells = <1>;
743 #size-cells = <1>;
747 clock-names = "pclk", "ipclk";
751 compatible = "samsung,exynosautov9-hsi2c";
752 reg = <0x11d20000 0xc0>;
754 #address-cells = <1>;
755 #size-cells = <0>;
756 pinctrl-names = "default";
757 pinctrl-0 = <&hsi2c4_pins>;
760 clock-names = "hsi2c", "hsi2c_pclk";
765 compatible = "samsung,exynos850-uart";
766 reg = <0x11d20000 0xc0>;
768 pinctrl-names = "default";
769 pinctrl-0 = <&uart2_single_pins>;
772 clock-names = "uart", "clk_uart_baud0";
779 #include "exynos850-pinctrl.dtsi"