Lines Matching +full:exynos7885 +full:- +full:cmu +full:- +full:peri

1 // SPDX-License-Identifier: GPL-2.0
3 * Samsung Exynos7885 SoC device tree source
9 #include <dt-bindings/clock/exynos7885.h>
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
13 compatible = "samsung,exynos7885";
14 #address-cells = <2>;
15 #size-cells = <1>;
17 interrupt-parent = <&gic>;
26 arm-a53-pmu {
27 compatible = "arm,cortex-a53-pmu";
34 interrupt-affinity = <&cpu0>,
42 arm-a73-pmu {
43 compatible = "arm,cortex-a73-pmu";
46 interrupt-affinity = <&cpu6>,
51 #address-cells = <1>;
52 #size-cells = <0>;
54 cpu-map {
88 compatible = "arm,cortex-a53";
90 enable-method = "psci";
95 compatible = "arm,cortex-a53";
97 enable-method = "psci";
102 compatible = "arm,cortex-a53";
104 enable-method = "psci";
109 compatible = "arm,cortex-a53";
111 enable-method = "psci";
116 compatible = "arm,cortex-a53";
118 enable-method = "psci";
123 compatible = "arm,cortex-a53";
125 enable-method = "psci";
130 compatible = "arm,cortex-a73";
132 enable-method = "psci";
137 compatible = "arm,cortex-a73";
139 enable-method = "psci";
152 compatible = "arm,armv8-timer";
160 fixed-rate-clocks {
161 oscclk: osc-clock {
162 compatible = "fixed-clock";
163 #clock-cells = <0>;
164 clock-output-names = "oscclk";
169 compatible = "simple-bus";
170 #address-cells = <1>;
171 #size-cells = <1>;
175 compatible = "samsung,exynos850-chipid";
179 gic: interrupt-controller@12301000 {
180 compatible = "arm,gic-400";
181 #interrupt-cells = <3>;
182 #address-cells = <0>;
183 interrupt-controller;
192 cmu_peri: clock-controller@10010000 {
193 compatible = "samsung,exynos7885-cmu-peri";
195 #clock-cells = <1>;
207 clock-names = "oscclk",
219 cmu_core: clock-controller@12000000 {
220 compatible = "samsung,exynos7885-cmu-core";
222 #clock-cells = <1>;
228 clock-names = "oscclk",
234 cmu_top: clock-controller@12060000 {
235 compatible = "samsung,exynos7885-cmu-top";
237 #clock-cells = <1>;
240 clock-names = "oscclk";
243 cmu_fsys: clock-controller@13400000 {
244 compatible = "samsung,exynos7885-cmu-fsys";
246 #clock-cells = <1>;
254 clock-names = "oscclk",
263 compatible = "samsung,exynos7885-pinctrl";
266 wakeup-interrupt-controller {
267 compatible = "samsung,exynos7-wakeup-eint";
268 interrupt-parent = <&gic>;
274 compatible = "samsung,exynos7885-pinctrl";
280 compatible = "samsung,exynos7885-pinctrl";
286 compatible = "samsung,exynos7885-pinctrl";
291 pmu_system_controller: system-controller@11c80000 {
292 compatible = "samsung,exynos7-pmu", "syscon";
297 compatible = "samsung,exynos7-dw-mshc-smu";
300 #address-cells = <1>;
301 #size-cells = <0>;
304 clock-names = "biu", "ciu";
305 fifo-depth = <0x40>;
310 compatible = "samsung,exynos5433-uart";
313 pinctrl-names = "default";
314 pinctrl-0 = <&uart0_bus>;
317 clock-names = "uart", "clk_uart_baud0";
318 samsung,uart-fifosize = <64>;
323 compatible = "samsung,exynos5433-uart";
326 pinctrl-names = "default";
327 pinctrl-0 = <&uart1_bus>;
330 clock-names = "uart", "clk_uart_baud0";
331 samsung,uart-fifosize = <256>;
336 compatible = "samsung,exynos5433-uart";
339 pinctrl-names = "default";
340 pinctrl-0 = <&uart2_bus>;
343 clock-names = "uart", "clk_uart_baud0";
344 samsung,uart-fifosize = <256>;
349 compatible = "samsung,s3c2440-i2c";
352 #address-cells = <1>;
353 #size-cells = <0>;
354 pinctrl-names = "default";
355 pinctrl-0 = <&i2c0_bus>;
357 clock-names = "i2c";
362 compatible = "samsung,s3c2440-i2c";
365 #address-cells = <1>;
366 #size-cells = <0>;
367 pinctrl-names = "default";
368 pinctrl-0 = <&i2c1_bus>;
370 clock-names = "i2c";
375 compatible = "samsung,s3c2440-i2c";
378 #address-cells = <1>;
379 #size-cells = <0>;
380 pinctrl-names = "default";
381 pinctrl-0 = <&i2c2_bus>;
383 clock-names = "i2c";
388 compatible = "samsung,s3c2440-i2c";
391 #address-cells = <1>;
392 #size-cells = <0>;
393 pinctrl-names = "default";
394 pinctrl-0 = <&i2c3_bus>;
396 clock-names = "i2c";
401 compatible = "samsung,s3c2440-i2c";
404 #address-cells = <1>;
405 #size-cells = <0>;
406 pinctrl-names = "default";
407 pinctrl-0 = <&i2c4_bus>;
409 clock-names = "i2c";
414 compatible = "samsung,s3c2440-i2c";
417 #address-cells = <1>;
418 #size-cells = <0>;
419 pinctrl-names = "default";
420 pinctrl-0 = <&i2c5_bus>;
422 clock-names = "i2c";
427 compatible = "samsung,s3c2440-i2c";
430 #address-cells = <1>;
431 #size-cells = <0>;
432 pinctrl-names = "default";
433 pinctrl-0 = <&i2c6_bus>;
435 clock-names = "i2c";
440 compatible = "samsung,s3c2440-i2c";
443 #address-cells = <1>;
444 #size-cells = <0>;
445 pinctrl-names = "default";
446 pinctrl-0 = <&i2c7_bus>;
448 clock-names = "i2c";
454 #include "exynos7885-pinctrl.dtsi"
455 #include "arm/samsung/exynos-syscon-restart.dtsi"