Lines Matching +full:exynos5433 +full:- +full:lpass
1 // SPDX-License-Identifier: GPL-2.0
3 * Samsung's Exynos5433 SoC device tree source
7 * Samsung's Exynos5433 SoC device nodes are listed in this file.
8 * Exynos5433 based board files can include this file and provide
12 * Exynos5433 SoC. As device tree coverage for Exynos5433 increases,
16 #include <dt-bindings/clock/exynos5433.h>
17 #include <dt-bindings/interrupt-controller/arm-gic.h>
20 compatible = "samsung,exynos5433";
21 #address-cells = <2>;
22 #size-cells = <2>;
24 interrupt-parent = <&gic>;
26 arm-a53-pmu {
27 compatible = "arm,cortex-a53-pmu";
32 interrupt-affinity = <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>;
35 arm-a57-pmu {
36 compatible = "arm,cortex-a57-pmu";
41 interrupt-affinity = <&cpu4>, <&cpu5>, <&cpu6>, <&cpu7>;
46 compatible = "fixed-clock";
47 clock-output-names = "oscclk";
48 #clock-cells = <0>;
52 #address-cells = <1>;
53 #size-cells = <0>;
55 cpu-map {
89 compatible = "arm,cortex-a53";
90 enable-method = "psci";
93 clock-names = "apolloclk";
94 operating-points-v2 = <&cluster_a53_opp_table>;
95 #cooling-cells = <2>;
96 i-cache-size = <0x8000>;
97 i-cache-line-size = <64>;
98 i-cache-sets = <256>;
99 d-cache-size = <0x8000>;
100 d-cache-line-size = <64>;
101 d-cache-sets = <128>;
102 next-level-cache = <&cluster_a53_l2>;
107 compatible = "arm,cortex-a53";
108 enable-method = "psci";
110 operating-points-v2 = <&cluster_a53_opp_table>;
111 #cooling-cells = <2>;
112 i-cache-size = <0x8000>;
113 i-cache-line-size = <64>;
114 i-cache-sets = <256>;
115 d-cache-size = <0x8000>;
116 d-cache-line-size = <64>;
117 d-cache-sets = <128>;
118 next-level-cache = <&cluster_a53_l2>;
123 compatible = "arm,cortex-a53";
124 enable-method = "psci";
126 operating-points-v2 = <&cluster_a53_opp_table>;
127 #cooling-cells = <2>;
128 i-cache-size = <0x8000>;
129 i-cache-line-size = <64>;
130 i-cache-sets = <256>;
131 d-cache-size = <0x8000>;
132 d-cache-line-size = <64>;
133 d-cache-sets = <128>;
134 next-level-cache = <&cluster_a53_l2>;
139 compatible = "arm,cortex-a53";
140 enable-method = "psci";
142 operating-points-v2 = <&cluster_a53_opp_table>;
143 #cooling-cells = <2>;
144 i-cache-size = <0x8000>;
145 i-cache-line-size = <64>;
146 i-cache-sets = <256>;
147 d-cache-size = <0x8000>;
148 d-cache-line-size = <64>;
149 d-cache-sets = <128>;
150 next-level-cache = <&cluster_a53_l2>;
155 compatible = "arm,cortex-a57";
156 enable-method = "psci";
159 clock-names = "atlasclk";
160 operating-points-v2 = <&cluster_a57_opp_table>;
161 #cooling-cells = <2>;
162 i-cache-size = <0xc000>;
163 i-cache-line-size = <64>;
164 i-cache-sets = <256>;
165 d-cache-size = <0x8000>;
166 d-cache-line-size = <64>;
167 d-cache-sets = <256>;
168 next-level-cache = <&cluster_a57_l2>;
173 compatible = "arm,cortex-a57";
174 enable-method = "psci";
176 operating-points-v2 = <&cluster_a57_opp_table>;
177 #cooling-cells = <2>;
178 i-cache-size = <0xc000>;
179 i-cache-line-size = <64>;
180 i-cache-sets = <256>;
181 d-cache-size = <0x8000>;
182 d-cache-line-size = <64>;
183 d-cache-sets = <256>;
184 next-level-cache = <&cluster_a57_l2>;
189 compatible = "arm,cortex-a57";
190 enable-method = "psci";
192 operating-points-v2 = <&cluster_a57_opp_table>;
193 #cooling-cells = <2>;
194 i-cache-size = <0xc000>;
195 i-cache-line-size = <64>;
196 i-cache-sets = <256>;
197 d-cache-size = <0x8000>;
198 d-cache-line-size = <64>;
199 d-cache-sets = <256>;
200 next-level-cache = <&cluster_a57_l2>;
205 compatible = "arm,cortex-a57";
206 enable-method = "psci";
208 operating-points-v2 = <&cluster_a57_opp_table>;
209 #cooling-cells = <2>;
210 i-cache-size = <0xc000>;
211 i-cache-line-size = <64>;
212 i-cache-sets = <256>;
213 d-cache-size = <0x8000>;
214 d-cache-line-size = <64>;
215 d-cache-sets = <256>;
216 next-level-cache = <&cluster_a57_l2>;
219 cluster_a57_l2: l2-cache0 {
221 cache-level = <2>;
222 cache-unified;
223 cache-size = <0x200000>;
224 cache-line-size = <64>;
225 cache-sets = <2048>;
228 cluster_a53_l2: l2-cache1 {
230 cache-level = <2>;
231 cache-unified;
232 cache-size = <0x40000>;
233 cache-line-size = <64>;
234 cache-sets = <256>;
238 cluster_a53_opp_table: opp-table-0 {
239 compatible = "operating-points-v2";
240 opp-shared;
242 opp-400000000 {
243 opp-hz = /bits/ 64 <400000000>;
244 opp-microvolt = <900000>;
246 opp-500000000 {
247 opp-hz = /bits/ 64 <500000000>;
248 opp-microvolt = <925000>;
250 opp-600000000 {
251 opp-hz = /bits/ 64 <600000000>;
252 opp-microvolt = <950000>;
254 opp-700000000 {
255 opp-hz = /bits/ 64 <700000000>;
256 opp-microvolt = <975000>;
258 opp-800000000 {
259 opp-hz = /bits/ 64 <800000000>;
260 opp-microvolt = <1000000>;
262 opp-900000000 {
263 opp-hz = /bits/ 64 <900000000>;
264 opp-microvolt = <1050000>;
266 opp-1000000000 {
267 opp-hz = /bits/ 64 <1000000000>;
268 opp-microvolt = <1075000>;
270 opp-1100000000 {
271 opp-hz = /bits/ 64 <1100000000>;
272 opp-microvolt = <1112500>;
274 opp-1200000000 {
275 opp-hz = /bits/ 64 <1200000000>;
276 opp-microvolt = <1112500>;
278 opp-1300000000 {
279 opp-hz = /bits/ 64 <1300000000>;
280 opp-microvolt = <1150000>;
284 cluster_a57_opp_table: opp-table-1 {
285 compatible = "operating-points-v2";
286 opp-shared;
288 opp-500000000 {
289 opp-hz = /bits/ 64 <500000000>;
290 opp-microvolt = <900000>;
292 opp-600000000 {
293 opp-hz = /bits/ 64 <600000000>;
294 opp-microvolt = <900000>;
296 opp-700000000 {
297 opp-hz = /bits/ 64 <700000000>;
298 opp-microvolt = <912500>;
300 opp-800000000 {
301 opp-hz = /bits/ 64 <800000000>;
302 opp-microvolt = <912500>;
304 opp-900000000 {
305 opp-hz = /bits/ 64 <900000000>;
306 opp-microvolt = <937500>;
308 opp-1000000000 {
309 opp-hz = /bits/ 64 <1000000000>;
310 opp-microvolt = <975000>;
312 opp-1100000000 {
313 opp-hz = /bits/ 64 <1100000000>;
314 opp-microvolt = <1012500>;
316 opp-1200000000 {
317 opp-hz = /bits/ 64 <1200000000>;
318 opp-microvolt = <1037500>;
320 opp-1300000000 {
321 opp-hz = /bits/ 64 <1300000000>;
322 opp-microvolt = <1062500>;
324 opp-1400000000 {
325 opp-hz = /bits/ 64 <1400000000>;
326 opp-microvolt = <1087500>;
328 opp-1500000000 {
329 opp-hz = /bits/ 64 <1500000000>;
330 opp-microvolt = <1125000>;
332 opp-1600000000 {
333 opp-hz = /bits/ 64 <1600000000>;
334 opp-microvolt = <1137500>;
336 opp-1700000000 {
337 opp-hz = /bits/ 64 <1700000000>;
338 opp-microvolt = <1175000>;
340 opp-1800000000 {
341 opp-hz = /bits/ 64 <1800000000>;
342 opp-microvolt = <1212500>;
344 opp-1900000000 {
345 opp-hz = /bits/ 64 <1900000000>;
346 opp-microvolt = <1262500>;
358 compatible = "simple-bus";
359 #address-cells = <1>;
360 #size-cells = <1>;
364 compatible = "samsung,exynos4210-chipid";
368 cmu_top: clock-controller@10030000 {
369 compatible = "samsung,exynos5433-cmu-top";
371 #clock-cells = <1>;
373 clock-names = "oscclk",
383 cmu_cpif: clock-controller@10fc0000 {
384 compatible = "samsung,exynos5433-cmu-cpif";
386 #clock-cells = <1>;
388 clock-names = "oscclk";
392 cmu_mif: clock-controller@105b0000 {
393 compatible = "samsung,exynos5433-cmu-mif";
395 #clock-cells = <1>;
397 clock-names = "oscclk",
403 cmu_peric: clock-controller@14c80000 {
404 compatible = "samsung,exynos5433-cmu-peric";
406 #clock-cells = <1>;
409 cmu_peris: clock-controller@10040000 {
410 compatible = "samsung,exynos5433-cmu-peris";
412 #clock-cells = <1>;
415 cmu_fsys: clock-controller@156e0000 {
416 compatible = "samsung,exynos5433-cmu-fsys";
418 #clock-cells = <1>;
420 clock-names = "oscclk",
442 cmu_g2d: clock-controller@12460000 {
443 compatible = "samsung,exynos5433-cmu-g2d";
445 #clock-cells = <1>;
447 clock-names = "oscclk",
453 power-domains = <&pd_g2d>;
456 cmu_disp: clock-controller@13b90000 {
457 compatible = "samsung,exynos5433-cmu-disp";
459 #clock-cells = <1>;
461 clock-names = "oscclk",
479 power-domains = <&pd_disp>;
482 cmu_aud: clock-controller@114c0000 {
483 compatible = "samsung,exynos5433-cmu-aud";
485 #clock-cells = <1>;
486 clock-names = "oscclk", "fout_aud_pll";
488 power-domains = <&pd_aud>;
491 cmu_bus0: clock-controller@13600000 {
492 compatible = "samsung,exynos5433-cmu-bus0";
494 #clock-cells = <1>;
496 clock-names = "aclk_bus0_400";
500 cmu_bus1: clock-controller@14800000 {
501 compatible = "samsung,exynos5433-cmu-bus1";
503 #clock-cells = <1>;
505 clock-names = "aclk_bus1_400";
509 cmu_bus2: clock-controller@13400000 {
510 compatible = "samsung,exynos5433-cmu-bus2";
512 #clock-cells = <1>;
514 clock-names = "oscclk", "aclk_bus2_400";
518 cmu_g3d: clock-controller@14aa0000 {
519 compatible = "samsung,exynos5433-cmu-g3d";
521 #clock-cells = <1>;
523 clock-names = "oscclk", "aclk_g3d_400";
525 power-domains = <&pd_g3d>;
528 cmu_gscl: clock-controller@13cf0000 {
529 compatible = "samsung,exynos5433-cmu-gscl";
531 #clock-cells = <1>;
533 clock-names = "oscclk",
539 power-domains = <&pd_gscl>;
542 cmu_apollo: clock-controller@11900000 {
543 compatible = "samsung,exynos5433-cmu-apollo";
545 #clock-cells = <1>;
547 clock-names = "oscclk", "sclk_bus_pll_apollo";
551 cmu_atlas: clock-controller@11800000 {
552 compatible = "samsung,exynos5433-cmu-atlas";
554 #clock-cells = <1>;
556 clock-names = "oscclk", "sclk_bus_pll_atlas";
560 cmu_mscl: clock-controller@150d0000 {
561 compatible = "samsung,exynos5433-cmu-mscl";
563 #clock-cells = <1>;
565 clock-names = "oscclk",
571 power-domains = <&pd_mscl>;
574 cmu_mfc: clock-controller@15280000 {
575 compatible = "samsung,exynos5433-cmu-mfc";
577 #clock-cells = <1>;
579 clock-names = "oscclk", "aclk_mfc_400";
581 power-domains = <&pd_mfc>;
584 cmu_hevc: clock-controller@14f80000 {
585 compatible = "samsung,exynos5433-cmu-hevc";
587 #clock-cells = <1>;
589 clock-names = "oscclk", "aclk_hevc_400";
591 power-domains = <&pd_hevc>;
594 cmu_isp: clock-controller@146d0000 {
595 compatible = "samsung,exynos5433-cmu-isp";
597 #clock-cells = <1>;
599 clock-names = "oscclk",
605 power-domains = <&pd_isp>;
608 cmu_cam0: clock-controller@120d0000 {
609 compatible = "samsung,exynos5433-cmu-cam0";
611 #clock-cells = <1>;
613 clock-names = "oscclk",
621 power-domains = <&pd_cam0>;
624 cmu_cam1: clock-controller@145d0000 {
625 compatible = "samsung,exynos5433-cmu-cam1";
627 #clock-cells = <1>;
629 clock-names = "oscclk",
643 power-domains = <&pd_cam1>;
646 cmu_imem: clock-controller@11060000 {
647 compatible = "samsung,exynos5433-cmu-imem";
649 #clock-cells = <1>;
651 clock-names = "oscclk",
661 slim_sss: slim-sss@11140000 {
662 compatible = "samsung,exynos5433-slim-sss";
665 clock-names = "pclk", "aclk";
670 pd_gscl: power-domain@105c4000 {
671 compatible = "samsung,exynos5433-pd";
673 #power-domain-cells = <0>;
677 pd_cam0: power-domain@105c4020 {
678 compatible = "samsung,exynos5433-pd";
680 #power-domain-cells = <0>;
681 power-domains = <&pd_cam1>;
685 pd_mscl: power-domain@105c4040 {
686 compatible = "samsung,exynos5433-pd";
688 #power-domain-cells = <0>;
692 pd_g3d: power-domain@105c4060 {
693 compatible = "samsung,exynos5433-pd";
695 #power-domain-cells = <0>;
699 pd_disp: power-domain@105c4080 {
700 compatible = "samsung,exynos5433-pd";
702 #power-domain-cells = <0>;
706 pd_cam1: power-domain@105c40a0 {
707 compatible = "samsung,exynos5433-pd";
709 #power-domain-cells = <0>;
713 pd_aud: power-domain@105c40c0 {
714 compatible = "samsung,exynos5433-pd";
716 #power-domain-cells = <0>;
720 pd_g2d: power-domain@105c4120 {
721 compatible = "samsung,exynos5433-pd";
723 #power-domain-cells = <0>;
727 pd_isp: power-domain@105c4140 {
728 compatible = "samsung,exynos5433-pd";
730 #power-domain-cells = <0>;
731 power-domains = <&pd_cam0>;
735 pd_mfc: power-domain@105c4180 {
736 compatible = "samsung,exynos5433-pd";
738 #power-domain-cells = <0>;
742 pd_hevc: power-domain@105c41c0 {
743 compatible = "samsung,exynos5433-pd";
745 #power-domain-cells = <0>;
750 compatible = "samsung,exynos5433-tmu";
755 clock-names = "tmu_apbif", "tmu_sclk";
756 #thermal-sensor-cells = <0>;
761 compatible = "samsung,exynos5433-tmu";
766 clock-names = "tmu_apbif", "tmu_sclk";
767 #thermal-sensor-cells = <0>;
772 compatible = "samsung,exynos5433-tmu";
777 clock-names = "tmu_apbif", "tmu_sclk";
778 #thermal-sensor-cells = <0>;
783 compatible = "samsung,exynos5433-tmu";
788 clock-names = "tmu_apbif", "tmu_sclk";
789 #thermal-sensor-cells = <0>;
794 compatible = "samsung,exynos5433-tmu";
799 clock-names = "tmu_apbif", "tmu_sclk";
800 #thermal-sensor-cells = <0>;
805 compatible = "samsung,exynos5433-mct",
806 "samsung,exynos4210-mct";
821 clock-names = "fin_pll", "mct";
825 compatible = "samsung,exynos-ppmu-v2";
831 compatible = "samsung,exynos-ppmu-v2";
837 compatible = "samsung,exynos-ppmu-v2";
843 compatible = "samsung,exynos-ppmu-v2";
849 compatible = "samsung,exynos5433-pinctrl";
852 wakeup-interrupt-controller {
853 compatible = "samsung,exynos7-wakeup-eint";
859 compatible = "samsung,exynos5433-pinctrl";
862 power-domains = <&pd_aud>;
866 compatible = "samsung,exynos5433-pinctrl";
872 compatible = "samsung,exynos5433-pinctrl";
878 compatible = "samsung,exynos5433-pinctrl";
884 compatible = "samsung,exynos5433-pinctrl";
890 compatible = "samsung,exynos5433-pinctrl";
896 compatible = "samsung,exynos5433-pinctrl";
902 compatible = "samsung,exynos5433-pinctrl";
908 compatible = "samsung,exynos5433-pinctrl";
913 pmu_system_controller: system-controller@105c0000 {
914 compatible = "samsung,exynos5433-pmu", "simple-mfd", "syscon";
916 #clock-cells = <1>;
917 clock-names = "clkout16";
920 mipi_phy: mipi-phy {
921 compatible = "samsung,exynos5433-mipi-video-phy";
922 #phy-cells = <1>;
923 samsung,cam0-sysreg = <&syscon_cam0>;
924 samsung,cam1-sysreg = <&syscon_cam1>;
925 samsung,disp-sysreg = <&syscon_disp>;
928 reboot: syscon-reboot {
929 compatible = "syscon-reboot";
936 gic: interrupt-controller@11001000 {
937 compatible = "arm,gic-400";
938 #interrupt-cells = <3>;
939 interrupt-controller;
948 compatible = "samsung,exynos5433-decon";
961 clock-names = "pclk", "aclk_decon", "aclk_smmu_decon0x",
966 power-domains = <&pd_disp>;
967 interrupt-names = "fifo", "vsync", "lcd_sys";
971 samsung,disp-sysreg = <&syscon_disp>;
974 iommu-names = "m0", "m1";
977 #address-cells = <1>;
978 #size-cells = <0>;
983 remote-endpoint =
991 compatible = "samsung,exynos5433-decon-tv";
1004 clock-names = "pclk", "aclk_decon", "aclk_smmu_decon0x",
1009 samsung,disp-sysreg = <&syscon_disp>;
1010 power-domains = <&pd_disp>;
1011 interrupt-names = "fifo", "vsync", "lcd_sys";
1017 iommu-names = "m0", "m1";
1021 compatible = "samsung,exynos5433-mipi-dsi";
1025 phy-names = "dsim";
1031 clock-names = "bus_clk",
1036 power-domains = <&pd_disp>;
1038 #address-cells = <1>;
1039 #size-cells = <0>;
1042 #address-cells = <1>;
1043 #size-cells = <0>;
1048 remote-endpoint = <&mic_to_dsi>;
1055 compatible = "samsung,exynos5433-mic";
1059 clock-names = "pclk_mic0", "sclk_rgb_vclk_to_mic0";
1060 power-domains = <&pd_disp>;
1061 samsung,disp-syscon = <&syscon_disp>;
1065 #address-cells = <1>;
1066 #size-cells = <0>;
1071 remote-endpoint =
1079 remote-endpoint = <&dsi_to_mic>;
1086 compatible = "samsung,exynos5433-hdmi";
1098 clock-names = "hdmi_pclk", "hdmi_i_pclk",
1105 samsung,syscon-phandle = <&pmu_system_controller>;
1106 samsung,sysreg-phandle = <&syscon_disp>;
1107 #sound-dai-cells = <0>;
1116 compatible = "samsung,exynos5433-disp-sysreg",
1117 "samsung,exynos5433-sysreg", "syscon";
1122 compatible = "samsung,exynos5433-cam0-sysreg",
1123 "samsung,exynos5433-sysreg", "syscon";
1128 compatible = "samsung,exynos5433-cam1-sysreg",
1129 "samsung,exynos5433-sysreg", "syscon";
1134 compatible = "samsung,exynos5433-fsys-sysreg",
1135 "samsung,exynos5433-sysreg", "syscon";
1139 gsc_0: video-scaler@13c00000 {
1140 compatible = "samsung,exynos5433-gsc";
1143 clock-names = "pclk", "aclk", "aclk_xiu",
1151 power-domains = <&pd_gscl>;
1154 gsc_1: video-scaler@13c10000 {
1155 compatible = "samsung,exynos5433-gsc";
1158 clock-names = "pclk", "aclk", "aclk_xiu",
1166 power-domains = <&pd_gscl>;
1169 gsc_2: video-scaler@13c20000 {
1170 compatible = "samsung,exynos5433-gsc";
1173 clock-names = "pclk", "aclk", "aclk_xiu",
1181 power-domains = <&pd_gscl>;
1185 compatible = "samsung,exynos5433-mali", "arm,mali-t760";
1190 interrupt-names = "job", "mmu", "gpu";
1192 clock-names = "core";
1193 power-domains = <&pd_g3d>;
1194 operating-points-v2 = <&gpu_opp_table>;
1197 gpu_opp_table: opp-table {
1198 compatible = "operating-points-v2";
1200 opp-160000000 {
1201 opp-hz = /bits/ 64 <160000000>;
1202 opp-microvolt = <1000000>;
1204 opp-267000000 {
1205 opp-hz = /bits/ 64 <267000000>;
1206 opp-microvolt = <1000000>;
1208 opp-350000000 {
1209 opp-hz = /bits/ 64 <350000000>;
1210 opp-microvolt = <1025000>;
1212 opp-420000000 {
1213 opp-hz = /bits/ 64 <420000000>;
1214 opp-microvolt = <1025000>;
1216 opp-500000000 {
1217 opp-hz = /bits/ 64 <500000000>;
1218 opp-microvolt = <1075000>;
1220 opp-550000000 {
1221 opp-hz = /bits/ 64 <550000000>;
1222 opp-microvolt = <1125000>;
1224 opp-600000000 {
1225 opp-hz = /bits/ 64 <600000000>;
1226 opp-microvolt = <1150000>;
1228 opp-700000000 {
1229 opp-hz = /bits/ 64 <700000000>;
1230 opp-microvolt = <1150000>;
1236 compatible = "samsung,exynos5433-scaler";
1239 clock-names = "pclk", "aclk", "aclk_xiu";
1244 power-domains = <&pd_mscl>;
1248 compatible = "samsung,exynos5433-scaler";
1251 clock-names = "pclk", "aclk", "aclk_xiu";
1256 power-domains = <&pd_mscl>;
1260 compatible = "samsung,exynos5433-jpeg";
1263 clock-names = "pclk", "aclk", "aclk_xiu", "sclk";
1269 power-domains = <&pd_mscl>;
1273 compatible = "samsung,exynos5433-mfc";
1276 clock-names = "pclk", "aclk", "aclk_xiu";
1281 iommu-names = "left", "right";
1282 power-domains = <&pd_mfc>;
1286 compatible = "samsung,exynos-sysmmu";
1289 clock-names = "aclk", "pclk";
1292 power-domains = <&pd_disp>;
1293 #iommu-cells = <0>;
1297 compatible = "samsung,exynos-sysmmu";
1300 clock-names = "aclk", "pclk";
1303 #iommu-cells = <0>;
1304 power-domains = <&pd_disp>;
1308 compatible = "samsung,exynos-sysmmu";
1311 clock-names = "aclk", "pclk";
1314 #iommu-cells = <0>;
1315 power-domains = <&pd_disp>;
1319 compatible = "samsung,exynos-sysmmu";
1322 clock-names = "aclk", "pclk";
1325 #iommu-cells = <0>;
1326 power-domains = <&pd_disp>;
1330 compatible = "samsung,exynos-sysmmu";
1333 clock-names = "aclk", "pclk";
1336 #iommu-cells = <0>;
1337 power-domains = <&pd_gscl>;
1341 compatible = "samsung,exynos-sysmmu";
1344 clock-names = "aclk", "pclk";
1347 #iommu-cells = <0>;
1348 power-domains = <&pd_gscl>;
1352 compatible = "samsung,exynos-sysmmu";
1355 clock-names = "aclk", "pclk";
1358 #iommu-cells = <0>;
1359 power-domains = <&pd_gscl>;
1363 compatible = "samsung,exynos-sysmmu";
1366 clock-names = "aclk", "pclk";
1369 #iommu-cells = <0>;
1370 power-domains = <&pd_mscl>;
1374 compatible = "samsung,exynos-sysmmu";
1377 clock-names = "aclk", "pclk";
1380 #iommu-cells = <0>;
1381 power-domains = <&pd_mscl>;
1385 compatible = "samsung,exynos-sysmmu";
1388 clock-names = "aclk", "pclk";
1391 #iommu-cells = <0>;
1392 power-domains = <&pd_mscl>;
1396 compatible = "samsung,exynos-sysmmu";
1399 clock-names = "aclk", "pclk";
1402 #iommu-cells = <0>;
1403 power-domains = <&pd_mfc>;
1407 compatible = "samsung,exynos-sysmmu";
1410 clock-names = "aclk", "pclk";
1413 #iommu-cells = <0>;
1414 power-domains = <&pd_mfc>;
1418 compatible = "samsung,exynos5433-uart";
1423 clock-names = "uart", "clk_uart_baud0";
1424 pinctrl-names = "default";
1425 pinctrl-0 = <&uart0_bus>;
1430 compatible = "samsung,exynos5433-uart";
1435 clock-names = "uart", "clk_uart_baud0";
1436 pinctrl-names = "default";
1437 pinctrl-0 = <&uart1_bus>;
1442 compatible = "samsung,exynos5433-uart";
1447 clock-names = "uart", "clk_uart_baud0";
1448 pinctrl-names = "default";
1449 pinctrl-0 = <&uart2_bus>;
1454 compatible = "samsung,exynos5433-spi";
1458 dma-names = "tx", "rx";
1459 #address-cells = <1>;
1460 #size-cells = <0>;
1464 clock-names = "spi", "spi_busclk0", "spi_ioclk";
1465 samsung,spi-src-clk = <0>;
1466 pinctrl-names = "default";
1467 pinctrl-0 = <&spi0_bus>;
1468 num-cs = <1>;
1473 compatible = "samsung,exynos5433-spi";
1477 dma-names = "tx", "rx";
1478 #address-cells = <1>;
1479 #size-cells = <0>;
1483 clock-names = "spi", "spi_busclk0", "spi_ioclk";
1484 samsung,spi-src-clk = <0>;
1485 pinctrl-names = "default";
1486 pinctrl-0 = <&spi1_bus>;
1487 num-cs = <1>;
1492 compatible = "samsung,exynos5433-spi";
1496 dma-names = "tx", "rx";
1497 #address-cells = <1>;
1498 #size-cells = <0>;
1502 clock-names = "spi", "spi_busclk0", "spi_ioclk";
1503 samsung,spi-src-clk = <0>;
1504 pinctrl-names = "default";
1505 pinctrl-0 = <&spi2_bus>;
1506 num-cs = <1>;
1511 compatible = "samsung,exynos5433-spi";
1515 dma-names = "tx", "rx";
1516 #address-cells = <1>;
1517 #size-cells = <0>;
1521 clock-names = "spi", "spi_busclk0", "spi_ioclk";
1522 samsung,spi-src-clk = <0>;
1523 pinctrl-names = "default";
1524 pinctrl-0 = <&spi3_bus>;
1525 num-cs = <1>;
1530 compatible = "samsung,exynos5433-spi";
1534 dma-names = "tx", "rx";
1535 #address-cells = <1>;
1536 #size-cells = <0>;
1540 clock-names = "spi", "spi_busclk0", "spi_ioclk";
1541 samsung,spi-src-clk = <0>;
1542 pinctrl-names = "default";
1543 pinctrl-0 = <&spi4_bus>;
1544 num-cs = <1>;
1549 compatible = "samsung,exynos7-adc";
1552 clock-names = "adc";
1554 #io-channel-cells = <1>;
1559 compatible = "samsung,exynos7-i2s";
1562 dma-names = "tx", "rx";
1567 clock-names = "iis", "i2s_opclk0", "i2s_opclk1";
1568 #clock-cells = <1>;
1569 #sound-dai-cells = <1>;
1574 compatible = "samsung,exynos4210-pwm";
1581 samsung,pwm-outputs = <0>, <1>, <2>, <3>;
1583 clock-names = "timers";
1584 #pwm-cells = <3>;
1589 compatible = "samsung,exynos7-hsi2c";
1592 #address-cells = <1>;
1593 #size-cells = <0>;
1594 pinctrl-names = "default";
1595 pinctrl-0 = <&hs_i2c0_bus>;
1597 clock-names = "hsi2c";
1602 compatible = "samsung,exynos7-hsi2c";
1605 #address-cells = <1>;
1606 #size-cells = <0>;
1607 pinctrl-names = "default";
1608 pinctrl-0 = <&hs_i2c1_bus>;
1610 clock-names = "hsi2c";
1615 compatible = "samsung,exynos7-hsi2c";
1618 #address-cells = <1>;
1619 #size-cells = <0>;
1620 pinctrl-names = "default";
1621 pinctrl-0 = <&hs_i2c2_bus>;
1623 clock-names = "hsi2c";
1628 compatible = "samsung,exynos7-hsi2c";
1631 #address-cells = <1>;
1632 #size-cells = <0>;
1633 pinctrl-names = "default";
1634 pinctrl-0 = <&hs_i2c3_bus>;
1636 clock-names = "hsi2c";
1641 compatible = "samsung,exynos7-hsi2c";
1644 #address-cells = <1>;
1645 #size-cells = <0>;
1646 pinctrl-names = "default";
1647 pinctrl-0 = <&hs_i2c4_bus>;
1649 clock-names = "hsi2c";
1654 compatible = "samsung,exynos7-hsi2c";
1657 #address-cells = <1>;
1658 #size-cells = <0>;
1659 pinctrl-names = "default";
1660 pinctrl-0 = <&hs_i2c5_bus>;
1662 clock-names = "hsi2c";
1667 compatible = "samsung,exynos7-hsi2c";
1670 #address-cells = <1>;
1671 #size-cells = <0>;
1672 pinctrl-names = "default";
1673 pinctrl-0 = <&hs_i2c6_bus>;
1675 clock-names = "hsi2c";
1680 compatible = "samsung,exynos7-hsi2c";
1683 #address-cells = <1>;
1684 #size-cells = <0>;
1685 pinctrl-names = "default";
1686 pinctrl-0 = <&hs_i2c7_bus>;
1688 clock-names = "hsi2c";
1693 compatible = "samsung,exynos7-hsi2c";
1696 #address-cells = <1>;
1697 #size-cells = <0>;
1698 pinctrl-names = "default";
1699 pinctrl-0 = <&hs_i2c8_bus>;
1701 clock-names = "hsi2c";
1706 compatible = "samsung,exynos7-hsi2c";
1709 #address-cells = <1>;
1710 #size-cells = <0>;
1711 pinctrl-names = "default";
1712 pinctrl-0 = <&hs_i2c9_bus>;
1714 clock-names = "hsi2c";
1719 compatible = "samsung,exynos7-hsi2c";
1722 #address-cells = <1>;
1723 #size-cells = <0>;
1724 pinctrl-names = "default";
1725 pinctrl-0 = <&hs_i2c10_bus>;
1727 clock-names = "hsi2c";
1732 compatible = "samsung,exynos7-hsi2c";
1735 #address-cells = <1>;
1736 #size-cells = <0>;
1737 pinctrl-names = "default";
1738 pinctrl-0 = <&hs_i2c11_bus>;
1740 clock-names = "hsi2c";
1745 compatible = "samsung,exynos5433-dwusb3";
1750 clock-names = "aclk", "susp_clk", "phyclk", "pipe_pclk";
1751 #address-cells = <1>;
1752 #size-cells = <1>;
1761 clock-names = "ref", "bus_early", "suspend";
1765 phy-names = "usb2-phy", "usb3-phy";
1770 compatible = "samsung,exynos5433-usbdrd-phy";
1776 clock-names = "phy", "ref", "phy_utmi", "phy_pipe",
1778 #phy-cells = <1>;
1779 samsung,pmu-syscon = <&pmu_system_controller>;
1784 compatible = "samsung,exynos5433-usbdrd-phy";
1790 clock-names = "phy", "ref", "phy_utmi", "phy_pipe",
1792 #phy-cells = <1>;
1793 samsung,pmu-syscon = <&pmu_system_controller>;
1798 compatible = "samsung,exynos5433-dwusb3";
1803 clock-names = "aclk", "susp_clk", "phyclk", "pipe_pclk";
1804 #address-cells = <1>;
1805 #size-cells = <1>;
1814 clock-names = "ref", "bus_early", "suspend";
1818 phy-names = "usb2-phy", "usb3-phy";
1823 compatible = "samsung,exynos7-dw-mshc-smu";
1825 #address-cells = <1>;
1826 #size-cells = <0>;
1830 clock-names = "biu", "ciu";
1831 fifo-depth = <0x40>;
1836 compatible = "samsung,exynos7-dw-mshc-smu";
1838 #address-cells = <1>;
1839 #size-cells = <0>;
1843 clock-names = "biu", "ciu";
1844 fifo-depth = <0x40>;
1849 compatible = "samsung,exynos7-dw-mshc-smu";
1851 #address-cells = <1>;
1852 #size-cells = <0>;
1856 clock-names = "biu", "ciu";
1857 fifo-depth = <0x40>;
1861 pdma0: dma-controller@15610000 {
1866 clock-names = "apb_pclk";
1867 #dma-cells = <1>;
1870 pdma1: dma-controller@15600000 {
1875 clock-names = "apb_pclk";
1876 #dma-cells = <1>;
1879 audio-subsystem@11400000 {
1880 compatible = "samsung,exynos5433-lpass";
1883 clock-names = "sfr0_ctrl";
1884 power-domains = <&pd_aud>;
1885 #address-cells = <1>;
1886 #size-cells = <1>;
1889 adma: dma-controller@11420000 {
1894 clock-names = "apb_pclk";
1895 #dma-cells = <1>;
1896 power-domains = <&pd_aud>;
1900 compatible = "samsung,exynos7-i2s";
1903 dma-names = "tx", "rx";
1905 #address-cells = <1>;
1906 #size-cells = <0>;
1910 clock-names = "iis", "i2s_opclk0", "i2s_opclk1";
1911 #clock-cells = <1>;
1912 pinctrl-names = "default";
1913 pinctrl-0 = <&i2s0_bus>;
1914 power-domains = <&pd_aud>;
1915 #sound-dai-cells = <1>;
1920 compatible = "samsung,exynos5433-uart";
1925 clock-names = "uart", "clk_uart_baud0";
1926 pinctrl-names = "default";
1927 pinctrl-0 = <&uart_aud_bus>;
1928 power-domains = <&pd_aud>;
1933 pcie_phy: pcie-phy@15680000 {
1934 compatible = "samsung,exynos5433-pcie-phy";
1936 samsung,pmu-syscon = <&pmu_system_controller>;
1937 samsung,fsys-sysreg = <&syscon_fsys>;
1938 #phy-cells = <0>;
1943 compatible = "samsung,exynos5433-pcie";
1946 reg-names = "dbi", "elbi", "config";
1947 #address-cells = <3>;
1948 #size-cells = <2>;
1949 #interrupt-cells = <1>;
1954 clock-names = "pcie", "pcie_bus";
1955 num-lanes = <1>;
1956 num-viewport = <3>;
1957 bus-range = <0x00 0xff>;
1966 compatible = "arm,armv8-timer";
1978 #include "exynos5433-bus.dtsi"
1979 #include "exynos5433-pinctrl.dtsi"
1980 #include "exynos5433-tmu.dtsi"